1/* Install given floating-point control modes. x86_64 version.
2 Copyright (C) 2016-2022 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
14
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <https://www.gnu.org/licenses/>. */
18
19#include <fenv.h>
20#include <fpu_control.h>
21
22/* All exceptions, including the x86-specific "denormal operand"
23 exception. */
24#define FE_ALL_EXCEPT_X86 (FE_ALL_EXCEPT | __FE_DENORM)
25
26int
27fesetmode (const femode_t *modep)
28{
29 fpu_control_t cw;
30 unsigned int mxcsr;
31 __asm__ ("stmxcsr %0" : "=m" (mxcsr));
32 /* Preserve SSE exception flags but restore other state in
33 MXCSR. */
34 mxcsr &= FE_ALL_EXCEPT_X86;
35 if (modep == FE_DFL_MODE)
36 {
37 cw = _FPU_DEFAULT;
38 /* Default MXCSR state has all bits zero except for those
39 masking exceptions. */
40 mxcsr |= FE_ALL_EXCEPT_X86 << 7;
41 }
42 else
43 {
44 cw = modep->__control_word;
45 mxcsr |= modep->__mxcsr & ~FE_ALL_EXCEPT_X86;
46 }
47 _FPU_SETCW (cw);
48 __asm__ ("ldmxcsr %0" : : "m" (mxcsr));
49 return 0;
50}
51

source code of glibc/sysdeps/x86_64/fpu/fesetmode.c