1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* ----------------------------------------------------------------------- * |
3 | * |
4 | * Copyright 1999-2007 H. Peter Anvin - All Rights Reserved |
5 | * |
6 | * ----------------------------------------------------------------------- */ |
7 | |
8 | #ifndef BOOT_VESA_H |
9 | #define BOOT_VESA_H |
10 | |
11 | typedef struct { |
12 | u16 off, seg; |
13 | } far_ptr; |
14 | |
15 | /* VESA General Information table */ |
16 | struct vesa_general_info { |
17 | u32 signature; /* 0 Magic number = "VESA" */ |
18 | u16 version; /* 4 */ |
19 | far_ptr vendor_string; /* 6 */ |
20 | u32 capabilities; /* 10 */ |
21 | far_ptr video_mode_ptr; /* 14 */ |
22 | u16 total_memory; /* 18 */ |
23 | |
24 | u8 reserved[236]; /* 20 */ |
25 | } __attribute__ ((packed)); |
26 | |
27 | #define VESA_MAGIC ('V' + ('E' << 8) + ('S' << 16) + ('A' << 24)) |
28 | |
29 | struct vesa_mode_info { |
30 | u16 mode_attr; /* 0 */ |
31 | u8 win_attr[2]; /* 2 */ |
32 | u16 win_grain; /* 4 */ |
33 | u16 win_size; /* 6 */ |
34 | u16 win_seg[2]; /* 8 */ |
35 | far_ptr win_scheme; /* 12 */ |
36 | u16 logical_scan; /* 16 */ |
37 | |
38 | u16 h_res; /* 18 */ |
39 | u16 v_res; /* 20 */ |
40 | u8 char_width; /* 22 */ |
41 | u8 char_height; /* 23 */ |
42 | u8 memory_planes; /* 24 */ |
43 | u8 bpp; /* 25 */ |
44 | u8 banks; /* 26 */ |
45 | u8 memory_layout; /* 27 */ |
46 | u8 bank_size; /* 28 */ |
47 | u8 image_planes; /* 29 */ |
48 | u8 page_function; /* 30 */ |
49 | |
50 | u8 rmask; /* 31 */ |
51 | u8 rpos; /* 32 */ |
52 | u8 gmask; /* 33 */ |
53 | u8 gpos; /* 34 */ |
54 | u8 bmask; /* 35 */ |
55 | u8 bpos; /* 36 */ |
56 | u8 resv_mask; /* 37 */ |
57 | u8 resv_pos; /* 38 */ |
58 | u8 dcm_info; /* 39 */ |
59 | |
60 | u32 lfb_ptr; /* 40 Linear frame buffer address */ |
61 | u32 offscreen_ptr; /* 44 Offscreen memory address */ |
62 | u16 offscreen_size; /* 48 */ |
63 | |
64 | u8 reserved[206]; /* 50 */ |
65 | } __attribute__ ((packed)); |
66 | |
67 | #endif /* LIB_SYS_VESA_H */ |
68 | |