1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /****************************************************************************** |
3 | * x86_emulate.h |
4 | * |
5 | * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. |
6 | * |
7 | * Copyright (c) 2005 Keir Fraser |
8 | * |
9 | * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4 |
10 | */ |
11 | |
12 | #ifndef _ASM_X86_KVM_X86_EMULATE_H |
13 | #define _ASM_X86_KVM_X86_EMULATE_H |
14 | |
15 | #include <asm/desc_defs.h> |
16 | #include "fpu.h" |
17 | |
18 | struct x86_emulate_ctxt; |
19 | enum x86_intercept; |
20 | enum x86_intercept_stage; |
21 | |
22 | struct x86_exception { |
23 | u8 vector; |
24 | bool error_code_valid; |
25 | u16 error_code; |
26 | bool nested_page_fault; |
27 | u64 address; /* cr2 or nested page fault gpa */ |
28 | u8 async_page_fault; |
29 | }; |
30 | |
31 | /* |
32 | * This struct is used to carry enough information from the instruction |
33 | * decoder to main KVM so that a decision can be made whether the |
34 | * instruction needs to be intercepted or not. |
35 | */ |
36 | struct x86_instruction_info { |
37 | u8 intercept; /* which intercept */ |
38 | u8 rep_prefix; /* rep prefix? */ |
39 | u8 modrm_mod; /* mod part of modrm */ |
40 | u8 modrm_reg; /* index of register used */ |
41 | u8 modrm_rm; /* rm part of modrm */ |
42 | u64 src_val; /* value of source operand */ |
43 | u64 dst_val; /* value of destination operand */ |
44 | u8 src_bytes; /* size of source operand */ |
45 | u8 dst_bytes; /* size of destination operand */ |
46 | u8 ad_bytes; /* size of src/dst address */ |
47 | u64 next_rip; /* rip following the instruction */ |
48 | }; |
49 | |
50 | /* |
51 | * x86_emulate_ops: |
52 | * |
53 | * These operations represent the instruction emulator's interface to memory. |
54 | * There are two categories of operation: those that act on ordinary memory |
55 | * regions (*_std), and those that act on memory regions known to require |
56 | * special treatment or emulation (*_emulated). |
57 | * |
58 | * The emulator assumes that an instruction accesses only one 'emulated memory' |
59 | * location, that this location is the given linear faulting address (cr2), and |
60 | * that this is one of the instruction's data operands. Instruction fetches and |
61 | * stack operations are assumed never to access emulated memory. The emulator |
62 | * automatically deduces which operand of a string-move operation is accessing |
63 | * emulated memory, and assumes that the other operand accesses normal memory. |
64 | * |
65 | * NOTES: |
66 | * 1. The emulator isn't very smart about emulated vs. standard memory. |
67 | * 'Emulated memory' access addresses should be checked for sanity. |
68 | * 'Normal memory' accesses may fault, and the caller must arrange to |
69 | * detect and handle reentrancy into the emulator via recursive faults. |
70 | * Accesses may be unaligned and may cross page boundaries. |
71 | * 2. If the access fails (cannot emulate, or a standard access faults) then |
72 | * it is up to the memop to propagate the fault to the guest VM via |
73 | * some out-of-band mechanism, unknown to the emulator. The memop signals |
74 | * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will |
75 | * then immediately bail. |
76 | * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only |
77 | * cmpxchg8b_emulated need support 8-byte accesses. |
78 | * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system. |
79 | */ |
80 | /* Access completed successfully: continue emulation as normal. */ |
81 | #define X86EMUL_CONTINUE 0 |
82 | /* Access is unhandleable: bail from emulation and return error to caller. */ |
83 | #define X86EMUL_UNHANDLEABLE 1 |
84 | /* Terminate emulation but return success to the caller. */ |
85 | #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */ |
86 | #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */ |
87 | #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */ |
88 | #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */ |
89 | #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */ |
90 | |
91 | /* x86-specific emulation flags */ |
92 | #define X86EMUL_F_WRITE BIT(0) |
93 | #define X86EMUL_F_FETCH BIT(1) |
94 | #define X86EMUL_F_IMPLICIT BIT(2) |
95 | #define X86EMUL_F_INVLPG BIT(3) |
96 | |
97 | struct x86_emulate_ops { |
98 | void (*vm_bugged)(struct x86_emulate_ctxt *ctxt); |
99 | /* |
100 | * read_gpr: read a general purpose register (rax - r15) |
101 | * |
102 | * @reg: gpr number. |
103 | */ |
104 | ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg); |
105 | /* |
106 | * write_gpr: write a general purpose register (rax - r15) |
107 | * |
108 | * @reg: gpr number. |
109 | * @val: value to write. |
110 | */ |
111 | void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val); |
112 | /* |
113 | * read_std: Read bytes of standard (non-emulated/special) memory. |
114 | * Used for descriptor reading. |
115 | * @addr: [IN ] Linear address from which to read. |
116 | * @val: [OUT] Value read from memory, zero-extended to 'u_long'. |
117 | * @bytes: [IN ] Number of bytes to read from memory. |
118 | * @system:[IN ] Whether the access is forced to be at CPL0. |
119 | */ |
120 | int (*read_std)(struct x86_emulate_ctxt *ctxt, |
121 | unsigned long addr, void *val, |
122 | unsigned int bytes, |
123 | struct x86_exception *fault, bool system); |
124 | |
125 | /* |
126 | * write_std: Write bytes of standard (non-emulated/special) memory. |
127 | * Used for descriptor writing. |
128 | * @addr: [IN ] Linear address to which to write. |
129 | * @val: [OUT] Value write to memory, zero-extended to 'u_long'. |
130 | * @bytes: [IN ] Number of bytes to write to memory. |
131 | * @system:[IN ] Whether the access is forced to be at CPL0. |
132 | */ |
133 | int (*write_std)(struct x86_emulate_ctxt *ctxt, |
134 | unsigned long addr, void *val, unsigned int bytes, |
135 | struct x86_exception *fault, bool system); |
136 | /* |
137 | * fetch: Read bytes of standard (non-emulated/special) memory. |
138 | * Used for instruction fetch. |
139 | * @addr: [IN ] Linear address from which to read. |
140 | * @val: [OUT] Value read from memory, zero-extended to 'u_long'. |
141 | * @bytes: [IN ] Number of bytes to read from memory. |
142 | */ |
143 | int (*fetch)(struct x86_emulate_ctxt *ctxt, |
144 | unsigned long addr, void *val, unsigned int bytes, |
145 | struct x86_exception *fault); |
146 | |
147 | /* |
148 | * read_emulated: Read bytes from emulated/special memory area. |
149 | * @addr: [IN ] Linear address from which to read. |
150 | * @val: [OUT] Value read from memory, zero-extended to 'u_long'. |
151 | * @bytes: [IN ] Number of bytes to read from memory. |
152 | */ |
153 | int (*read_emulated)(struct x86_emulate_ctxt *ctxt, |
154 | unsigned long addr, void *val, unsigned int bytes, |
155 | struct x86_exception *fault); |
156 | |
157 | /* |
158 | * write_emulated: Write bytes to emulated/special memory area. |
159 | * @addr: [IN ] Linear address to which to write. |
160 | * @val: [IN ] Value to write to memory (low-order bytes used as |
161 | * required). |
162 | * @bytes: [IN ] Number of bytes to write to memory. |
163 | */ |
164 | int (*write_emulated)(struct x86_emulate_ctxt *ctxt, |
165 | unsigned long addr, const void *val, |
166 | unsigned int bytes, |
167 | struct x86_exception *fault); |
168 | |
169 | /* |
170 | * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an |
171 | * emulated/special memory area. |
172 | * @addr: [IN ] Linear address to access. |
173 | * @old: [IN ] Value expected to be current at @addr. |
174 | * @new: [IN ] Value to write to @addr. |
175 | * @bytes: [IN ] Number of bytes to access using CMPXCHG. |
176 | */ |
177 | int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt, |
178 | unsigned long addr, |
179 | const void *old, |
180 | const void *new, |
181 | unsigned int bytes, |
182 | struct x86_exception *fault); |
183 | void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); |
184 | |
185 | int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt, |
186 | int size, unsigned short port, void *val, |
187 | unsigned int count); |
188 | |
189 | int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt, |
190 | int size, unsigned short port, const void *val, |
191 | unsigned int count); |
192 | |
193 | bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector, |
194 | struct desc_struct *desc, u32 *base3, int seg); |
195 | void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector, |
196 | struct desc_struct *desc, u32 base3, int seg); |
197 | unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt, |
198 | int seg); |
199 | void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); |
200 | void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); |
201 | void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); |
202 | void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); |
203 | ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr); |
204 | int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val); |
205 | int (*cpl)(struct x86_emulate_ctxt *ctxt); |
206 | ulong (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr); |
207 | int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value); |
208 | int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data); |
209 | int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); |
210 | int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); |
211 | int (*check_rdpmc_early)(struct x86_emulate_ctxt *ctxt, u32 pmc); |
212 | int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata); |
213 | void (*halt)(struct x86_emulate_ctxt *ctxt); |
214 | void (*wbinvd)(struct x86_emulate_ctxt *ctxt); |
215 | int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt); |
216 | int (*intercept)(struct x86_emulate_ctxt *ctxt, |
217 | struct x86_instruction_info *info, |
218 | enum x86_intercept_stage stage); |
219 | |
220 | bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx, |
221 | u32 *ecx, u32 *edx, bool exact_only); |
222 | bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt); |
223 | bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt); |
224 | bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt); |
225 | |
226 | void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked); |
227 | |
228 | bool (*is_smm)(struct x86_emulate_ctxt *ctxt); |
229 | bool (*is_guest_mode)(struct x86_emulate_ctxt *ctxt); |
230 | int (*leave_smm)(struct x86_emulate_ctxt *ctxt); |
231 | void (*triple_fault)(struct x86_emulate_ctxt *ctxt); |
232 | int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr); |
233 | |
234 | gva_t (*get_untagged_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr, |
235 | unsigned int flags); |
236 | }; |
237 | |
238 | /* Type, address-of, and value of an instruction's operand. */ |
239 | struct operand { |
240 | enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type; |
241 | unsigned int bytes; |
242 | unsigned int count; |
243 | union { |
244 | unsigned long orig_val; |
245 | u64 orig_val64; |
246 | }; |
247 | union { |
248 | unsigned long *reg; |
249 | struct segmented_address { |
250 | ulong ea; |
251 | unsigned seg; |
252 | } mem; |
253 | unsigned xmm; |
254 | unsigned mm; |
255 | } addr; |
256 | union { |
257 | unsigned long val; |
258 | u64 val64; |
259 | char valptr[sizeof(sse128_t)]; |
260 | sse128_t vec_val; |
261 | u64 mm_val; |
262 | void *data; |
263 | }; |
264 | }; |
265 | |
266 | struct fetch_cache { |
267 | u8 data[15]; |
268 | u8 *ptr; |
269 | u8 *end; |
270 | }; |
271 | |
272 | struct read_cache { |
273 | u8 data[1024]; |
274 | unsigned long pos; |
275 | unsigned long end; |
276 | }; |
277 | |
278 | /* Execution mode, passed to the emulator. */ |
279 | enum x86emul_mode { |
280 | X86EMUL_MODE_REAL, /* Real mode. */ |
281 | X86EMUL_MODE_VM86, /* Virtual 8086 mode. */ |
282 | X86EMUL_MODE_PROT16, /* 16-bit protected mode. */ |
283 | X86EMUL_MODE_PROT32, /* 32-bit protected mode. */ |
284 | X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */ |
285 | }; |
286 | |
287 | /* |
288 | * fastop functions are declared as taking a never-defined fastop parameter, |
289 | * so they can't be called from C directly. |
290 | */ |
291 | struct fastop; |
292 | |
293 | typedef void (*fastop_t)(struct fastop *); |
294 | |
295 | /* |
296 | * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is |
297 | * tracked/accessed via _eip, and except for RIP relative addressing, which |
298 | * also uses _eip, RIP cannot be a register operand nor can it be an operand in |
299 | * a ModRM or SIB byte. |
300 | */ |
301 | #ifdef CONFIG_X86_64 |
302 | #define NR_EMULATOR_GPRS 16 |
303 | #else |
304 | #define NR_EMULATOR_GPRS 8 |
305 | #endif |
306 | |
307 | struct x86_emulate_ctxt { |
308 | void *vcpu; |
309 | const struct x86_emulate_ops *ops; |
310 | |
311 | /* Register state before/after emulation. */ |
312 | unsigned long eflags; |
313 | unsigned long eip; /* eip before instruction emulation */ |
314 | /* Emulated execution mode, represented by an X86EMUL_MODE value. */ |
315 | enum x86emul_mode mode; |
316 | |
317 | /* interruptibility state, as a result of execution of STI or MOV SS */ |
318 | int interruptibility; |
319 | |
320 | bool perm_ok; /* do not check permissions if true */ |
321 | bool tf; /* TF value before instruction (after for syscall/sysret) */ |
322 | |
323 | bool have_exception; |
324 | struct x86_exception exception; |
325 | |
326 | /* GPA available */ |
327 | bool gpa_available; |
328 | gpa_t gpa_val; |
329 | |
330 | /* |
331 | * decode cache |
332 | */ |
333 | |
334 | /* current opcode length in bytes */ |
335 | u8 opcode_len; |
336 | u8 b; |
337 | u8 intercept; |
338 | u8 op_bytes; |
339 | u8 ad_bytes; |
340 | union { |
341 | int (*execute)(struct x86_emulate_ctxt *ctxt); |
342 | fastop_t fop; |
343 | }; |
344 | int (*check_perm)(struct x86_emulate_ctxt *ctxt); |
345 | |
346 | bool rip_relative; |
347 | u8 rex_prefix; |
348 | u8 lock_prefix; |
349 | u8 rep_prefix; |
350 | /* bitmaps of registers in _regs[] that can be read */ |
351 | u16 regs_valid; |
352 | /* bitmaps of registers in _regs[] that have been written */ |
353 | u16 regs_dirty; |
354 | /* modrm */ |
355 | u8 modrm; |
356 | u8 modrm_mod; |
357 | u8 modrm_reg; |
358 | u8 modrm_rm; |
359 | u8 modrm_seg; |
360 | u8 seg_override; |
361 | u64 d; |
362 | unsigned long _eip; |
363 | |
364 | /* Here begins the usercopy section. */ |
365 | struct operand src; |
366 | struct operand src2; |
367 | struct operand dst; |
368 | struct operand memop; |
369 | unsigned long _regs[NR_EMULATOR_GPRS]; |
370 | struct operand *memopp; |
371 | struct fetch_cache fetch; |
372 | struct read_cache io_read; |
373 | struct read_cache mem_read; |
374 | bool is_branch; |
375 | }; |
376 | |
377 | #define KVM_EMULATOR_BUG_ON(cond, ctxt) \ |
378 | ({ \ |
379 | int __ret = (cond); \ |
380 | \ |
381 | if (WARN_ON_ONCE(__ret)) \ |
382 | ctxt->ops->vm_bugged(ctxt); \ |
383 | unlikely(__ret); \ |
384 | }) |
385 | |
386 | /* Repeat String Operation Prefix */ |
387 | #define REPE_PREFIX 0xf3 |
388 | #define REPNE_PREFIX 0xf2 |
389 | |
390 | /* CPUID vendors */ |
391 | #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541 |
392 | #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163 |
393 | #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65 |
394 | |
395 | #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41 |
396 | #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574 |
397 | #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273 |
398 | |
399 | #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948 |
400 | #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975 |
401 | #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e |
402 | |
403 | #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547 |
404 | #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e |
405 | #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69 |
406 | |
407 | #define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543 |
408 | #define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561 |
409 | #define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561 |
410 | |
411 | static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx) |
412 | { |
413 | return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx && |
414 | ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx && |
415 | edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx; |
416 | } |
417 | |
418 | static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx) |
419 | { |
420 | return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx && |
421 | ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx && |
422 | edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) || |
423 | (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx && |
424 | ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx && |
425 | edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx); |
426 | } |
427 | |
428 | static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx) |
429 | { |
430 | return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx && |
431 | ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx && |
432 | edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx; |
433 | } |
434 | |
435 | enum x86_intercept_stage { |
436 | X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */ |
437 | X86_ICPT_PRE_EXCEPT, |
438 | X86_ICPT_POST_EXCEPT, |
439 | X86_ICPT_POST_MEMACCESS, |
440 | }; |
441 | |
442 | enum x86_intercept { |
443 | x86_intercept_none, |
444 | x86_intercept_cr_read, |
445 | x86_intercept_cr_write, |
446 | x86_intercept_clts, |
447 | x86_intercept_lmsw, |
448 | x86_intercept_smsw, |
449 | x86_intercept_dr_read, |
450 | x86_intercept_dr_write, |
451 | x86_intercept_lidt, |
452 | x86_intercept_sidt, |
453 | x86_intercept_lgdt, |
454 | x86_intercept_sgdt, |
455 | x86_intercept_lldt, |
456 | x86_intercept_sldt, |
457 | x86_intercept_ltr, |
458 | x86_intercept_str, |
459 | x86_intercept_rdtsc, |
460 | x86_intercept_rdpmc, |
461 | x86_intercept_pushf, |
462 | x86_intercept_popf, |
463 | x86_intercept_cpuid, |
464 | x86_intercept_rsm, |
465 | x86_intercept_iret, |
466 | x86_intercept_intn, |
467 | x86_intercept_invd, |
468 | x86_intercept_pause, |
469 | x86_intercept_hlt, |
470 | x86_intercept_invlpg, |
471 | x86_intercept_invlpga, |
472 | x86_intercept_vmrun, |
473 | x86_intercept_vmload, |
474 | x86_intercept_vmsave, |
475 | x86_intercept_vmmcall, |
476 | x86_intercept_stgi, |
477 | x86_intercept_clgi, |
478 | x86_intercept_skinit, |
479 | x86_intercept_rdtscp, |
480 | x86_intercept_rdpid, |
481 | x86_intercept_icebp, |
482 | x86_intercept_wbinvd, |
483 | x86_intercept_monitor, |
484 | x86_intercept_mwait, |
485 | x86_intercept_rdmsr, |
486 | x86_intercept_wrmsr, |
487 | x86_intercept_in, |
488 | x86_intercept_ins, |
489 | x86_intercept_out, |
490 | x86_intercept_outs, |
491 | x86_intercept_xsetbv, |
492 | |
493 | nr_x86_intercepts |
494 | }; |
495 | |
496 | /* Host execution mode. */ |
497 | #if defined(CONFIG_X86_32) |
498 | #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32 |
499 | #elif defined(CONFIG_X86_64) |
500 | #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64 |
501 | #endif |
502 | |
503 | int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type); |
504 | bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt); |
505 | #define EMULATION_FAILED -1 |
506 | #define EMULATION_OK 0 |
507 | #define EMULATION_RESTART 1 |
508 | #define EMULATION_INTERCEPTED 2 |
509 | void init_decode_cache(struct x86_emulate_ctxt *ctxt); |
510 | int x86_emulate_insn(struct x86_emulate_ctxt *ctxt); |
511 | int emulator_task_switch(struct x86_emulate_ctxt *ctxt, |
512 | u16 tss_selector, int idt_index, int reason, |
513 | bool has_error_code, u32 error_code); |
514 | int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq); |
515 | void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt); |
516 | void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt); |
517 | bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt); |
518 | |
519 | static inline ulong reg_read(struct x86_emulate_ctxt *ctxt, unsigned nr) |
520 | { |
521 | if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) |
522 | nr &= NR_EMULATOR_GPRS - 1; |
523 | |
524 | if (!(ctxt->regs_valid & (1 << nr))) { |
525 | ctxt->regs_valid |= 1 << nr; |
526 | ctxt->_regs[nr] = ctxt->ops->read_gpr(ctxt, nr); |
527 | } |
528 | return ctxt->_regs[nr]; |
529 | } |
530 | |
531 | static inline ulong *reg_write(struct x86_emulate_ctxt *ctxt, unsigned nr) |
532 | { |
533 | if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) |
534 | nr &= NR_EMULATOR_GPRS - 1; |
535 | |
536 | BUILD_BUG_ON(sizeof(ctxt->regs_dirty) * BITS_PER_BYTE < NR_EMULATOR_GPRS); |
537 | BUILD_BUG_ON(sizeof(ctxt->regs_valid) * BITS_PER_BYTE < NR_EMULATOR_GPRS); |
538 | |
539 | ctxt->regs_valid |= 1 << nr; |
540 | ctxt->regs_dirty |= 1 << nr; |
541 | return &ctxt->_regs[nr]; |
542 | } |
543 | |
544 | static inline ulong *reg_rmw(struct x86_emulate_ctxt *ctxt, unsigned nr) |
545 | { |
546 | reg_read(ctxt, nr); |
547 | return reg_write(ctxt, nr); |
548 | } |
549 | |
550 | #endif /* _ASM_X86_KVM_X86_EMULATE_H */ |
551 | |