1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Pinmux and GPIO driver for tps6594 PMIC |
4 | * |
5 | * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/ |
6 | */ |
7 | |
8 | #include <linux/gpio/driver.h> |
9 | #include <linux/gpio/regmap.h> |
10 | #include <linux/module.h> |
11 | #include <linux/pinctrl/pinmux.h> |
12 | #include <linux/platform_device.h> |
13 | #include <linux/mod_devicetable.h> |
14 | |
15 | #include <linux/mfd/tps6594.h> |
16 | |
17 | #define TPS6594_PINCTRL_PINS_NB 11 |
18 | |
19 | #define TPS6594_PINCTRL_GPIO_FUNCTION 0 |
20 | #define TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 1 |
21 | #define TPS6594_PINCTRL_TRIG_WDOG_FUNCTION 1 |
22 | #define TPS6594_PINCTRL_CLK32KOUT_FUNCTION 1 |
23 | #define TPS6594_PINCTRL_SCLK_SPMI_FUNCTION 1 |
24 | #define TPS6594_PINCTRL_SDATA_SPMI_FUNCTION 1 |
25 | #define TPS6594_PINCTRL_NERR_MCU_FUNCTION 1 |
26 | #define TPS6594_PINCTRL_PDOG_FUNCTION 1 |
27 | #define TPS6594_PINCTRL_SYNCCLKIN_FUNCTION 1 |
28 | #define TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION 2 |
29 | #define TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION 2 |
30 | #define TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION 2 |
31 | #define TPS6594_PINCTRL_NERR_SOC_FUNCTION 2 |
32 | #define TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION 3 |
33 | #define TPS6594_PINCTRL_NSLEEP1_FUNCTION 4 |
34 | #define TPS6594_PINCTRL_NSLEEP2_FUNCTION 5 |
35 | #define TPS6594_PINCTRL_WKUP1_FUNCTION 6 |
36 | #define TPS6594_PINCTRL_WKUP2_FUNCTION 7 |
37 | |
38 | /* Special muxval for recalcitrant pins */ |
39 | #define TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8 2 |
40 | #define TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8 3 |
41 | #define TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9 3 |
42 | |
43 | #define TPS6594_OFFSET_GPIO_SEL 5 |
44 | |
45 | #define FUNCTION(fname, v) \ |
46 | { \ |
47 | .pinfunction = PINCTRL_PINFUNCTION(#fname, \ |
48 | tps6594_##fname##_func_group_names, \ |
49 | ARRAY_SIZE(tps6594_##fname##_func_group_names)),\ |
50 | .muxval = v, \ |
51 | } |
52 | |
53 | static const struct pinctrl_pin_desc tps6594_pins[TPS6594_PINCTRL_PINS_NB] = { |
54 | PINCTRL_PIN(0, "GPIO0" ), PINCTRL_PIN(1, "GPIO1" ), |
55 | PINCTRL_PIN(2, "GPIO2" ), PINCTRL_PIN(3, "GPIO3" ), |
56 | PINCTRL_PIN(4, "GPIO4" ), PINCTRL_PIN(5, "GPIO5" ), |
57 | PINCTRL_PIN(6, "GPIO6" ), PINCTRL_PIN(7, "GPIO7" ), |
58 | PINCTRL_PIN(8, "GPIO8" ), PINCTRL_PIN(9, "GPIO9" ), |
59 | PINCTRL_PIN(10, "GPIO10" ), |
60 | }; |
61 | |
62 | static const char *const tps6594_gpio_func_group_names[] = { |
63 | "GPIO0" , "GPIO1" , "GPIO2" , "GPIO3" , "GPIO4" , "GPIO5" , |
64 | "GPIO6" , "GPIO7" , "GPIO8" , "GPIO9" , "GPIO10" , |
65 | }; |
66 | |
67 | static const char *const tps6594_nsleep1_func_group_names[] = { |
68 | "GPIO0" , "GPIO1" , "GPIO2" , "GPIO3" , "GPIO4" , "GPIO5" , |
69 | "GPIO6" , "GPIO7" , "GPIO8" , "GPIO9" , "GPIO10" , |
70 | }; |
71 | |
72 | static const char *const tps6594_nsleep2_func_group_names[] = { |
73 | "GPIO0" , "GPIO1" , "GPIO2" , "GPIO3" , "GPIO4" , "GPIO5" , |
74 | "GPIO6" , "GPIO7" , "GPIO8" , "GPIO9" , "GPIO10" , |
75 | }; |
76 | |
77 | static const char *const tps6594_wkup1_func_group_names[] = { |
78 | "GPIO0" , "GPIO1" , "GPIO2" , "GPIO3" , "GPIO4" , "GPIO5" , |
79 | "GPIO6" , "GPIO7" , "GPIO8" , "GPIO9" , "GPIO10" , |
80 | }; |
81 | |
82 | static const char *const tps6594_wkup2_func_group_names[] = { |
83 | "GPIO0" , "GPIO1" , "GPIO2" , "GPIO3" , "GPIO4" , "GPIO5" , |
84 | "GPIO6" , "GPIO7" , "GPIO8" , "GPIO9" , "GPIO10" , |
85 | }; |
86 | |
87 | static const char *const tps6594_scl_i2c2_cs_spi_func_group_names[] = { |
88 | "GPIO0" , |
89 | "GPIO1" , |
90 | }; |
91 | |
92 | static const char *const tps6594_nrstout_soc_func_group_names[] = { |
93 | "GPIO0" , |
94 | "GPIO10" , |
95 | }; |
96 | |
97 | static const char *const tps6594_trig_wdog_func_group_names[] = { |
98 | "GPIO1" , |
99 | "GPIO10" , |
100 | }; |
101 | |
102 | static const char *const tps6594_sda_i2c2_sdo_spi_func_group_names[] = { |
103 | "GPIO1" , |
104 | }; |
105 | |
106 | static const char *const tps6594_clk32kout_func_group_names[] = { |
107 | "GPIO2" , |
108 | "GPIO3" , |
109 | "GPIO7" , |
110 | }; |
111 | |
112 | static const char *const tps6594_nerr_soc_func_group_names[] = { |
113 | "GPIO2" , |
114 | }; |
115 | |
116 | static const char *const tps6594_sclk_spmi_func_group_names[] = { |
117 | "GPIO4" , |
118 | }; |
119 | |
120 | static const char *const tps6594_sdata_spmi_func_group_names[] = { |
121 | "GPIO5" , |
122 | }; |
123 | |
124 | static const char *const tps6594_nerr_mcu_func_group_names[] = { |
125 | "GPIO6" , |
126 | }; |
127 | |
128 | static const char *const tps6594_syncclkout_func_group_names[] = { |
129 | "GPIO7" , |
130 | "GPIO9" , |
131 | }; |
132 | |
133 | static const char *const tps6594_disable_wdog_func_group_names[] = { |
134 | "GPIO7" , |
135 | "GPIO8" , |
136 | }; |
137 | |
138 | static const char *const tps6594_pdog_func_group_names[] = { |
139 | "GPIO8" , |
140 | }; |
141 | |
142 | static const char *const tps6594_syncclkin_func_group_names[] = { |
143 | "GPIO9" , |
144 | }; |
145 | |
146 | struct tps6594_pinctrl_function { |
147 | struct pinfunction pinfunction; |
148 | u8 muxval; |
149 | }; |
150 | |
151 | static const struct tps6594_pinctrl_function pinctrl_functions[] = { |
152 | FUNCTION(gpio, TPS6594_PINCTRL_GPIO_FUNCTION), |
153 | FUNCTION(nsleep1, TPS6594_PINCTRL_NSLEEP1_FUNCTION), |
154 | FUNCTION(nsleep2, TPS6594_PINCTRL_NSLEEP2_FUNCTION), |
155 | FUNCTION(wkup1, TPS6594_PINCTRL_WKUP1_FUNCTION), |
156 | FUNCTION(wkup2, TPS6594_PINCTRL_WKUP2_FUNCTION), |
157 | FUNCTION(scl_i2c2_cs_spi, TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION), |
158 | FUNCTION(nrstout_soc, TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION), |
159 | FUNCTION(trig_wdog, TPS6594_PINCTRL_TRIG_WDOG_FUNCTION), |
160 | FUNCTION(sda_i2c2_sdo_spi, TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION), |
161 | FUNCTION(clk32kout, TPS6594_PINCTRL_CLK32KOUT_FUNCTION), |
162 | FUNCTION(nerr_soc, TPS6594_PINCTRL_NERR_SOC_FUNCTION), |
163 | FUNCTION(sclk_spmi, TPS6594_PINCTRL_SCLK_SPMI_FUNCTION), |
164 | FUNCTION(sdata_spmi, TPS6594_PINCTRL_SDATA_SPMI_FUNCTION), |
165 | FUNCTION(nerr_mcu, TPS6594_PINCTRL_NERR_MCU_FUNCTION), |
166 | FUNCTION(syncclkout, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION), |
167 | FUNCTION(disable_wdog, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION), |
168 | FUNCTION(pdog, TPS6594_PINCTRL_PDOG_FUNCTION), |
169 | FUNCTION(syncclkin, TPS6594_PINCTRL_SYNCCLKIN_FUNCTION), |
170 | }; |
171 | |
172 | struct tps6594_pinctrl { |
173 | struct tps6594 *tps; |
174 | struct gpio_regmap *gpio_regmap; |
175 | struct pinctrl_dev *pctl_dev; |
176 | const struct tps6594_pinctrl_function *funcs; |
177 | const struct pinctrl_pin_desc *pins; |
178 | }; |
179 | |
180 | static int tps6594_gpio_regmap_xlate(struct gpio_regmap *gpio, |
181 | unsigned int base, unsigned int offset, |
182 | unsigned int *reg, unsigned int *mask) |
183 | { |
184 | unsigned int line = offset % 8; |
185 | unsigned int stride = offset / 8; |
186 | |
187 | switch (base) { |
188 | case TPS6594_REG_GPIOX_CONF(0): |
189 | *reg = TPS6594_REG_GPIOX_CONF(offset); |
190 | *mask = TPS6594_BIT_GPIO_DIR; |
191 | return 0; |
192 | case TPS6594_REG_GPIO_IN_1: |
193 | case TPS6594_REG_GPIO_OUT_1: |
194 | *reg = base + stride; |
195 | *mask = BIT(line); |
196 | return 0; |
197 | default: |
198 | return -EINVAL; |
199 | } |
200 | } |
201 | |
202 | static int tps6594_pmx_func_cnt(struct pinctrl_dev *pctldev) |
203 | { |
204 | return ARRAY_SIZE(pinctrl_functions); |
205 | } |
206 | |
207 | static const char *tps6594_pmx_func_name(struct pinctrl_dev *pctldev, |
208 | unsigned int selector) |
209 | { |
210 | struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); |
211 | |
212 | return pinctrl->funcs[selector].pinfunction.name; |
213 | } |
214 | |
215 | static int tps6594_pmx_func_groups(struct pinctrl_dev *pctldev, |
216 | unsigned int selector, |
217 | const char *const **groups, |
218 | unsigned int *num_groups) |
219 | { |
220 | struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); |
221 | |
222 | *groups = pinctrl->funcs[selector].pinfunction.groups; |
223 | *num_groups = pinctrl->funcs[selector].pinfunction.ngroups; |
224 | |
225 | return 0; |
226 | } |
227 | |
228 | static int tps6594_pmx_set(struct tps6594_pinctrl *pinctrl, unsigned int pin, |
229 | u8 muxval) |
230 | { |
231 | u8 mux_sel_val = muxval << TPS6594_OFFSET_GPIO_SEL; |
232 | |
233 | return regmap_update_bits(map: pinctrl->tps->regmap, |
234 | TPS6594_REG_GPIOX_CONF(pin), |
235 | TPS6594_MASK_GPIO_SEL, val: mux_sel_val); |
236 | } |
237 | |
238 | static int tps6594_pmx_set_mux(struct pinctrl_dev *pctldev, |
239 | unsigned int function, unsigned int group) |
240 | { |
241 | struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); |
242 | u8 muxval = pinctrl->funcs[function].muxval; |
243 | |
244 | /* Some pins don't have the same muxval for the same function... */ |
245 | if (group == 8) { |
246 | if (muxval == TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION) |
247 | muxval = TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8; |
248 | else if (muxval == TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION) |
249 | muxval = TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8; |
250 | } else if (group == 9) { |
251 | if (muxval == TPS6594_PINCTRL_CLK32KOUT_FUNCTION) |
252 | muxval = TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9; |
253 | } |
254 | |
255 | return tps6594_pmx_set(pinctrl, pin: group, muxval); |
256 | } |
257 | |
258 | static int tps6594_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, |
259 | struct pinctrl_gpio_range *range, |
260 | unsigned int offset, bool input) |
261 | { |
262 | struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); |
263 | u8 muxval = pinctrl->funcs[TPS6594_PINCTRL_GPIO_FUNCTION].muxval; |
264 | |
265 | return tps6594_pmx_set(pinctrl, pin: offset, muxval); |
266 | } |
267 | |
268 | static const struct pinmux_ops tps6594_pmx_ops = { |
269 | .get_functions_count = tps6594_pmx_func_cnt, |
270 | .get_function_name = tps6594_pmx_func_name, |
271 | .get_function_groups = tps6594_pmx_func_groups, |
272 | .set_mux = tps6594_pmx_set_mux, |
273 | .gpio_set_direction = tps6594_pmx_gpio_set_direction, |
274 | .strict = true, |
275 | }; |
276 | |
277 | static int tps6594_groups_cnt(struct pinctrl_dev *pctldev) |
278 | { |
279 | return ARRAY_SIZE(tps6594_pins); |
280 | } |
281 | |
282 | static int tps6594_group_pins(struct pinctrl_dev *pctldev, |
283 | unsigned int selector, const unsigned int **pins, |
284 | unsigned int *num_pins) |
285 | { |
286 | struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); |
287 | |
288 | *pins = &pinctrl->pins[selector].number; |
289 | *num_pins = 1; |
290 | |
291 | return 0; |
292 | } |
293 | |
294 | static const char *tps6594_group_name(struct pinctrl_dev *pctldev, |
295 | unsigned int selector) |
296 | { |
297 | struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); |
298 | |
299 | return pinctrl->pins[selector].name; |
300 | } |
301 | |
302 | static const struct pinctrl_ops tps6594_pctrl_ops = { |
303 | .dt_node_to_map = pinconf_generic_dt_node_to_map_group, |
304 | .dt_free_map = pinconf_generic_dt_free_map, |
305 | .get_groups_count = tps6594_groups_cnt, |
306 | .get_group_name = tps6594_group_name, |
307 | .get_group_pins = tps6594_group_pins, |
308 | }; |
309 | |
310 | static int tps6594_pinctrl_probe(struct platform_device *pdev) |
311 | { |
312 | struct tps6594 *tps = dev_get_drvdata(dev: pdev->dev.parent); |
313 | struct device *dev = &pdev->dev; |
314 | struct tps6594_pinctrl *pinctrl; |
315 | struct pinctrl_desc *pctrl_desc; |
316 | struct gpio_regmap_config config = {}; |
317 | |
318 | pctrl_desc = devm_kzalloc(dev, size: sizeof(*pctrl_desc), GFP_KERNEL); |
319 | if (!pctrl_desc) |
320 | return -ENOMEM; |
321 | pctrl_desc->name = dev_name(dev); |
322 | pctrl_desc->owner = THIS_MODULE; |
323 | pctrl_desc->pins = tps6594_pins; |
324 | pctrl_desc->npins = ARRAY_SIZE(tps6594_pins); |
325 | pctrl_desc->pctlops = &tps6594_pctrl_ops; |
326 | pctrl_desc->pmxops = &tps6594_pmx_ops; |
327 | |
328 | pinctrl = devm_kzalloc(dev, size: sizeof(*pinctrl), GFP_KERNEL); |
329 | if (!pinctrl) |
330 | return -ENOMEM; |
331 | pinctrl->tps = dev_get_drvdata(dev: dev->parent); |
332 | pinctrl->funcs = pinctrl_functions; |
333 | pinctrl->pins = tps6594_pins; |
334 | pinctrl->pctl_dev = devm_pinctrl_register(dev, pctldesc: pctrl_desc, driver_data: pinctrl); |
335 | if (IS_ERR(ptr: pinctrl->pctl_dev)) |
336 | return dev_err_probe(dev, err: PTR_ERR(ptr: pinctrl->pctl_dev), |
337 | fmt: "Couldn't register pinctrl driver\n" ); |
338 | |
339 | config.parent = tps->dev; |
340 | config.regmap = tps->regmap; |
341 | config.ngpio = TPS6594_PINCTRL_PINS_NB; |
342 | config.ngpio_per_reg = 8; |
343 | config.reg_dat_base = TPS6594_REG_GPIO_IN_1; |
344 | config.reg_set_base = TPS6594_REG_GPIO_OUT_1; |
345 | config.reg_dir_out_base = TPS6594_REG_GPIOX_CONF(0); |
346 | config.reg_mask_xlate = tps6594_gpio_regmap_xlate; |
347 | |
348 | pinctrl->gpio_regmap = devm_gpio_regmap_register(dev, config: &config); |
349 | if (IS_ERR(ptr: pinctrl->gpio_regmap)) |
350 | return dev_err_probe(dev, err: PTR_ERR(ptr: pinctrl->gpio_regmap), |
351 | fmt: "Couldn't register gpio_regmap driver\n" ); |
352 | |
353 | return 0; |
354 | } |
355 | |
356 | static const struct platform_device_id tps6594_pinctrl_id_table[] = { |
357 | { "tps6594-pinctrl" , }, |
358 | {} |
359 | }; |
360 | MODULE_DEVICE_TABLE(platform, tps6594_pinctrl_id_table); |
361 | |
362 | static struct platform_driver tps6594_pinctrl_driver = { |
363 | .probe = tps6594_pinctrl_probe, |
364 | .driver = { |
365 | .name = "tps6594-pinctrl" , |
366 | }, |
367 | .id_table = tps6594_pinctrl_id_table, |
368 | }; |
369 | module_platform_driver(tps6594_pinctrl_driver); |
370 | |
371 | MODULE_AUTHOR("Esteban Blanc <eblanc@baylibre.com>" ); |
372 | MODULE_DESCRIPTION("TPS6594 pinctrl and GPIO driver" ); |
373 | MODULE_LICENSE("GPL" ); |
374 | |