1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Fence mechanism for dma-buf to allow for asynchronous dma access |
4 | * |
5 | * Copyright (C) 2012 Canonical Ltd |
6 | * Copyright (C) 2012 Texas Instruments |
7 | * |
8 | * Authors: |
9 | * Rob Clark <robdclark@gmail.com> |
10 | * Maarten Lankhorst <maarten.lankhorst@canonical.com> |
11 | */ |
12 | |
13 | #ifndef __LINUX_DMA_FENCE_H |
14 | #define __LINUX_DMA_FENCE_H |
15 | |
16 | #include <linux/err.h> |
17 | #include <linux/wait.h> |
18 | #include <linux/list.h> |
19 | #include <linux/bitops.h> |
20 | #include <linux/kref.h> |
21 | #include <linux/sched.h> |
22 | #include <linux/printk.h> |
23 | #include <linux/rcupdate.h> |
24 | #include <linux/timekeeping.h> |
25 | |
26 | struct dma_fence; |
27 | struct dma_fence_ops; |
28 | struct dma_fence_cb; |
29 | |
30 | /** |
31 | * struct dma_fence - software synchronization primitive |
32 | * @refcount: refcount for this fence |
33 | * @ops: dma_fence_ops associated with this fence |
34 | * @rcu: used for releasing fence with kfree_rcu |
35 | * @cb_list: list of all callbacks to call |
36 | * @lock: spin_lock_irqsave used for locking |
37 | * @context: execution context this fence belongs to, returned by |
38 | * dma_fence_context_alloc() |
39 | * @seqno: the sequence number of this fence inside the execution context, |
40 | * can be compared to decide which fence would be signaled later. |
41 | * @flags: A mask of DMA_FENCE_FLAG_* defined below |
42 | * @timestamp: Timestamp when the fence was signaled. |
43 | * @error: Optional, only valid if < 0, must be set before calling |
44 | * dma_fence_signal, indicates that the fence has completed with an error. |
45 | * |
46 | * the flags member must be manipulated and read using the appropriate |
47 | * atomic ops (bit_*), so taking the spinlock will not be needed most |
48 | * of the time. |
49 | * |
50 | * DMA_FENCE_FLAG_SIGNALED_BIT - fence is already signaled |
51 | * DMA_FENCE_FLAG_TIMESTAMP_BIT - timestamp recorded for fence signaling |
52 | * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT - enable_signaling might have been called |
53 | * DMA_FENCE_FLAG_USER_BITS - start of the unused bits, can be used by the |
54 | * implementer of the fence for its own purposes. Can be used in different |
55 | * ways by different fence implementers, so do not rely on this. |
56 | * |
57 | * Since atomic bitops are used, this is not guaranteed to be the case. |
58 | * Particularly, if the bit was set, but dma_fence_signal was called right |
59 | * before this bit was set, it would have been able to set the |
60 | * DMA_FENCE_FLAG_SIGNALED_BIT, before enable_signaling was called. |
61 | * Adding a check for DMA_FENCE_FLAG_SIGNALED_BIT after setting |
62 | * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT closes this race, and makes sure that |
63 | * after dma_fence_signal was called, any enable_signaling call will have either |
64 | * been completed, or never called at all. |
65 | */ |
66 | struct dma_fence { |
67 | spinlock_t *lock; |
68 | const struct dma_fence_ops *ops; |
69 | /* |
70 | * We clear the callback list on kref_put so that by the time we |
71 | * release the fence it is unused. No one should be adding to the |
72 | * cb_list that they don't themselves hold a reference for. |
73 | * |
74 | * The lifetime of the timestamp is similarly tied to both the |
75 | * rcu freelist and the cb_list. The timestamp is only set upon |
76 | * signaling while simultaneously notifying the cb_list. Ergo, we |
77 | * only use either the cb_list of timestamp. Upon destruction, |
78 | * neither are accessible, and so we can use the rcu. This means |
79 | * that the cb_list is *only* valid until the signal bit is set, |
80 | * and to read either you *must* hold a reference to the fence, |
81 | * and not just the rcu_read_lock. |
82 | * |
83 | * Listed in chronological order. |
84 | */ |
85 | union { |
86 | struct list_head cb_list; |
87 | /* @cb_list replaced by @timestamp on dma_fence_signal() */ |
88 | ktime_t timestamp; |
89 | /* @timestamp replaced by @rcu on dma_fence_release() */ |
90 | struct rcu_head rcu; |
91 | }; |
92 | u64 context; |
93 | u64 seqno; |
94 | unsigned long flags; |
95 | struct kref refcount; |
96 | int error; |
97 | }; |
98 | |
99 | enum dma_fence_flag_bits { |
100 | DMA_FENCE_FLAG_SIGNALED_BIT, |
101 | DMA_FENCE_FLAG_TIMESTAMP_BIT, |
102 | DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, |
103 | DMA_FENCE_FLAG_USER_BITS, /* must always be last member */ |
104 | }; |
105 | |
106 | typedef void (*dma_fence_func_t)(struct dma_fence *fence, |
107 | struct dma_fence_cb *cb); |
108 | |
109 | /** |
110 | * struct dma_fence_cb - callback for dma_fence_add_callback() |
111 | * @node: used by dma_fence_add_callback() to append this struct to fence::cb_list |
112 | * @func: dma_fence_func_t to call |
113 | * |
114 | * This struct will be initialized by dma_fence_add_callback(), additional |
115 | * data can be passed along by embedding dma_fence_cb in another struct. |
116 | */ |
117 | struct dma_fence_cb { |
118 | struct list_head node; |
119 | dma_fence_func_t func; |
120 | }; |
121 | |
122 | /** |
123 | * struct dma_fence_ops - operations implemented for fence |
124 | * |
125 | */ |
126 | struct dma_fence_ops { |
127 | /** |
128 | * @use_64bit_seqno: |
129 | * |
130 | * True if this dma_fence implementation uses 64bit seqno, false |
131 | * otherwise. |
132 | */ |
133 | bool use_64bit_seqno; |
134 | |
135 | /** |
136 | * @get_driver_name: |
137 | * |
138 | * Returns the driver name. This is a callback to allow drivers to |
139 | * compute the name at runtime, without having it to store permanently |
140 | * for each fence, or build a cache of some sort. |
141 | * |
142 | * This callback is mandatory. |
143 | */ |
144 | const char * (*get_driver_name)(struct dma_fence *fence); |
145 | |
146 | /** |
147 | * @get_timeline_name: |
148 | * |
149 | * Return the name of the context this fence belongs to. This is a |
150 | * callback to allow drivers to compute the name at runtime, without |
151 | * having it to store permanently for each fence, or build a cache of |
152 | * some sort. |
153 | * |
154 | * This callback is mandatory. |
155 | */ |
156 | const char * (*get_timeline_name)(struct dma_fence *fence); |
157 | |
158 | /** |
159 | * @enable_signaling: |
160 | * |
161 | * Enable software signaling of fence. |
162 | * |
163 | * For fence implementations that have the capability for hw->hw |
164 | * signaling, they can implement this op to enable the necessary |
165 | * interrupts, or insert commands into cmdstream, etc, to avoid these |
166 | * costly operations for the common case where only hw->hw |
167 | * synchronization is required. This is called in the first |
168 | * dma_fence_wait() or dma_fence_add_callback() path to let the fence |
169 | * implementation know that there is another driver waiting on the |
170 | * signal (ie. hw->sw case). |
171 | * |
172 | * This function can be called from atomic context, but not |
173 | * from irq context, so normal spinlocks can be used. |
174 | * |
175 | * A return value of false indicates the fence already passed, |
176 | * or some failure occurred that made it impossible to enable |
177 | * signaling. True indicates successful enabling. |
178 | * |
179 | * &dma_fence.error may be set in enable_signaling, but only when false |
180 | * is returned. |
181 | * |
182 | * Since many implementations can call dma_fence_signal() even when before |
183 | * @enable_signaling has been called there's a race window, where the |
184 | * dma_fence_signal() might result in the final fence reference being |
185 | * released and its memory freed. To avoid this, implementations of this |
186 | * callback should grab their own reference using dma_fence_get(), to be |
187 | * released when the fence is signalled (through e.g. the interrupt |
188 | * handler). |
189 | * |
190 | * This callback is optional. If this callback is not present, then the |
191 | * driver must always have signaling enabled. |
192 | */ |
193 | bool (*enable_signaling)(struct dma_fence *fence); |
194 | |
195 | /** |
196 | * @signaled: |
197 | * |
198 | * Peek whether the fence is signaled, as a fastpath optimization for |
199 | * e.g. dma_fence_wait() or dma_fence_add_callback(). Note that this |
200 | * callback does not need to make any guarantees beyond that a fence |
201 | * once indicates as signalled must always return true from this |
202 | * callback. This callback may return false even if the fence has |
203 | * completed already, in this case information hasn't propogated throug |
204 | * the system yet. See also dma_fence_is_signaled(). |
205 | * |
206 | * May set &dma_fence.error if returning true. |
207 | * |
208 | * This callback is optional. |
209 | */ |
210 | bool (*signaled)(struct dma_fence *fence); |
211 | |
212 | /** |
213 | * @wait: |
214 | * |
215 | * Custom wait implementation, defaults to dma_fence_default_wait() if |
216 | * not set. |
217 | * |
218 | * Deprecated and should not be used by new implementations. Only used |
219 | * by existing implementations which need special handling for their |
220 | * hardware reset procedure. |
221 | * |
222 | * Must return -ERESTARTSYS if the wait is intr = true and the wait was |
223 | * interrupted, and remaining jiffies if fence has signaled, or 0 if wait |
224 | * timed out. Can also return other error values on custom implementations, |
225 | * which should be treated as if the fence is signaled. For example a hardware |
226 | * lockup could be reported like that. |
227 | */ |
228 | signed long (*wait)(struct dma_fence *fence, |
229 | bool intr, signed long timeout); |
230 | |
231 | /** |
232 | * @release: |
233 | * |
234 | * Called on destruction of fence to release additional resources. |
235 | * Can be called from irq context. This callback is optional. If it is |
236 | * NULL, then dma_fence_free() is instead called as the default |
237 | * implementation. |
238 | */ |
239 | void (*release)(struct dma_fence *fence); |
240 | |
241 | /** |
242 | * @fence_value_str: |
243 | * |
244 | * Callback to fill in free-form debug info specific to this fence, like |
245 | * the sequence number. |
246 | * |
247 | * This callback is optional. |
248 | */ |
249 | void (*fence_value_str)(struct dma_fence *fence, char *str, int size); |
250 | |
251 | /** |
252 | * @timeline_value_str: |
253 | * |
254 | * Fills in the current value of the timeline as a string, like the |
255 | * sequence number. Note that the specific fence passed to this function |
256 | * should not matter, drivers should only use it to look up the |
257 | * corresponding timeline structures. |
258 | */ |
259 | void (*timeline_value_str)(struct dma_fence *fence, |
260 | char *str, int size); |
261 | |
262 | /** |
263 | * @set_deadline: |
264 | * |
265 | * Callback to allow a fence waiter to inform the fence signaler of |
266 | * an upcoming deadline, such as vblank, by which point the waiter |
267 | * would prefer the fence to be signaled by. This is intended to |
268 | * give feedback to the fence signaler to aid in power management |
269 | * decisions, such as boosting GPU frequency. |
270 | * |
271 | * This is called without &dma_fence.lock held, it can be called |
272 | * multiple times and from any context. Locking is up to the callee |
273 | * if it has some state to manage. If multiple deadlines are set, |
274 | * the expectation is to track the soonest one. If the deadline is |
275 | * before the current time, it should be interpreted as an immediate |
276 | * deadline. |
277 | * |
278 | * This callback is optional. |
279 | */ |
280 | void (*set_deadline)(struct dma_fence *fence, ktime_t deadline); |
281 | }; |
282 | |
283 | void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, |
284 | spinlock_t *lock, u64 context, u64 seqno); |
285 | |
286 | void dma_fence_release(struct kref *kref); |
287 | void dma_fence_free(struct dma_fence *fence); |
288 | void dma_fence_describe(struct dma_fence *fence, struct seq_file *seq); |
289 | |
290 | /** |
291 | * dma_fence_put - decreases refcount of the fence |
292 | * @fence: fence to reduce refcount of |
293 | */ |
294 | static inline void dma_fence_put(struct dma_fence *fence) |
295 | { |
296 | if (fence) |
297 | kref_put(kref: &fence->refcount, release: dma_fence_release); |
298 | } |
299 | |
300 | /** |
301 | * dma_fence_get - increases refcount of the fence |
302 | * @fence: fence to increase refcount of |
303 | * |
304 | * Returns the same fence, with refcount increased by 1. |
305 | */ |
306 | static inline struct dma_fence *dma_fence_get(struct dma_fence *fence) |
307 | { |
308 | if (fence) |
309 | kref_get(kref: &fence->refcount); |
310 | return fence; |
311 | } |
312 | |
313 | /** |
314 | * dma_fence_get_rcu - get a fence from a dma_resv_list with |
315 | * rcu read lock |
316 | * @fence: fence to increase refcount of |
317 | * |
318 | * Function returns NULL if no refcount could be obtained, or the fence. |
319 | */ |
320 | static inline struct dma_fence *dma_fence_get_rcu(struct dma_fence *fence) |
321 | { |
322 | if (kref_get_unless_zero(kref: &fence->refcount)) |
323 | return fence; |
324 | else |
325 | return NULL; |
326 | } |
327 | |
328 | /** |
329 | * dma_fence_get_rcu_safe - acquire a reference to an RCU tracked fence |
330 | * @fencep: pointer to fence to increase refcount of |
331 | * |
332 | * Function returns NULL if no refcount could be obtained, or the fence. |
333 | * This function handles acquiring a reference to a fence that may be |
334 | * reallocated within the RCU grace period (such as with SLAB_TYPESAFE_BY_RCU), |
335 | * so long as the caller is using RCU on the pointer to the fence. |
336 | * |
337 | * An alternative mechanism is to employ a seqlock to protect a bunch of |
338 | * fences, such as used by struct dma_resv. When using a seqlock, |
339 | * the seqlock must be taken before and checked after a reference to the |
340 | * fence is acquired (as shown here). |
341 | * |
342 | * The caller is required to hold the RCU read lock. |
343 | */ |
344 | static inline struct dma_fence * |
345 | dma_fence_get_rcu_safe(struct dma_fence __rcu **fencep) |
346 | { |
347 | do { |
348 | struct dma_fence *fence; |
349 | |
350 | fence = rcu_dereference(*fencep); |
351 | if (!fence) |
352 | return NULL; |
353 | |
354 | if (!dma_fence_get_rcu(fence)) |
355 | continue; |
356 | |
357 | /* The atomic_inc_not_zero() inside dma_fence_get_rcu() |
358 | * provides a full memory barrier upon success (such as now). |
359 | * This is paired with the write barrier from assigning |
360 | * to the __rcu protected fence pointer so that if that |
361 | * pointer still matches the current fence, we know we |
362 | * have successfully acquire a reference to it. If it no |
363 | * longer matches, we are holding a reference to some other |
364 | * reallocated pointer. This is possible if the allocator |
365 | * is using a freelist like SLAB_TYPESAFE_BY_RCU where the |
366 | * fence remains valid for the RCU grace period, but it |
367 | * may be reallocated. When using such allocators, we are |
368 | * responsible for ensuring the reference we get is to |
369 | * the right fence, as below. |
370 | */ |
371 | if (fence == rcu_access_pointer(*fencep)) |
372 | return rcu_pointer_handoff(fence); |
373 | |
374 | dma_fence_put(fence); |
375 | } while (1); |
376 | } |
377 | |
378 | #ifdef CONFIG_LOCKDEP |
379 | bool dma_fence_begin_signalling(void); |
380 | void dma_fence_end_signalling(bool cookie); |
381 | void __dma_fence_might_wait(void); |
382 | #else |
383 | static inline bool dma_fence_begin_signalling(void) |
384 | { |
385 | return true; |
386 | } |
387 | static inline void dma_fence_end_signalling(bool cookie) {} |
388 | static inline void __dma_fence_might_wait(void) {} |
389 | #endif |
390 | |
391 | int dma_fence_signal(struct dma_fence *fence); |
392 | int dma_fence_signal_locked(struct dma_fence *fence); |
393 | int dma_fence_signal_timestamp(struct dma_fence *fence, ktime_t timestamp); |
394 | int dma_fence_signal_timestamp_locked(struct dma_fence *fence, |
395 | ktime_t timestamp); |
396 | signed long dma_fence_default_wait(struct dma_fence *fence, |
397 | bool intr, signed long timeout); |
398 | int dma_fence_add_callback(struct dma_fence *fence, |
399 | struct dma_fence_cb *cb, |
400 | dma_fence_func_t func); |
401 | bool dma_fence_remove_callback(struct dma_fence *fence, |
402 | struct dma_fence_cb *cb); |
403 | void dma_fence_enable_sw_signaling(struct dma_fence *fence); |
404 | |
405 | /** |
406 | * dma_fence_is_signaled_locked - Return an indication if the fence |
407 | * is signaled yet. |
408 | * @fence: the fence to check |
409 | * |
410 | * Returns true if the fence was already signaled, false if not. Since this |
411 | * function doesn't enable signaling, it is not guaranteed to ever return |
412 | * true if dma_fence_add_callback(), dma_fence_wait() or |
413 | * dma_fence_enable_sw_signaling() haven't been called before. |
414 | * |
415 | * This function requires &dma_fence.lock to be held. |
416 | * |
417 | * See also dma_fence_is_signaled(). |
418 | */ |
419 | static inline bool |
420 | dma_fence_is_signaled_locked(struct dma_fence *fence) |
421 | { |
422 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
423 | return true; |
424 | |
425 | if (fence->ops->signaled && fence->ops->signaled(fence)) { |
426 | dma_fence_signal_locked(fence); |
427 | return true; |
428 | } |
429 | |
430 | return false; |
431 | } |
432 | |
433 | /** |
434 | * dma_fence_is_signaled - Return an indication if the fence is signaled yet. |
435 | * @fence: the fence to check |
436 | * |
437 | * Returns true if the fence was already signaled, false if not. Since this |
438 | * function doesn't enable signaling, it is not guaranteed to ever return |
439 | * true if dma_fence_add_callback(), dma_fence_wait() or |
440 | * dma_fence_enable_sw_signaling() haven't been called before. |
441 | * |
442 | * It's recommended for seqno fences to call dma_fence_signal when the |
443 | * operation is complete, it makes it possible to prevent issues from |
444 | * wraparound between time of issue and time of use by checking the return |
445 | * value of this function before calling hardware-specific wait instructions. |
446 | * |
447 | * See also dma_fence_is_signaled_locked(). |
448 | */ |
449 | static inline bool |
450 | dma_fence_is_signaled(struct dma_fence *fence) |
451 | { |
452 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
453 | return true; |
454 | |
455 | if (fence->ops->signaled && fence->ops->signaled(fence)) { |
456 | dma_fence_signal(fence); |
457 | return true; |
458 | } |
459 | |
460 | return false; |
461 | } |
462 | |
463 | /** |
464 | * __dma_fence_is_later - return if f1 is chronologically later than f2 |
465 | * @f1: the first fence's seqno |
466 | * @f2: the second fence's seqno from the same context |
467 | * @ops: dma_fence_ops associated with the seqno |
468 | * |
469 | * Returns true if f1 is chronologically later than f2. Both fences must be |
470 | * from the same context, since a seqno is not common across contexts. |
471 | */ |
472 | static inline bool __dma_fence_is_later(u64 f1, u64 f2, |
473 | const struct dma_fence_ops *ops) |
474 | { |
475 | /* This is for backward compatibility with drivers which can only handle |
476 | * 32bit sequence numbers. Use a 64bit compare when the driver says to |
477 | * do so. |
478 | */ |
479 | if (ops->use_64bit_seqno) |
480 | return f1 > f2; |
481 | |
482 | return (int)(lower_32_bits(f1) - lower_32_bits(f2)) > 0; |
483 | } |
484 | |
485 | /** |
486 | * dma_fence_is_later - return if f1 is chronologically later than f2 |
487 | * @f1: the first fence from the same context |
488 | * @f2: the second fence from the same context |
489 | * |
490 | * Returns true if f1 is chronologically later than f2. Both fences must be |
491 | * from the same context, since a seqno is not re-used across contexts. |
492 | */ |
493 | static inline bool dma_fence_is_later(struct dma_fence *f1, |
494 | struct dma_fence *f2) |
495 | { |
496 | if (WARN_ON(f1->context != f2->context)) |
497 | return false; |
498 | |
499 | return __dma_fence_is_later(f1: f1->seqno, f2: f2->seqno, ops: f1->ops); |
500 | } |
501 | |
502 | /** |
503 | * dma_fence_is_later_or_same - return true if f1 is later or same as f2 |
504 | * @f1: the first fence from the same context |
505 | * @f2: the second fence from the same context |
506 | * |
507 | * Returns true if f1 is chronologically later than f2 or the same fence. Both |
508 | * fences must be from the same context, since a seqno is not re-used across |
509 | * contexts. |
510 | */ |
511 | static inline bool dma_fence_is_later_or_same(struct dma_fence *f1, |
512 | struct dma_fence *f2) |
513 | { |
514 | return f1 == f2 || dma_fence_is_later(f1, f2); |
515 | } |
516 | |
517 | /** |
518 | * dma_fence_later - return the chronologically later fence |
519 | * @f1: the first fence from the same context |
520 | * @f2: the second fence from the same context |
521 | * |
522 | * Returns NULL if both fences are signaled, otherwise the fence that would be |
523 | * signaled last. Both fences must be from the same context, since a seqno is |
524 | * not re-used across contexts. |
525 | */ |
526 | static inline struct dma_fence *dma_fence_later(struct dma_fence *f1, |
527 | struct dma_fence *f2) |
528 | { |
529 | if (WARN_ON(f1->context != f2->context)) |
530 | return NULL; |
531 | |
532 | /* |
533 | * Can't check just DMA_FENCE_FLAG_SIGNALED_BIT here, it may never |
534 | * have been set if enable_signaling wasn't called, and enabling that |
535 | * here is overkill. |
536 | */ |
537 | if (dma_fence_is_later(f1, f2)) |
538 | return dma_fence_is_signaled(fence: f1) ? NULL : f1; |
539 | else |
540 | return dma_fence_is_signaled(fence: f2) ? NULL : f2; |
541 | } |
542 | |
543 | /** |
544 | * dma_fence_get_status_locked - returns the status upon completion |
545 | * @fence: the dma_fence to query |
546 | * |
547 | * Drivers can supply an optional error status condition before they signal |
548 | * the fence (to indicate whether the fence was completed due to an error |
549 | * rather than success). The value of the status condition is only valid |
550 | * if the fence has been signaled, dma_fence_get_status_locked() first checks |
551 | * the signal state before reporting the error status. |
552 | * |
553 | * Returns 0 if the fence has not yet been signaled, 1 if the fence has |
554 | * been signaled without an error condition, or a negative error code |
555 | * if the fence has been completed in err. |
556 | */ |
557 | static inline int dma_fence_get_status_locked(struct dma_fence *fence) |
558 | { |
559 | if (dma_fence_is_signaled_locked(fence)) |
560 | return fence->error ?: 1; |
561 | else |
562 | return 0; |
563 | } |
564 | |
565 | int dma_fence_get_status(struct dma_fence *fence); |
566 | |
567 | /** |
568 | * dma_fence_set_error - flag an error condition on the fence |
569 | * @fence: the dma_fence |
570 | * @error: the error to store |
571 | * |
572 | * Drivers can supply an optional error status condition before they signal |
573 | * the fence, to indicate that the fence was completed due to an error |
574 | * rather than success. This must be set before signaling (so that the value |
575 | * is visible before any waiters on the signal callback are woken). This |
576 | * helper exists to help catching erroneous setting of #dma_fence.error. |
577 | */ |
578 | static inline void dma_fence_set_error(struct dma_fence *fence, |
579 | int error) |
580 | { |
581 | WARN_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)); |
582 | WARN_ON(error >= 0 || error < -MAX_ERRNO); |
583 | |
584 | fence->error = error; |
585 | } |
586 | |
587 | /** |
588 | * dma_fence_timestamp - helper to get the completion timestamp of a fence |
589 | * @fence: fence to get the timestamp from. |
590 | * |
591 | * After a fence is signaled the timestamp is updated with the signaling time, |
592 | * but setting the timestamp can race with tasks waiting for the signaling. This |
593 | * helper busy waits for the correct timestamp to appear. |
594 | */ |
595 | static inline ktime_t dma_fence_timestamp(struct dma_fence *fence) |
596 | { |
597 | if (WARN_ON(!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))) |
598 | return ktime_get(); |
599 | |
600 | while (!test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags)) |
601 | cpu_relax(); |
602 | |
603 | return fence->timestamp; |
604 | } |
605 | |
606 | signed long dma_fence_wait_timeout(struct dma_fence *, |
607 | bool intr, signed long timeout); |
608 | signed long dma_fence_wait_any_timeout(struct dma_fence **fences, |
609 | uint32_t count, |
610 | bool intr, signed long timeout, |
611 | uint32_t *idx); |
612 | |
613 | /** |
614 | * dma_fence_wait - sleep until the fence gets signaled |
615 | * @fence: the fence to wait on |
616 | * @intr: if true, do an interruptible wait |
617 | * |
618 | * This function will return -ERESTARTSYS if interrupted by a signal, |
619 | * or 0 if the fence was signaled. Other error values may be |
620 | * returned on custom implementations. |
621 | * |
622 | * Performs a synchronous wait on this fence. It is assumed the caller |
623 | * directly or indirectly holds a reference to the fence, otherwise the |
624 | * fence might be freed before return, resulting in undefined behavior. |
625 | * |
626 | * See also dma_fence_wait_timeout() and dma_fence_wait_any_timeout(). |
627 | */ |
628 | static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr) |
629 | { |
630 | signed long ret; |
631 | |
632 | /* Since dma_fence_wait_timeout cannot timeout with |
633 | * MAX_SCHEDULE_TIMEOUT, only valid return values are |
634 | * -ERESTARTSYS and MAX_SCHEDULE_TIMEOUT. |
635 | */ |
636 | ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT); |
637 | |
638 | return ret < 0 ? ret : 0; |
639 | } |
640 | |
641 | void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline); |
642 | |
643 | struct dma_fence *dma_fence_get_stub(void); |
644 | struct dma_fence *dma_fence_allocate_private_stub(ktime_t timestamp); |
645 | u64 dma_fence_context_alloc(unsigned num); |
646 | |
647 | extern const struct dma_fence_ops dma_fence_array_ops; |
648 | extern const struct dma_fence_ops dma_fence_chain_ops; |
649 | |
650 | /** |
651 | * dma_fence_is_array - check if a fence is from the array subclass |
652 | * @fence: the fence to test |
653 | * |
654 | * Return true if it is a dma_fence_array and false otherwise. |
655 | */ |
656 | static inline bool dma_fence_is_array(struct dma_fence *fence) |
657 | { |
658 | return fence->ops == &dma_fence_array_ops; |
659 | } |
660 | |
661 | /** |
662 | * dma_fence_is_chain - check if a fence is from the chain subclass |
663 | * @fence: the fence to test |
664 | * |
665 | * Return true if it is a dma_fence_chain and false otherwise. |
666 | */ |
667 | static inline bool dma_fence_is_chain(struct dma_fence *fence) |
668 | { |
669 | return fence->ops == &dma_fence_chain_ops; |
670 | } |
671 | |
672 | /** |
673 | * dma_fence_is_container - check if a fence is a container for other fences |
674 | * @fence: the fence to test |
675 | * |
676 | * Return true if this fence is a container for other fences, false otherwise. |
677 | * This is important since we can't build up large fence structure or otherwise |
678 | * we run into recursion during operation on those fences. |
679 | */ |
680 | static inline bool dma_fence_is_container(struct dma_fence *fence) |
681 | { |
682 | return dma_fence_is_array(fence) || dma_fence_is_chain(fence); |
683 | } |
684 | |
685 | #define DMA_FENCE_WARN(f, fmt, args...) \ |
686 | do { \ |
687 | struct dma_fence *__ff = (f); \ |
688 | pr_warn("f %llu#%llu: " fmt, __ff->context, __ff->seqno,\ |
689 | ##args); \ |
690 | } while (0) |
691 | |
692 | #endif /* __LINUX_DMA_FENCE_H */ |
693 | |