1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Data types and headers for RAPL support
4 *
5 * Copyright (C) 2019 Intel Corporation.
6 *
7 * Author: Zhang Rui <rui.zhang@intel.com>
8 */
9
10#ifndef __INTEL_RAPL_H__
11#define __INTEL_RAPL_H__
12
13#include <linux/types.h>
14#include <linux/powercap.h>
15#include <linux/cpuhotplug.h>
16
17enum rapl_if_type {
18 RAPL_IF_MSR, /* RAPL I/F using MSR registers */
19 RAPL_IF_MMIO, /* RAPL I/F using MMIO registers */
20 RAPL_IF_TPMI, /* RAPL I/F using TPMI registers */
21};
22
23enum rapl_domain_type {
24 RAPL_DOMAIN_PACKAGE, /* entire package/socket */
25 RAPL_DOMAIN_PP0, /* core power plane */
26 RAPL_DOMAIN_PP1, /* graphics uncore */
27 RAPL_DOMAIN_DRAM, /* DRAM control_type */
28 RAPL_DOMAIN_PLATFORM, /* PSys control_type */
29 RAPL_DOMAIN_MAX,
30};
31
32enum rapl_domain_reg_id {
33 RAPL_DOMAIN_REG_LIMIT,
34 RAPL_DOMAIN_REG_STATUS,
35 RAPL_DOMAIN_REG_PERF,
36 RAPL_DOMAIN_REG_POLICY,
37 RAPL_DOMAIN_REG_INFO,
38 RAPL_DOMAIN_REG_PL4,
39 RAPL_DOMAIN_REG_UNIT,
40 RAPL_DOMAIN_REG_PL2,
41 RAPL_DOMAIN_REG_MAX,
42};
43
44struct rapl_domain;
45
46enum rapl_primitives {
47 POWER_LIMIT1,
48 POWER_LIMIT2,
49 POWER_LIMIT4,
50 ENERGY_COUNTER,
51 FW_LOCK,
52 FW_HIGH_LOCK,
53 PL1_LOCK,
54 PL2_LOCK,
55 PL4_LOCK,
56
57 PL1_ENABLE, /* power limit 1, aka long term */
58 PL1_CLAMP, /* allow frequency to go below OS request */
59 PL2_ENABLE, /* power limit 2, aka short term, instantaneous */
60 PL2_CLAMP,
61 PL4_ENABLE, /* power limit 4, aka max peak power */
62
63 TIME_WINDOW1, /* long term */
64 TIME_WINDOW2, /* short term */
65 THERMAL_SPEC_POWER,
66 MAX_POWER,
67
68 MIN_POWER,
69 MAX_TIME_WINDOW,
70 THROTTLED_TIME,
71 PRIORITY_LEVEL,
72
73 PSYS_POWER_LIMIT1,
74 PSYS_POWER_LIMIT2,
75 PSYS_PL1_ENABLE,
76 PSYS_PL2_ENABLE,
77 PSYS_TIME_WINDOW1,
78 PSYS_TIME_WINDOW2,
79 /* below are not raw primitive data */
80 AVERAGE_POWER,
81 NR_RAPL_PRIMITIVES,
82};
83
84struct rapl_domain_data {
85 u64 primitives[NR_RAPL_PRIMITIVES];
86 unsigned long timestamp;
87};
88
89#define NR_POWER_LIMITS (POWER_LIMIT4 + 1)
90
91struct rapl_power_limit {
92 struct powercap_zone_constraint *constraint;
93 struct rapl_domain *domain;
94 const char *name;
95 bool locked;
96 u64 last_power_limit;
97};
98
99struct rapl_package;
100
101#define RAPL_DOMAIN_NAME_LENGTH 16
102
103union rapl_reg {
104 void __iomem *mmio;
105 u32 msr;
106 u64 val;
107};
108
109struct rapl_domain {
110 char name[RAPL_DOMAIN_NAME_LENGTH];
111 enum rapl_domain_type id;
112 union rapl_reg regs[RAPL_DOMAIN_REG_MAX];
113 struct powercap_zone power_zone;
114 struct rapl_domain_data rdd;
115 struct rapl_power_limit rpl[NR_POWER_LIMITS];
116 u64 attr_map; /* track capabilities */
117 unsigned int state;
118 unsigned int power_unit;
119 unsigned int energy_unit;
120 unsigned int time_unit;
121 struct rapl_package *rp;
122};
123
124struct reg_action {
125 union rapl_reg reg;
126 u64 mask;
127 u64 value;
128 int err;
129};
130
131/**
132 * struct rapl_if_priv: private data for different RAPL interfaces
133 * @control_type: Each RAPL interface must have its own powercap
134 * control type.
135 * @platform_rapl_domain: Optional. Some RAPL interface may have platform
136 * level RAPL control.
137 * @pcap_rapl_online: CPU hotplug state for each RAPL interface.
138 * @reg_unit: Register for getting energy/power/time unit.
139 * @regs: Register sets for different RAPL Domains.
140 * @limits: Number of power limits supported by each domain.
141 * @read_raw: Callback for reading RAPL interface specific
142 * registers.
143 * @write_raw: Callback for writing RAPL interface specific
144 * registers.
145 * @defaults: internal pointer to interface default settings
146 * @rpi: internal pointer to interface primitive info
147 */
148struct rapl_if_priv {
149 enum rapl_if_type type;
150 struct powercap_control_type *control_type;
151 enum cpuhp_state pcap_rapl_online;
152 union rapl_reg reg_unit;
153 union rapl_reg regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
154 int limits[RAPL_DOMAIN_MAX];
155 int (*read_raw)(int id, struct reg_action *ra);
156 int (*write_raw)(int id, struct reg_action *ra);
157 void *defaults;
158 void *rpi;
159};
160
161/* maximum rapl package domain name: package-%d-die-%d */
162#define PACKAGE_DOMAIN_NAME_LENGTH 30
163
164struct rapl_package {
165 unsigned int id; /* logical die id, equals physical 1-die systems */
166 unsigned int nr_domains;
167 unsigned long domain_map; /* bit map of active domains */
168 struct rapl_domain *domains; /* array of domains, sized at runtime */
169 struct powercap_zone *power_zone; /* keep track of parent zone */
170 unsigned long power_limit_irq; /* keep track of package power limit
171 * notify interrupt enable status.
172 */
173 struct list_head plist;
174 int lead_cpu; /* one active cpu per package for access */
175 /* Track active cpus */
176 struct cpumask cpumask;
177 char name[PACKAGE_DOMAIN_NAME_LENGTH];
178 struct rapl_if_priv *priv;
179};
180
181struct rapl_package *rapl_find_package_domain_cpuslocked(int id, struct rapl_if_priv *priv,
182 bool id_is_cpu);
183struct rapl_package *rapl_add_package_cpuslocked(int id, struct rapl_if_priv *priv,
184 bool id_is_cpu);
185void rapl_remove_package_cpuslocked(struct rapl_package *rp);
186
187struct rapl_package *rapl_find_package_domain(int id, struct rapl_if_priv *priv, bool id_is_cpu);
188struct rapl_package *rapl_add_package(int id, struct rapl_if_priv *priv, bool id_is_cpu);
189void rapl_remove_package(struct rapl_package *rp);
190
191#endif /* __INTEL_RAPL_H__ */
192

source code of linux/include/linux/intel_rapl.h