1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Functions to access LP873X power management chip. |
4 | * |
5 | * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ |
6 | */ |
7 | |
8 | #ifndef __LINUX_MFD_LP873X_H |
9 | #define __LINUX_MFD_LP873X_H |
10 | |
11 | #include <linux/i2c.h> |
12 | #include <linux/regulator/driver.h> |
13 | #include <linux/regulator/machine.h> |
14 | |
15 | /* LP873x chip id list */ |
16 | #define LP873X 0x00 |
17 | |
18 | /* All register addresses */ |
19 | #define LP873X_REG_DEV_REV 0X00 |
20 | #define LP873X_REG_OTP_REV 0X01 |
21 | #define LP873X_REG_BUCK0_CTRL_1 0X02 |
22 | #define LP873X_REG_BUCK0_CTRL_2 0X03 |
23 | #define LP873X_REG_BUCK1_CTRL_1 0X04 |
24 | #define LP873X_REG_BUCK1_CTRL_2 0X05 |
25 | #define LP873X_REG_BUCK0_VOUT 0X06 |
26 | #define LP873X_REG_BUCK1_VOUT 0X07 |
27 | #define LP873X_REG_LDO0_CTRL 0X08 |
28 | #define LP873X_REG_LDO1_CTRL 0X09 |
29 | #define LP873X_REG_LDO0_VOUT 0X0A |
30 | #define LP873X_REG_LDO1_VOUT 0X0B |
31 | #define LP873X_REG_BUCK0_DELAY 0X0C |
32 | #define LP873X_REG_BUCK1_DELAY 0X0D |
33 | #define LP873X_REG_LDO0_DELAY 0X0E |
34 | #define LP873X_REG_LDO1_DELAY 0X0F |
35 | #define LP873X_REG_GPO_DELAY 0X10 |
36 | #define LP873X_REG_GPO2_DELAY 0X11 |
37 | #define LP873X_REG_GPO_CTRL 0X12 |
38 | #define LP873X_REG_CONFIG 0X13 |
39 | #define LP873X_REG_PLL_CTRL 0X14 |
40 | #define LP873X_REG_PGOOD_CTRL1 0X15 |
41 | #define LP873X_REG_PGOOD_CTRL2 0X16 |
42 | #define LP873X_REG_PG_FAULT 0X17 |
43 | #define LP873X_REG_RESET 0X18 |
44 | #define LP873X_REG_INT_TOP_1 0X19 |
45 | #define LP873X_REG_INT_TOP_2 0X1A |
46 | #define LP873X_REG_INT_BUCK 0X1B |
47 | #define LP873X_REG_INT_LDO 0X1C |
48 | #define LP873X_REG_TOP_STAT 0X1D |
49 | #define LP873X_REG_BUCK_STAT 0X1E |
50 | #define LP873X_REG_LDO_STAT 0x1F |
51 | #define LP873X_REG_TOP_MASK_1 0x20 |
52 | #define LP873X_REG_TOP_MASK_2 0x21 |
53 | #define LP873X_REG_BUCK_MASK 0x22 |
54 | #define LP873X_REG_LDO_MASK 0x23 |
55 | #define LP873X_REG_SEL_I_LOAD 0x24 |
56 | #define LP873X_REG_I_LOAD_2 0x25 |
57 | #define LP873X_REG_I_LOAD_1 0x26 |
58 | |
59 | #define LP873X_REG_MAX LP873X_REG_I_LOAD_1 |
60 | |
61 | /* Register field definitions */ |
62 | #define LP873X_DEV_REV_DEV_ID 0xC0 |
63 | #define LP873X_DEV_REV_ALL_LAYER 0x30 |
64 | #define LP873X_DEV_REV_METAL_LAYER 0x0F |
65 | |
66 | #define LP873X_OTP_REV_OTP_ID 0xFF |
67 | |
68 | #define LP873X_BUCK0_CTRL_1_BUCK0_FPWM BIT(3) |
69 | #define LP873X_BUCK0_CTRL_1_BUCK0_RDIS_EN BIT(2) |
70 | #define LP873X_BUCK0_CTRL_1_BUCK0_EN_PIN_CTRL BIT(1) |
71 | #define LP873X_BUCK0_CTRL_1_BUCK0_EN BIT(0) |
72 | |
73 | #define LP873X_BUCK0_CTRL_2_BUCK0_ILIM 0x38 |
74 | #define LP873X_BUCK0_CTRL_2_BUCK0_SLEW_RATE 0x07 |
75 | |
76 | #define LP873X_BUCK1_CTRL_1_BUCK1_FPWM BIT(3) |
77 | #define LP873X_BUCK1_CTRL_1_BUCK1_RDIS_EN BIT(2) |
78 | #define LP873X_BUCK1_CTRL_1_BUCK1_EN_PIN_CTRL BIT(1) |
79 | #define LP873X_BUCK1_CTRL_1_BUCK1_EN BIT(0) |
80 | |
81 | #define LP873X_BUCK1_CTRL_2_BUCK1_ILIM 0x38 |
82 | #define LP873X_BUCK1_CTRL_2_BUCK1_SLEW_RATE 0x07 |
83 | |
84 | #define LP873X_BUCK0_VOUT_BUCK0_VSET 0xFF |
85 | |
86 | #define LP873X_BUCK1_VOUT_BUCK1_VSET 0xFF |
87 | |
88 | #define LP873X_LDO0_CTRL_LDO0_RDIS_EN BIT(2) |
89 | #define LP873X_LDO0_CTRL_LDO0_EN_PIN_CTRL BIT(1) |
90 | #define LP873X_LDO0_CTRL_LDO0_EN BIT(0) |
91 | |
92 | #define LP873X_LDO1_CTRL_LDO1_RDIS_EN BIT(2) |
93 | #define LP873X_LDO1_CTRL_LDO1_EN_PIN_CTRL BIT(1) |
94 | #define LP873X_LDO1_CTRL_LDO1_EN BIT(0) |
95 | |
96 | #define LP873X_LDO0_VOUT_LDO0_VSET 0x1F |
97 | |
98 | #define LP873X_LDO1_VOUT_LDO1_VSET 0x1F |
99 | |
100 | #define LP873X_BUCK0_DELAY_BUCK0_SD_DELAY 0xF0 |
101 | #define LP873X_BUCK0_DELAY_BUCK0_SU_DELAY 0x0F |
102 | |
103 | #define LP873X_BUCK1_DELAY_BUCK1_SD_DELAY 0xF0 |
104 | #define LP873X_BUCK1_DELAY_BUCK1_SU_DELAY 0x0F |
105 | |
106 | #define LP873X_LDO0_DELAY_LDO0_SD_DELAY 0xF0 |
107 | #define LP873X_LDO0_DELAY_LDO0_SU_DELAY 0x0F |
108 | |
109 | #define LP873X_LDO1_DELAY_LDO1_SD_DELAY 0xF0 |
110 | #define LP873X_LDO1_DELAY_LDO1_SU_DELAY 0x0F |
111 | |
112 | #define LP873X_GPO_DELAY_GPO_SD_DELAY 0xF0 |
113 | #define LP873X_GPO_DELAY_GPO_SU_DELAY 0x0F |
114 | |
115 | #define LP873X_GPO2_DELAY_GPO2_SD_DELAY 0xF0 |
116 | #define LP873X_GPO2_DELAY_GPO2_SU_DELAY 0x0F |
117 | |
118 | #define LP873X_GPO_CTRL_GPO2_OD BIT(6) |
119 | #define LP873X_GPO_CTRL_GPO2_EN_PIN_CTRL BIT(5) |
120 | #define LP873X_GPO_CTRL_GPO2_EN BIT(4) |
121 | #define LP873X_GPO_CTRL_GPO_OD BIT(2) |
122 | #define LP873X_GPO_CTRL_GPO_EN_PIN_CTRL BIT(1) |
123 | #define LP873X_GPO_CTRL_GPO_EN BIT(0) |
124 | |
125 | #define LP873X_CONFIG_SU_DELAY_SEL BIT(6) |
126 | #define LP873X_CONFIG_SD_DELAY_SEL BIT(5) |
127 | #define LP873X_CONFIG_CLKIN_PIN_SEL BIT(4) |
128 | #define LP873X_CONFIG_CLKIN_PD BIT(3) |
129 | #define LP873X_CONFIG_EN_PD BIT(2) |
130 | #define LP873X_CONFIG_TDIE_WARN_LEVEL BIT(1) |
131 | #define LP873X_EN_SPREAD_SPEC BIT(0) |
132 | |
133 | #define LP873X_PLL_CTRL_EN_PLL BIT(6) |
134 | #define LP873X_EXT_CLK_FREQ 0x1F |
135 | |
136 | #define LP873X_PGOOD_CTRL1_PGOOD_POL BIT(7) |
137 | #define LP873X_PGOOD_CTRL1_PGOOD_OD BIT(6) |
138 | #define LP873X_PGOOD_CTRL1_PGOOD_WINDOW_LDO BIT(5) |
139 | #define LP873X_PGOOD_CTRL1_PGOOD_WINDOWN_BUCK BIT(4) |
140 | #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_LDO1 BIT(3) |
141 | #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_LDO0 BIT(2) |
142 | #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_BUCK1 BIT(1) |
143 | #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_BUCK0 BIT(0) |
144 | |
145 | #define LP873X_PGOOD_CTRL2_EN_PGOOD_TWARN BIT(2) |
146 | #define LP873X_PGOOD_CTRL2_EN_PG_FAULT_GATE BIT(1) |
147 | #define LP873X_PGOOD_CTRL2_PGOOD_MODE BIT(0) |
148 | |
149 | #define LP873X_PG_FAULT_PG_FAULT_LDO1 BIT(3) |
150 | #define LP873X_PG_FAULT_PG_FAULT_LDO0 BIT(2) |
151 | #define LP873X_PG_FAULT_PG_FAULT_BUCK1 BIT(1) |
152 | #define LP873X_PG_FAULT_PG_FAULT_BUCK0 BIT(0) |
153 | |
154 | #define LP873X_RESET_SW_RESET BIT(0) |
155 | |
156 | #define LP873X_INT_TOP_1_PGOOD_INT BIT(7) |
157 | #define LP873X_INT_TOP_1_LDO_INT BIT(6) |
158 | #define LP873X_INT_TOP_1_BUCK_INT BIT(5) |
159 | #define LP873X_INT_TOP_1_SYNC_CLK_INT BIT(4) |
160 | #define LP873X_INT_TOP_1_TDIE_SD_INT BIT(3) |
161 | #define LP873X_INT_TOP_1_TDIE_WARN_INT BIT(2) |
162 | #define LP873X_INT_TOP_1_OVP_INT BIT(1) |
163 | #define LP873X_INT_TOP_1_I_MEAS_INT BIT(0) |
164 | |
165 | #define LP873X_INT_TOP_2_RESET_REG_INT BIT(0) |
166 | |
167 | #define LP873X_INT_BUCK_BUCK1_PG_INT BIT(6) |
168 | #define LP873X_INT_BUCK_BUCK1_SC_INT BIT(5) |
169 | #define LP873X_INT_BUCK_BUCK1_ILIM_INT BIT(4) |
170 | #define LP873X_INT_BUCK_BUCK0_PG_INT BIT(2) |
171 | #define LP873X_INT_BUCK_BUCK0_SC_INT BIT(1) |
172 | #define LP873X_INT_BUCK_BUCK0_ILIM_INT BIT(0) |
173 | |
174 | #define LP873X_INT_LDO_LDO1_PG_INT BIT(6) |
175 | #define LP873X_INT_LDO_LDO1_SC_INT BIT(5) |
176 | #define LP873X_INT_LDO_LDO1_ILIM_INT BIT(4) |
177 | #define LP873X_INT_LDO_LDO0_PG_INT BIT(2) |
178 | #define LP873X_INT_LDO_LDO0_SC_INT BIT(1) |
179 | #define LP873X_INT_LDO_LDO0_ILIM_INT BIT(0) |
180 | |
181 | #define LP873X_TOP_STAT_PGOOD_STAT BIT(7) |
182 | #define LP873X_TOP_STAT_SYNC_CLK_STAT BIT(4) |
183 | #define LP873X_TOP_STAT_TDIE_SD_STAT BIT(3) |
184 | #define LP873X_TOP_STAT_TDIE_WARN_STAT BIT(2) |
185 | #define LP873X_TOP_STAT_OVP_STAT BIT(1) |
186 | |
187 | #define LP873X_BUCK_STAT_BUCK1_STAT BIT(7) |
188 | #define LP873X_BUCK_STAT_BUCK1_PG_STAT BIT(6) |
189 | #define LP873X_BUCK_STAT_BUCK1_ILIM_STAT BIT(4) |
190 | #define LP873X_BUCK_STAT_BUCK0_STAT BIT(3) |
191 | #define LP873X_BUCK_STAT_BUCK0_PG_STAT BIT(2) |
192 | #define LP873X_BUCK_STAT_BUCK0_ILIM_STAT BIT(0) |
193 | |
194 | #define LP873X_LDO_STAT_LDO1_STAT BIT(7) |
195 | #define LP873X_LDO_STAT_LDO1_PG_STAT BIT(6) |
196 | #define LP873X_LDO_STAT_LDO1_ILIM_STAT BIT(4) |
197 | #define LP873X_LDO_STAT_LDO0_STAT BIT(3) |
198 | #define LP873X_LDO_STAT_LDO0_PG_STAT BIT(2) |
199 | #define LP873X_LDO_STAT_LDO0_ILIM_STAT BIT(0) |
200 | |
201 | #define LP873X_TOP_MASK_1_PGOOD_INT_MASK BIT(7) |
202 | #define LP873X_TOP_MASK_1_SYNC_CLK_MASK BIT(4) |
203 | #define LP873X_TOP_MASK_1_TDIE_WARN_MASK BIT(2) |
204 | #define LP873X_TOP_MASK_1_I_MEAS_MASK BIT(0) |
205 | |
206 | #define LP873X_TOP_MASK_2_RESET_REG_MASK BIT(0) |
207 | |
208 | #define LP873X_BUCK_MASK_BUCK1_PGF_MASK BIT(7) |
209 | #define LP873X_BUCK_MASK_BUCK1_PGR_MASK BIT(6) |
210 | #define LP873X_BUCK_MASK_BUCK1_ILIM_MASK BIT(4) |
211 | #define LP873X_BUCK_MASK_BUCK0_PGF_MASK BIT(3) |
212 | #define LP873X_BUCK_MASK_BUCK0_PGR_MASK BIT(2) |
213 | #define LP873X_BUCK_MASK_BUCK0_ILIM_MASK BIT(0) |
214 | |
215 | #define LP873X_LDO_MASK_LDO1_PGF_MASK BIT(7) |
216 | #define LP873X_LDO_MASK_LDO1_PGR_MASK BIT(6) |
217 | #define LP873X_LDO_MASK_LDO1_ILIM_MASK BIT(4) |
218 | #define LP873X_LDO_MASK_LDO0_PGF_MASK BIT(3) |
219 | #define LP873X_LDO_MASK_LDO0_PGR_MASK BIT(2) |
220 | #define LP873X_LDO_MASK_LDO0_ILIM_MASK BIT(0) |
221 | |
222 | #define LP873X_SEL_I_LOAD_CURRENT_BUCK_SELECT BIT(0) |
223 | |
224 | #define LP873X_I_LOAD_2_BUCK_LOAD_CURRENT BIT(0) |
225 | |
226 | #define LP873X_I_LOAD_1_BUCK_LOAD_CURRENT 0xFF |
227 | |
228 | #define LP873X_MAX_REG_ID LP873X_LDO_1 |
229 | |
230 | /* Number of step-down converters available */ |
231 | #define LP873X_NUM_BUCK 2 |
232 | /* Number of LDO voltage regulators available */ |
233 | #define LP873X_NUM_LDO 2 |
234 | /* Number of total regulators available */ |
235 | #define LP873X_NUM_REGULATOR (LP873X_NUM_BUCK + LP873X_NUM_LDO) |
236 | |
237 | enum lp873x_regulator_id { |
238 | /* BUCK's */ |
239 | LP873X_BUCK_0, |
240 | LP873X_BUCK_1, |
241 | /* LDOs */ |
242 | LP873X_LDO_0, |
243 | LP873X_LDO_1, |
244 | }; |
245 | |
246 | /** |
247 | * struct lp873x - state holder for the lp873x driver |
248 | * @dev: struct device pointer for MFD device |
249 | * @rev: revision of the lp873x |
250 | * @lock: lock guarding the data structure |
251 | * @regmap: register map of the lp873x PMIC |
252 | * |
253 | * Device data may be used to access the LP873X chip |
254 | */ |
255 | struct lp873x { |
256 | struct device *dev; |
257 | u8 rev; |
258 | struct regmap *regmap; |
259 | }; |
260 | #endif /* __LINUX_MFD_LP873X_H */ |
261 | |