| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* Copyright (C) 2017 Intel Corporation */ |
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| 3 | /* Functions to access TPS68470 power management chip. */ |
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| 4 | |
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| 5 | #ifndef __LINUX_MFD_TPS68470_H |
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| 6 | #define __LINUX_MFD_TPS68470_H |
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| 7 | |
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| 8 | /* Register addresses */ |
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| 9 | #define TPS68470_REG_POSTDIV2 0x06 |
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| 10 | #define TPS68470_REG_BOOSTDIV 0x07 |
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| 11 | #define TPS68470_REG_BUCKDIV 0x08 |
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| 12 | #define TPS68470_REG_PLLSWR 0x09 |
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| 13 | #define TPS68470_REG_XTALDIV 0x0A |
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| 14 | #define TPS68470_REG_PLLDIV 0x0B |
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| 15 | #define TPS68470_REG_POSTDIV 0x0C |
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| 16 | #define TPS68470_REG_PLLCTL 0x0D |
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| 17 | #define TPS68470_REG_PLLCTL2 0x0E |
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| 18 | #define TPS68470_REG_CLKCFG1 0x0F |
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| 19 | #define TPS68470_REG_CLKCFG2 0x10 |
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| 20 | #define TPS68470_REG_GPCTL0A 0x14 |
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| 21 | #define TPS68470_REG_GPCTL0B 0x15 |
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| 22 | #define TPS68470_REG_GPCTL1A 0x16 |
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| 23 | #define TPS68470_REG_GPCTL1B 0x17 |
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| 24 | #define TPS68470_REG_GPCTL2A 0x18 |
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| 25 | #define TPS68470_REG_GPCTL2B 0x19 |
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| 26 | #define TPS68470_REG_GPCTL3A 0x1A |
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| 27 | #define TPS68470_REG_GPCTL3B 0x1B |
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| 28 | #define TPS68470_REG_GPCTL4A 0x1C |
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| 29 | #define TPS68470_REG_GPCTL4B 0x1D |
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| 30 | #define TPS68470_REG_GPCTL5A 0x1E |
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| 31 | #define TPS68470_REG_GPCTL5B 0x1F |
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| 32 | #define TPS68470_REG_GPCTL6A 0x20 |
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| 33 | #define TPS68470_REG_GPCTL6B 0x21 |
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| 34 | #define TPS68470_REG_SGPO 0x22 |
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| 35 | #define TPS68470_REG_GPDI 0x26 |
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| 36 | #define TPS68470_REG_GPDO 0x27 |
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| 37 | #define TPS68470_REG_VCMVAL 0x3C |
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| 38 | #define TPS68470_REG_VAUX1VAL 0x3D |
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| 39 | #define TPS68470_REG_VAUX2VAL 0x3E |
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| 40 | #define TPS68470_REG_VIOVAL 0x3F |
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| 41 | #define TPS68470_REG_VSIOVAL 0x40 |
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| 42 | #define TPS68470_REG_VAVAL 0x41 |
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| 43 | #define TPS68470_REG_VDVAL 0x42 |
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| 44 | #define TPS68470_REG_S_I2C_CTL 0x43 |
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| 45 | #define TPS68470_REG_VCMCTL 0x44 |
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| 46 | #define TPS68470_REG_VAUX1CTL 0x45 |
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| 47 | #define TPS68470_REG_VAUX2CTL 0x46 |
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| 48 | #define TPS68470_REG_VACTL 0x47 |
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| 49 | #define TPS68470_REG_VDCTL 0x48 |
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| 50 | #define TPS68470_REG_RESET 0x50 |
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| 51 | #define TPS68470_REG_REVID 0xFF |
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| 52 | |
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| 53 | #define TPS68470_REG_MAX TPS68470_REG_REVID |
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| 54 | |
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| 55 | /* Register field definitions */ |
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| 56 | |
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| 57 | #define TPS68470_REG_RESET_MASK GENMASK(7, 0) |
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| 58 | #define TPS68470_VAVAL_AVOLT_MASK GENMASK(6, 0) |
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| 59 | |
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| 60 | #define TPS68470_VDVAL_DVOLT_MASK GENMASK(5, 0) |
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| 61 | #define TPS68470_VCMVAL_VCVOLT_MASK GENMASK(6, 0) |
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| 62 | #define TPS68470_VIOVAL_IOVOLT_MASK GENMASK(6, 0) |
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| 63 | #define TPS68470_VSIOVAL_IOVOLT_MASK GENMASK(6, 0) |
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| 64 | #define TPS68470_VAUX1VAL_AUX1VOLT_MASK GENMASK(6, 0) |
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| 65 | #define TPS68470_VAUX2VAL_AUX2VOLT_MASK GENMASK(6, 0) |
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| 66 | |
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| 67 | #define TPS68470_VACTL_EN_MASK GENMASK(0, 0) |
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| 68 | #define TPS68470_VDCTL_EN_MASK GENMASK(0, 0) |
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| 69 | #define TPS68470_VCMCTL_EN_MASK GENMASK(0, 0) |
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| 70 | #define TPS68470_S_I2C_CTL_EN_MASK GENMASK(1, 0) |
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| 71 | #define TPS68470_VAUX1CTL_EN_MASK GENMASK(0, 0) |
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| 72 | #define TPS68470_VAUX2CTL_EN_MASK GENMASK(0, 0) |
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| 73 | #define TPS68470_PLL_EN_MASK GENMASK(0, 0) |
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| 74 | |
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| 75 | #define TPS68470_CLKCFG1_MODE_A_MASK GENMASK(1, 0) |
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| 76 | #define TPS68470_CLKCFG1_MODE_B_MASK GENMASK(3, 2) |
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| 77 | |
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| 78 | #define TPS68470_CLKCFG2_DRV_STR_2MA 0x05 |
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| 79 | #define TPS68470_PLL_OUTPUT_ENABLE 0x02 |
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| 80 | #define TPS68470_CLK_SRC_XTAL BIT(0) |
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| 81 | #define TPS68470_PLLSWR_DEFAULT GENMASK(1, 0) |
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| 82 | #define TPS68470_OSC_EXT_CAP_DEFAULT 0x05 |
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| 83 | |
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| 84 | #define TPS68470_OUTPUT_A_SHIFT 0x00 |
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| 85 | #define TPS68470_OUTPUT_B_SHIFT 0x02 |
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| 86 | #define TPS68470_CLK_SRC_SHIFT GENMASK(2, 0) |
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| 87 | #define TPS68470_OSC_EXT_CAP_SHIFT BIT(2) |
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| 88 | |
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| 89 | #define TPS68470_GPIO_CTL_REG_A(x) (TPS68470_REG_GPCTL0A + (x) * 2) |
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| 90 | #define TPS68470_GPIO_CTL_REG_B(x) (TPS68470_REG_GPCTL0B + (x) * 2) |
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| 91 | #define TPS68470_GPIO_MODE_MASK GENMASK(1, 0) |
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| 92 | #define TPS68470_GPIO_MODE_IN 0 |
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| 93 | #define TPS68470_GPIO_MODE_IN_PULLUP 1 |
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| 94 | #define TPS68470_GPIO_MODE_OUT_CMOS 2 |
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| 95 | #define TPS68470_GPIO_MODE_OUT_ODRAIN 3 |
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| 96 | |
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| 97 | #endif /* __LINUX_MFD_TPS68470_H */ |
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| 98 | |
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