1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
14#include <linux/compiler.h>
15#include <linux/spinlock.h>
16#include <linux/ethtool.h>
17#include <linux/leds.h>
18#include <linux/linkmode.h>
19#include <linux/netlink.h>
20#include <linux/mdio.h>
21#include <linux/mii.h>
22#include <linux/mii_timestamper.h>
23#include <linux/module.h>
24#include <linux/timer.h>
25#include <linux/workqueue.h>
26#include <linux/mod_devicetable.h>
27#include <linux/u64_stats_sync.h>
28#include <linux/irqreturn.h>
29#include <linux/iopoll.h>
30#include <linux/refcount.h>
31
32#include <linux/atomic.h>
33#include <net/eee.h>
34
35#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
36 SUPPORTED_TP | \
37 SUPPORTED_MII)
38
39#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
40 SUPPORTED_10baseT_Full)
41
42#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
43 SUPPORTED_100baseT_Full)
44
45#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
46 SUPPORTED_1000baseT_Full)
47
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
53extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
54extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
55extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
56extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
57extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;
58extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init;
59
60#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
61#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
62#define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features)
63#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
64#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
65#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
66#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
67#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
68#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
69#define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features)
70#define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features)
71
72extern const int phy_basic_ports_array[3];
73extern const int phy_fibre_port_array[1];
74extern const int phy_all_ports_features_array[7];
75extern const int phy_10_100_features_array[4];
76extern const int phy_basic_t1_features_array[3];
77extern const int phy_basic_t1s_p2mp_features_array[2];
78extern const int phy_gbit_features_array[2];
79extern const int phy_10gbit_features_array[1];
80
81/*
82 * Set phydev->irq to PHY_POLL if interrupts are not supported,
83 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
84 * the attached MAC driver handles the interrupt
85 */
86#define PHY_POLL -1
87#define PHY_MAC_INTERRUPT -2
88
89#define PHY_IS_INTERNAL 0x00000001
90#define PHY_RST_AFTER_CLK_EN 0x00000002
91#define PHY_POLL_CABLE_TEST 0x00000004
92#define PHY_ALWAYS_CALL_SUSPEND 0x00000008
93#define MDIO_DEVICE_IS_PHY 0x80000000
94
95/**
96 * enum phy_interface_t - Interface Mode definitions
97 *
98 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
99 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
100 * @PHY_INTERFACE_MODE_MII: Media-independent interface
101 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
102 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
103 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
104 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
105 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
106 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
107 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
108 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
109 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
110 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
111 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
112 * @PHY_INTERFACE_MODE_SMII: Serial MII
113 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
114 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
115 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
116 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII
117 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
118 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
119 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
120 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
121 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
122 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
123 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
124 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
125 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
126 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
127 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
128 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
129 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
130 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
131 * @PHY_INTERFACE_MODE_MAX: Book keeping
132 *
133 * Describes the interface between the MAC and PHY.
134 */
135typedef enum {
136 PHY_INTERFACE_MODE_NA,
137 PHY_INTERFACE_MODE_INTERNAL,
138 PHY_INTERFACE_MODE_MII,
139 PHY_INTERFACE_MODE_GMII,
140 PHY_INTERFACE_MODE_SGMII,
141 PHY_INTERFACE_MODE_TBI,
142 PHY_INTERFACE_MODE_REVMII,
143 PHY_INTERFACE_MODE_RMII,
144 PHY_INTERFACE_MODE_REVRMII,
145 PHY_INTERFACE_MODE_RGMII,
146 PHY_INTERFACE_MODE_RGMII_ID,
147 PHY_INTERFACE_MODE_RGMII_RXID,
148 PHY_INTERFACE_MODE_RGMII_TXID,
149 PHY_INTERFACE_MODE_RTBI,
150 PHY_INTERFACE_MODE_SMII,
151 PHY_INTERFACE_MODE_XGMII,
152 PHY_INTERFACE_MODE_XLGMII,
153 PHY_INTERFACE_MODE_MOCA,
154 PHY_INTERFACE_MODE_PSGMII,
155 PHY_INTERFACE_MODE_QSGMII,
156 PHY_INTERFACE_MODE_TRGMII,
157 PHY_INTERFACE_MODE_100BASEX,
158 PHY_INTERFACE_MODE_1000BASEX,
159 PHY_INTERFACE_MODE_2500BASEX,
160 PHY_INTERFACE_MODE_5GBASER,
161 PHY_INTERFACE_MODE_RXAUI,
162 PHY_INTERFACE_MODE_XAUI,
163 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
164 PHY_INTERFACE_MODE_10GBASER,
165 PHY_INTERFACE_MODE_25GBASER,
166 PHY_INTERFACE_MODE_USXGMII,
167 /* 10GBASE-KR - with Clause 73 AN */
168 PHY_INTERFACE_MODE_10GKR,
169 PHY_INTERFACE_MODE_QUSGMII,
170 PHY_INTERFACE_MODE_1000BASEKX,
171 PHY_INTERFACE_MODE_MAX,
172} phy_interface_t;
173
174/* PHY interface mode bitmap handling */
175#define DECLARE_PHY_INTERFACE_MASK(name) \
176 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
177
178static inline void phy_interface_zero(unsigned long *intf)
179{
180 bitmap_zero(dst: intf, nbits: PHY_INTERFACE_MODE_MAX);
181}
182
183static inline bool phy_interface_empty(const unsigned long *intf)
184{
185 return bitmap_empty(src: intf, nbits: PHY_INTERFACE_MODE_MAX);
186}
187
188static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
189 const unsigned long *b)
190{
191 bitmap_and(dst, src1: a, src2: b, nbits: PHY_INTERFACE_MODE_MAX);
192}
193
194static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
195 const unsigned long *b)
196{
197 bitmap_or(dst, src1: a, src2: b, nbits: PHY_INTERFACE_MODE_MAX);
198}
199
200static inline void phy_interface_set_rgmii(unsigned long *intf)
201{
202 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
203 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
204 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
205 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
206}
207
208/*
209 * phy_supported_speeds - return all speeds currently supported by a PHY device
210 */
211unsigned int phy_supported_speeds(struct phy_device *phy,
212 unsigned int *speeds,
213 unsigned int size);
214
215/**
216 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
217 * @interface: enum phy_interface_t value
218 *
219 * Description: maps enum &phy_interface_t defined in this file
220 * into the device tree binding of 'phy-mode', so that Ethernet
221 * device driver can get PHY interface from device tree.
222 */
223static inline const char *phy_modes(phy_interface_t interface)
224{
225 switch (interface) {
226 case PHY_INTERFACE_MODE_NA:
227 return "";
228 case PHY_INTERFACE_MODE_INTERNAL:
229 return "internal";
230 case PHY_INTERFACE_MODE_MII:
231 return "mii";
232 case PHY_INTERFACE_MODE_GMII:
233 return "gmii";
234 case PHY_INTERFACE_MODE_SGMII:
235 return "sgmii";
236 case PHY_INTERFACE_MODE_TBI:
237 return "tbi";
238 case PHY_INTERFACE_MODE_REVMII:
239 return "rev-mii";
240 case PHY_INTERFACE_MODE_RMII:
241 return "rmii";
242 case PHY_INTERFACE_MODE_REVRMII:
243 return "rev-rmii";
244 case PHY_INTERFACE_MODE_RGMII:
245 return "rgmii";
246 case PHY_INTERFACE_MODE_RGMII_ID:
247 return "rgmii-id";
248 case PHY_INTERFACE_MODE_RGMII_RXID:
249 return "rgmii-rxid";
250 case PHY_INTERFACE_MODE_RGMII_TXID:
251 return "rgmii-txid";
252 case PHY_INTERFACE_MODE_RTBI:
253 return "rtbi";
254 case PHY_INTERFACE_MODE_SMII:
255 return "smii";
256 case PHY_INTERFACE_MODE_XGMII:
257 return "xgmii";
258 case PHY_INTERFACE_MODE_XLGMII:
259 return "xlgmii";
260 case PHY_INTERFACE_MODE_MOCA:
261 return "moca";
262 case PHY_INTERFACE_MODE_PSGMII:
263 return "psgmii";
264 case PHY_INTERFACE_MODE_QSGMII:
265 return "qsgmii";
266 case PHY_INTERFACE_MODE_TRGMII:
267 return "trgmii";
268 case PHY_INTERFACE_MODE_1000BASEX:
269 return "1000base-x";
270 case PHY_INTERFACE_MODE_1000BASEKX:
271 return "1000base-kx";
272 case PHY_INTERFACE_MODE_2500BASEX:
273 return "2500base-x";
274 case PHY_INTERFACE_MODE_5GBASER:
275 return "5gbase-r";
276 case PHY_INTERFACE_MODE_RXAUI:
277 return "rxaui";
278 case PHY_INTERFACE_MODE_XAUI:
279 return "xaui";
280 case PHY_INTERFACE_MODE_10GBASER:
281 return "10gbase-r";
282 case PHY_INTERFACE_MODE_25GBASER:
283 return "25gbase-r";
284 case PHY_INTERFACE_MODE_USXGMII:
285 return "usxgmii";
286 case PHY_INTERFACE_MODE_10GKR:
287 return "10gbase-kr";
288 case PHY_INTERFACE_MODE_100BASEX:
289 return "100base-x";
290 case PHY_INTERFACE_MODE_QUSGMII:
291 return "qusgmii";
292 default:
293 return "unknown";
294 }
295}
296
297#define PHY_INIT_TIMEOUT 100000
298#define PHY_FORCE_TIMEOUT 10
299
300#define PHY_MAX_ADDR 32
301
302/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
303#define PHY_ID_FMT "%s:%02x"
304
305#define MII_BUS_ID_SIZE 61
306
307struct device;
308struct kernel_hwtstamp_config;
309struct phylink;
310struct sfp_bus;
311struct sfp_upstream_ops;
312struct sk_buff;
313
314/**
315 * struct mdio_bus_stats - Statistics counters for MDIO busses
316 * @transfers: Total number of transfers, i.e. @writes + @reads
317 * @errors: Number of MDIO transfers that returned an error
318 * @writes: Number of write transfers
319 * @reads: Number of read transfers
320 * @syncp: Synchronisation for incrementing statistics
321 */
322struct mdio_bus_stats {
323 u64_stats_t transfers;
324 u64_stats_t errors;
325 u64_stats_t writes;
326 u64_stats_t reads;
327 /* Must be last, add new statistics above */
328 struct u64_stats_sync syncp;
329};
330
331/**
332 * struct phy_package_shared - Shared information in PHY packages
333 * @base_addr: Base PHY address of PHY package used to combine PHYs
334 * in one package and for offset calculation of phy_package_read/write
335 * @np: Pointer to the Device Node if PHY package defined in DT
336 * @refcnt: Number of PHYs connected to this shared data
337 * @flags: Initialization of PHY package
338 * @priv_size: Size of the shared private data @priv
339 * @priv: Driver private data shared across a PHY package
340 *
341 * Represents a shared structure between different phydev's in the same
342 * package, for example a quad PHY. See phy_package_join() and
343 * phy_package_leave().
344 */
345struct phy_package_shared {
346 u8 base_addr;
347 /* With PHY package defined in DT this points to the PHY package node */
348 struct device_node *np;
349 refcount_t refcnt;
350 unsigned long flags;
351 size_t priv_size;
352
353 /* private data pointer */
354 /* note that this pointer is shared between different phydevs and
355 * the user has to take care of appropriate locking. It is allocated
356 * and freed automatically by phy_package_join() and
357 * phy_package_leave().
358 */
359 void *priv;
360};
361
362/* used as bit number in atomic bitops */
363#define PHY_SHARED_F_INIT_DONE 0
364#define PHY_SHARED_F_PROBE_DONE 1
365
366/**
367 * struct mii_bus - Represents an MDIO bus
368 *
369 * @owner: Who owns this device
370 * @name: User friendly name for this MDIO device, or driver name
371 * @id: Unique identifier for this bus, typical from bus hierarchy
372 * @priv: Driver private data
373 *
374 * The Bus class for PHYs. Devices which provide access to
375 * PHYs should register using this structure
376 */
377struct mii_bus {
378 struct module *owner;
379 const char *name;
380 char id[MII_BUS_ID_SIZE];
381 void *priv;
382 /** @read: Perform a read transfer on the bus */
383 int (*read)(struct mii_bus *bus, int addr, int regnum);
384 /** @write: Perform a write transfer on the bus */
385 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
386 /** @read_c45: Perform a C45 read transfer on the bus */
387 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum);
388 /** @write_c45: Perform a C45 write transfer on the bus */
389 int (*write_c45)(struct mii_bus *bus, int addr, int devnum,
390 int regnum, u16 val);
391 /** @reset: Perform a reset of the bus */
392 int (*reset)(struct mii_bus *bus);
393
394 /** @stats: Statistic counters per device on the bus */
395 struct mdio_bus_stats stats[PHY_MAX_ADDR];
396
397 /**
398 * @mdio_lock: A lock to ensure that only one thing can read/write
399 * the MDIO bus at a time
400 */
401 struct mutex mdio_lock;
402
403 /** @parent: Parent device of this bus */
404 struct device *parent;
405 /** @state: State of bus structure */
406 enum {
407 MDIOBUS_ALLOCATED = 1,
408 MDIOBUS_REGISTERED,
409 MDIOBUS_UNREGISTERED,
410 MDIOBUS_RELEASED,
411 } state;
412
413 /** @dev: Kernel device representation */
414 struct device dev;
415
416 /** @mdio_map: list of all MDIO devices on bus */
417 struct mdio_device *mdio_map[PHY_MAX_ADDR];
418
419 /** @phy_mask: PHY addresses to be ignored when probing */
420 u32 phy_mask;
421
422 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
423 u32 phy_ignore_ta_mask;
424
425 /**
426 * @irq: An array of interrupts, each PHY's interrupt at the index
427 * matching its address
428 */
429 int irq[PHY_MAX_ADDR];
430
431 /** @reset_delay_us: GPIO reset pulse width in microseconds */
432 int reset_delay_us;
433 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
434 int reset_post_delay_us;
435 /** @reset_gpiod: Reset GPIO descriptor pointer */
436 struct gpio_desc *reset_gpiod;
437
438 /** @shared_lock: protect access to the shared element */
439 struct mutex shared_lock;
440
441 /** @shared: shared state across different PHYs */
442 struct phy_package_shared *shared[PHY_MAX_ADDR];
443};
444#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
445
446struct mii_bus *mdiobus_alloc_size(size_t size);
447
448/**
449 * mdiobus_alloc - Allocate an MDIO bus structure
450 *
451 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
452 * for the driver to register the bus.
453 */
454static inline struct mii_bus *mdiobus_alloc(void)
455{
456 return mdiobus_alloc_size(size: 0);
457}
458
459int __mdiobus_register(struct mii_bus *bus, struct module *owner);
460int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
461 struct module *owner);
462#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
463#define devm_mdiobus_register(dev, bus) \
464 __devm_mdiobus_register(dev, bus, THIS_MODULE)
465
466void mdiobus_unregister(struct mii_bus *bus);
467void mdiobus_free(struct mii_bus *bus);
468struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
469static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
470{
471 return devm_mdiobus_alloc_size(dev, sizeof_priv: 0);
472}
473
474struct mii_bus *mdio_find_bus(const char *mdio_name);
475struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr);
476
477#define PHY_INTERRUPT_DISABLED false
478#define PHY_INTERRUPT_ENABLED true
479
480/**
481 * enum phy_state - PHY state machine states:
482 *
483 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
484 * should be called if and only if the PHY is in this state,
485 * given that the PHY device exists.
486 * - PHY driver probe function will set the state to @PHY_READY
487 *
488 * @PHY_READY: PHY is ready to send and receive packets, but the
489 * controller is not. By default, PHYs which do not implement
490 * probe will be set to this state by phy_probe().
491 * - start will set the state to UP
492 *
493 * @PHY_UP: The PHY and attached device are ready to do work.
494 * Interrupts should be started here.
495 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
496 *
497 * @PHY_NOLINK: PHY is up, but not currently plugged in.
498 * - irq or timer will set @PHY_RUNNING if link comes back
499 * - phy_stop moves to @PHY_HALTED
500 *
501 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
502 * and/or receiving packets
503 * - irq or timer will set @PHY_NOLINK if link goes down
504 * - phy_stop moves to @PHY_HALTED
505 *
506 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
507 * is not expected to work, carrier will be indicated as down. PHY will be
508 * poll once per second, or on interrupt for it current state.
509 * Once complete, move to UP to restart the PHY.
510 * - phy_stop aborts the running test and moves to @PHY_HALTED
511 *
512 * @PHY_HALTED: PHY is up, but no polling or interrupts are done.
513 * - phy_start moves to @PHY_UP
514 *
515 * @PHY_ERROR: PHY is up, but is in an error state.
516 * - phy_stop moves to @PHY_HALTED
517 */
518enum phy_state {
519 PHY_DOWN = 0,
520 PHY_READY,
521 PHY_HALTED,
522 PHY_ERROR,
523 PHY_UP,
524 PHY_RUNNING,
525 PHY_NOLINK,
526 PHY_CABLETEST,
527};
528
529#define MDIO_MMD_NUM 32
530
531/**
532 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
533 * @devices_in_package: IEEE 802.3 devices in package register value.
534 * @mmds_present: bit vector of MMDs present.
535 * @device_ids: The device identifer for each present device.
536 */
537struct phy_c45_device_ids {
538 u32 devices_in_package;
539 u32 mmds_present;
540 u32 device_ids[MDIO_MMD_NUM];
541};
542
543struct macsec_context;
544struct macsec_ops;
545
546/**
547 * struct phy_device - An instance of a PHY
548 *
549 * @mdio: MDIO bus this PHY is on
550 * @drv: Pointer to the driver for this PHY instance
551 * @devlink: Create a link between phy dev and mac dev, if the external phy
552 * used by current mac interface is managed by another mac interface.
553 * @phy_id: UID for this device found during discovery
554 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
555 * @is_c45: Set to true if this PHY uses clause 45 addressing.
556 * @is_internal: Set to true if this PHY is internal to a MAC.
557 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
558 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
559 * @has_fixups: Set to true if this PHY has fixups/quirks.
560 * @suspended: Set to true if this PHY has been suspended successfully.
561 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
562 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
563 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
564 * @downshifted_rate: Set true if link speed has been downshifted.
565 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
566 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
567 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN
568 * enabled.
569 * @state: State of the PHY for management purposes
570 * @dev_flags: Device-specific flags used by the PHY driver.
571 *
572 * - Bits [15:0] are free to use by the PHY driver to communicate
573 * driver specific behavior.
574 * - Bits [23:16] are currently reserved for future use.
575 * - Bits [31:24] are reserved for defining generic
576 * PHY driver behavior.
577 * @irq: IRQ number of the PHY's interrupt (-1 if none)
578 * @phylink: Pointer to phylink instance for this PHY
579 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
580 * @sfp_bus: SFP bus attached to this PHY's fiber port
581 * @attached_dev: The attached enet driver's device instance ptr
582 * @adjust_link: Callback for the enet controller to respond to changes: in the
583 * link state.
584 * @phy_link_change: Callback for phylink for notification of link change
585 * @macsec_ops: MACsec offloading ops.
586 *
587 * @speed: Current link speed
588 * @duplex: Current duplex
589 * @port: Current port
590 * @pause: Current pause
591 * @asym_pause: Current asymmetric pause
592 * @supported: Combined MAC/PHY supported linkmodes
593 * @advertising: Currently advertised linkmodes
594 * @adv_old: Saved advertised while power saving for WoL
595 * @supported_eee: supported PHY EEE linkmodes
596 * @advertising_eee: Currently advertised EEE linkmodes
597 * @eee_enabled: Flag indicating whether the EEE feature is enabled
598 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY
599 * @eee_cfg: User configuration of EEE
600 * @lp_advertising: Current link partner advertised linkmodes
601 * @host_interfaces: PHY interface modes supported by host
602 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
603 * @autoneg: Flag autoneg being used
604 * @rate_matching: Current rate matching mode
605 * @link: Current link state
606 * @autoneg_complete: Flag auto negotiation of the link has completed
607 * @mdix: Current crossover
608 * @mdix_ctrl: User setting of crossover
609 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
610 * @interrupts: Flag interrupts have been enabled
611 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
612 * handling shall be postponed until PHY has resumed
613 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
614 * requiring a rerun of the interrupt handler after resume
615 * @interface: enum phy_interface_t value
616 * @possible_interfaces: bitmap if interface modes that the attached PHY
617 * will switch between depending on media speed.
618 * @skb: Netlink message for cable diagnostics
619 * @nest: Netlink nest used for cable diagnostics
620 * @ehdr: nNtlink header for cable diagnostics
621 * @phy_led_triggers: Array of LED triggers
622 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
623 * @led_link_trigger: LED trigger for link up/down
624 * @last_triggered: last LED trigger for link speed
625 * @leds: list of PHY LED structures
626 * @master_slave_set: User requested master/slave configuration
627 * @master_slave_get: Current master/slave advertisement
628 * @master_slave_state: Current master/slave configuration
629 * @mii_ts: Pointer to time stamper callbacks
630 * @psec: Pointer to Power Sourcing Equipment control struct
631 * @lock: Mutex for serialization access to PHY
632 * @state_queue: Work queue for state machine
633 * @link_down_events: Number of times link was lost
634 * @shared: Pointer to private data shared by phys in one package
635 * @priv: Pointer to driver private data
636 *
637 * interrupts currently only supports enabled or disabled,
638 * but could be changed in the future to support enabling
639 * and disabling specific interrupts
640 *
641 * Contains some infrastructure for polling and interrupt
642 * handling, as well as handling shifts in PHY hardware state
643 */
644struct phy_device {
645 struct mdio_device mdio;
646
647 /* Information about the PHY type */
648 /* And management functions */
649 const struct phy_driver *drv;
650
651 struct device_link *devlink;
652
653 u32 phy_id;
654
655 struct phy_c45_device_ids c45_ids;
656 unsigned is_c45:1;
657 unsigned is_internal:1;
658 unsigned is_pseudo_fixed_link:1;
659 unsigned is_gigabit_capable:1;
660 unsigned has_fixups:1;
661 unsigned suspended:1;
662 unsigned suspended_by_mdio_bus:1;
663 unsigned sysfs_links:1;
664 unsigned loopback_enabled:1;
665 unsigned downshifted_rate:1;
666 unsigned is_on_sfp_module:1;
667 unsigned mac_managed_pm:1;
668 unsigned wol_enabled:1;
669
670 unsigned autoneg:1;
671 /* The most recently read link state */
672 unsigned link:1;
673 unsigned autoneg_complete:1;
674
675 /* Interrupts are enabled */
676 unsigned interrupts:1;
677 unsigned irq_suspended:1;
678 unsigned irq_rerun:1;
679
680 int rate_matching;
681
682 enum phy_state state;
683
684 u32 dev_flags;
685
686 phy_interface_t interface;
687 DECLARE_PHY_INTERFACE_MASK(possible_interfaces);
688
689 /*
690 * forced speed & duplex (no autoneg)
691 * partner speed & duplex & pause (autoneg)
692 */
693 int speed;
694 int duplex;
695 int port;
696 int pause;
697 int asym_pause;
698 u8 master_slave_get;
699 u8 master_slave_set;
700 u8 master_slave_state;
701
702 /* Union of PHY and Attached devices' supported link modes */
703 /* See ethtool.h for more info */
704 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
705 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
706 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
707 /* used with phy_speed_down */
708 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
709 /* used for eee validation and configuration*/
710 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee);
711 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee);
712 bool eee_enabled;
713
714 /* Host supported PHY interface types. Should be ignored if empty. */
715 DECLARE_PHY_INTERFACE_MASK(host_interfaces);
716
717 /* Energy efficient ethernet modes which should be prohibited */
718 u32 eee_broken_modes;
719 bool enable_tx_lpi;
720 struct eee_config eee_cfg;
721
722#ifdef CONFIG_LED_TRIGGER_PHY
723 struct phy_led_trigger *phy_led_triggers;
724 unsigned int phy_num_led_triggers;
725 struct phy_led_trigger *last_triggered;
726
727 struct phy_led_trigger *led_link_trigger;
728#endif
729 struct list_head leds;
730
731 /*
732 * Interrupt number for this PHY
733 * -1 means no interrupt
734 */
735 int irq;
736
737 /* private data pointer */
738 /* For use by PHYs to maintain extra state */
739 void *priv;
740
741 /* shared data pointer */
742 /* For use by PHYs inside the same package that need a shared state. */
743 struct phy_package_shared *shared;
744
745 /* Reporting cable test results */
746 struct sk_buff *skb;
747 void *ehdr;
748 struct nlattr *nest;
749
750 /* Interrupt and Polling infrastructure */
751 struct delayed_work state_queue;
752
753 struct mutex lock;
754
755 /* This may be modified under the rtnl lock */
756 bool sfp_bus_attached;
757 struct sfp_bus *sfp_bus;
758 struct phylink *phylink;
759 struct net_device *attached_dev;
760 struct mii_timestamper *mii_ts;
761 struct pse_control *psec;
762
763 u8 mdix;
764 u8 mdix_ctrl;
765
766 int pma_extable;
767
768 unsigned int link_down_events;
769
770 void (*phy_link_change)(struct phy_device *phydev, bool up);
771 void (*adjust_link)(struct net_device *dev);
772
773#if IS_ENABLED(CONFIG_MACSEC)
774 /* MACsec management functions */
775 const struct macsec_ops *macsec_ops;
776#endif
777};
778
779/* Generic phy_device::dev_flags */
780#define PHY_F_NO_IRQ 0x80000000
781
782static inline struct phy_device *to_phy_device(const struct device *dev)
783{
784 return container_of(to_mdio_device(dev), struct phy_device, mdio);
785}
786
787/**
788 * struct phy_tdr_config - Configuration of a TDR raw test
789 *
790 * @first: Distance for first data collection point
791 * @last: Distance for last data collection point
792 * @step: Step between data collection points
793 * @pair: Bitmap of cable pairs to collect data for
794 *
795 * A structure containing possible configuration parameters
796 * for a TDR cable test. The driver does not need to implement
797 * all the parameters, but should report what is actually used.
798 * All distances are in centimeters.
799 */
800struct phy_tdr_config {
801 u32 first;
802 u32 last;
803 u32 step;
804 s8 pair;
805};
806#define PHY_PAIR_ALL -1
807
808/**
809 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
810 * Avoidance) Reconciliation Sublayer.
811 *
812 * @version: read-only PLCA register map version. -1 = not available. Ignored
813 * when setting the configuration. Format is the same as reported by the PLCA
814 * IDVER register (31.CA00). -1 = not available.
815 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't
816 * set. 0 = disabled, anything else = enabled.
817 * @node_id: the PLCA local node identifier. -1 = not available / don't set.
818 * Allowed values [0 .. 254]. 255 = node disabled.
819 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only
820 * meaningful for the coordinator (node_id = 0). -1 = not available / don't
821 * set. Allowed values [1 .. 255].
822 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the
823 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for
824 * more details. The to_timer shall be set equal over all nodes.
825 * -1 = not available / don't set. Allowed values [0 .. 255].
826 * @burst_cnt: controls how many additional frames a node is allowed to send in
827 * single transmit opportunity (TO). The default value of 0 means that the
828 * node is allowed exactly one frame per TO. A value of 1 allows two frames
829 * per TO, and so on. -1 = not available / don't set.
830 * Allowed values [0 .. 255].
831 * @burst_tmr: controls how many bit times to wait for the MAC to send a new
832 * frame before interrupting the burst. This value should be set to a value
833 * greater than the MAC inter-packet gap (which is typically 96 bits).
834 * -1 = not available / don't set. Allowed values [0 .. 255].
835 *
836 * A structure containing configuration parameters for setting/getting the PLCA
837 * RS configuration. The driver does not need to implement all the parameters,
838 * but should report what is actually used.
839 */
840struct phy_plca_cfg {
841 int version;
842 int enabled;
843 int node_id;
844 int node_cnt;
845 int to_tmr;
846 int burst_cnt;
847 int burst_tmr;
848};
849
850/**
851 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision
852 * Avoidance) Reconciliation Sublayer.
853 *
854 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS
855 * register(31.CA03), indicating BEACON activity.
856 *
857 * A structure containing status information of the PLCA RS configuration.
858 * The driver does not need to implement all the parameters, but should report
859 * what is actually used.
860 */
861struct phy_plca_status {
862 bool pst;
863};
864
865/* Modes for PHY LED configuration */
866enum phy_led_modes {
867 PHY_LED_ACTIVE_LOW = 0,
868 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 1,
869
870 /* keep it last */
871 __PHY_LED_MODES_NUM,
872};
873
874/**
875 * struct phy_led: An LED driven by the PHY
876 *
877 * @list: List of LEDs
878 * @phydev: PHY this LED is attached to
879 * @led_cdev: Standard LED class structure
880 * @index: Number of the LED
881 */
882struct phy_led {
883 struct list_head list;
884 struct phy_device *phydev;
885 struct led_classdev led_cdev;
886 u8 index;
887};
888
889#define to_phy_led(d) container_of(d, struct phy_led, led_cdev)
890
891/**
892 * struct phy_driver - Driver structure for a particular PHY type
893 *
894 * @mdiodrv: Data common to all MDIO devices
895 * @phy_id: The result of reading the UID registers of this PHY
896 * type, and ANDing them with the phy_id_mask. This driver
897 * only works for PHYs with IDs which match this field
898 * @name: The friendly name of this PHY type
899 * @phy_id_mask: Defines the important bits of the phy_id
900 * @features: A mandatory list of features (speed, duplex, etc)
901 * supported by this PHY
902 * @flags: A bitfield defining certain other features this PHY
903 * supports (like interrupts)
904 * @driver_data: Static driver data
905 *
906 * All functions are optional. If config_aneg or read_status
907 * are not implemented, the phy core uses the genphy versions.
908 * Note that none of these functions should be called from
909 * interrupt time. The goal is for the bus read/write functions
910 * to be able to block when the bus transaction is happening,
911 * and be freed up by an interrupt (The MPC85xx has this ability,
912 * though it is not currently supported in the driver).
913 */
914struct phy_driver {
915 struct mdio_driver_common mdiodrv;
916 u32 phy_id;
917 char *name;
918 u32 phy_id_mask;
919 const unsigned long * const features;
920 u32 flags;
921 const void *driver_data;
922
923 /**
924 * @soft_reset: Called to issue a PHY software reset
925 */
926 int (*soft_reset)(struct phy_device *phydev);
927
928 /**
929 * @config_init: Called to initialize the PHY,
930 * including after a reset
931 */
932 int (*config_init)(struct phy_device *phydev);
933
934 /**
935 * @probe: Called during discovery. Used to set
936 * up device-specific structures, if any
937 */
938 int (*probe)(struct phy_device *phydev);
939
940 /**
941 * @get_features: Probe the hardware to determine what
942 * abilities it has. Should only set phydev->supported.
943 */
944 int (*get_features)(struct phy_device *phydev);
945
946 /**
947 * @get_rate_matching: Get the supported type of rate matching for a
948 * particular phy interface. This is used by phy consumers to determine
949 * whether to advertise lower-speed modes for that interface. It is
950 * assumed that if a rate matching mode is supported on an interface,
951 * then that interface's rate can be adapted to all slower link speeds
952 * supported by the phy. If the interface is not supported, this should
953 * return %RATE_MATCH_NONE.
954 */
955 int (*get_rate_matching)(struct phy_device *phydev,
956 phy_interface_t iface);
957
958 /* PHY Power Management */
959 /** @suspend: Suspend the hardware, saving state if needed */
960 int (*suspend)(struct phy_device *phydev);
961 /** @resume: Resume the hardware, restoring state if needed */
962 int (*resume)(struct phy_device *phydev);
963
964 /**
965 * @config_aneg: Configures the advertisement and resets
966 * autonegotiation if phydev->autoneg is on,
967 * forces the speed to the current settings in phydev
968 * if phydev->autoneg is off
969 */
970 int (*config_aneg)(struct phy_device *phydev);
971
972 /** @aneg_done: Determines the auto negotiation result */
973 int (*aneg_done)(struct phy_device *phydev);
974
975 /** @read_status: Determines the negotiated speed and duplex */
976 int (*read_status)(struct phy_device *phydev);
977
978 /**
979 * @config_intr: Enables or disables interrupts.
980 * It should also clear any pending interrupts prior to enabling the
981 * IRQs and after disabling them.
982 */
983 int (*config_intr)(struct phy_device *phydev);
984
985 /** @handle_interrupt: Override default interrupt handling */
986 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
987
988 /** @remove: Clears up any memory if needed */
989 void (*remove)(struct phy_device *phydev);
990
991 /**
992 * @match_phy_device: Returns true if this is a suitable
993 * driver for the given phydev. If NULL, matching is based on
994 * phy_id and phy_id_mask.
995 */
996 int (*match_phy_device)(struct phy_device *phydev);
997
998 /**
999 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
1000 * register changes to enable Wake on LAN, so set_wol is
1001 * provided to be called in the ethernet driver's set_wol
1002 * function.
1003 */
1004 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
1005
1006 /**
1007 * @get_wol: See set_wol, but for checking whether Wake on LAN
1008 * is enabled.
1009 */
1010 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
1011
1012 /**
1013 * @link_change_notify: Called to inform a PHY device driver
1014 * when the core is about to change the link state. This
1015 * callback is supposed to be used as fixup hook for drivers
1016 * that need to take action when the link state
1017 * changes. Drivers are by no means allowed to mess with the
1018 * PHY device structure in their implementations.
1019 */
1020 void (*link_change_notify)(struct phy_device *dev);
1021
1022 /**
1023 * @read_mmd: PHY specific driver override for reading a MMD
1024 * register. This function is optional for PHY specific
1025 * drivers. When not provided, the default MMD read function
1026 * will be used by phy_read_mmd(), which will use either a
1027 * direct read for Clause 45 PHYs or an indirect read for
1028 * Clause 22 PHYs. devnum is the MMD device number within the
1029 * PHY device, regnum is the register within the selected MMD
1030 * device.
1031 */
1032 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
1033
1034 /**
1035 * @write_mmd: PHY specific driver override for writing a MMD
1036 * register. This function is optional for PHY specific
1037 * drivers. When not provided, the default MMD write function
1038 * will be used by phy_write_mmd(), which will use either a
1039 * direct write for Clause 45 PHYs, or an indirect write for
1040 * Clause 22 PHYs. devnum is the MMD device number within the
1041 * PHY device, regnum is the register within the selected MMD
1042 * device. val is the value to be written.
1043 */
1044 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
1045 u16 val);
1046
1047 /** @read_page: Return the current PHY register page number */
1048 int (*read_page)(struct phy_device *dev);
1049 /** @write_page: Set the current PHY register page number */
1050 int (*write_page)(struct phy_device *dev, int page);
1051
1052 /**
1053 * @module_info: Get the size and type of the eeprom contained
1054 * within a plug-in module
1055 */
1056 int (*module_info)(struct phy_device *dev,
1057 struct ethtool_modinfo *modinfo);
1058
1059 /**
1060 * @module_eeprom: Get the eeprom information from the plug-in
1061 * module
1062 */
1063 int (*module_eeprom)(struct phy_device *dev,
1064 struct ethtool_eeprom *ee, u8 *data);
1065
1066 /** @cable_test_start: Start a cable test */
1067 int (*cable_test_start)(struct phy_device *dev);
1068
1069 /** @cable_test_tdr_start: Start a raw TDR cable test */
1070 int (*cable_test_tdr_start)(struct phy_device *dev,
1071 const struct phy_tdr_config *config);
1072
1073 /**
1074 * @cable_test_get_status: Once per second, or on interrupt,
1075 * request the status of the test.
1076 */
1077 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
1078
1079 /* Get statistics from the PHY using ethtool */
1080 /** @get_sset_count: Number of statistic counters */
1081 int (*get_sset_count)(struct phy_device *dev);
1082 /** @get_strings: Names of the statistic counters */
1083 void (*get_strings)(struct phy_device *dev, u8 *data);
1084 /** @get_stats: Return the statistic counter values */
1085 void (*get_stats)(struct phy_device *dev,
1086 struct ethtool_stats *stats, u64 *data);
1087
1088 /* Get and Set PHY tunables */
1089 /** @get_tunable: Return the value of a tunable */
1090 int (*get_tunable)(struct phy_device *dev,
1091 struct ethtool_tunable *tuna, void *data);
1092 /** @set_tunable: Set the value of a tunable */
1093 int (*set_tunable)(struct phy_device *dev,
1094 struct ethtool_tunable *tuna,
1095 const void *data);
1096 /** @set_loopback: Set the loopback mood of the PHY */
1097 int (*set_loopback)(struct phy_device *dev, bool enable);
1098 /** @get_sqi: Get the signal quality indication */
1099 int (*get_sqi)(struct phy_device *dev);
1100 /** @get_sqi_max: Get the maximum signal quality indication */
1101 int (*get_sqi_max)(struct phy_device *dev);
1102
1103 /* PLCA RS interface */
1104 /** @get_plca_cfg: Return the current PLCA configuration */
1105 int (*get_plca_cfg)(struct phy_device *dev,
1106 struct phy_plca_cfg *plca_cfg);
1107 /** @set_plca_cfg: Set the PLCA configuration */
1108 int (*set_plca_cfg)(struct phy_device *dev,
1109 const struct phy_plca_cfg *plca_cfg);
1110 /** @get_plca_status: Return the current PLCA status info */
1111 int (*get_plca_status)(struct phy_device *dev,
1112 struct phy_plca_status *plca_st);
1113
1114 /**
1115 * @led_brightness_set: Set a PHY LED brightness. Index
1116 * indicates which of the PHYs led should be set. Value
1117 * follows the standard LED class meaning, e.g. LED_OFF,
1118 * LED_HALF, LED_FULL.
1119 */
1120 int (*led_brightness_set)(struct phy_device *dev,
1121 u8 index, enum led_brightness value);
1122
1123 /**
1124 * @led_blink_set: Set a PHY LED brightness. Index indicates
1125 * which of the PHYs led should be configured to blink. Delays
1126 * are in milliseconds and if both are zero then a sensible
1127 * default should be chosen. The call should adjust the
1128 * timings in that case and if it can't match the values
1129 * specified exactly.
1130 */
1131 int (*led_blink_set)(struct phy_device *dev, u8 index,
1132 unsigned long *delay_on,
1133 unsigned long *delay_off);
1134 /**
1135 * @led_hw_is_supported: Can the HW support the given rules.
1136 * @dev: PHY device which has the LED
1137 * @index: Which LED of the PHY device
1138 * @rules The core is interested in these rules
1139 *
1140 * Return 0 if yes, -EOPNOTSUPP if not, or an error code.
1141 */
1142 int (*led_hw_is_supported)(struct phy_device *dev, u8 index,
1143 unsigned long rules);
1144 /**
1145 * @led_hw_control_set: Set the HW to control the LED
1146 * @dev: PHY device which has the LED
1147 * @index: Which LED of the PHY device
1148 * @rules The rules used to control the LED
1149 *
1150 * Returns 0, or a an error code.
1151 */
1152 int (*led_hw_control_set)(struct phy_device *dev, u8 index,
1153 unsigned long rules);
1154 /**
1155 * @led_hw_control_get: Get how the HW is controlling the LED
1156 * @dev: PHY device which has the LED
1157 * @index: Which LED of the PHY device
1158 * @rules Pointer to the rules used to control the LED
1159 *
1160 * Set *@rules to how the HW is currently blinking. Returns 0
1161 * on success, or a error code if the current blinking cannot
1162 * be represented in rules, or some other error happens.
1163 */
1164 int (*led_hw_control_get)(struct phy_device *dev, u8 index,
1165 unsigned long *rules);
1166
1167 /**
1168 * @led_polarity_set: Set the LED polarity modes
1169 * @dev: PHY device which has the LED
1170 * @index: Which LED of the PHY device
1171 * @modes: bitmap of LED polarity modes
1172 *
1173 * Configure LED with all the required polarity modes in @modes
1174 * to make it correctly turn ON or OFF.
1175 *
1176 * Returns 0, or an error code.
1177 */
1178 int (*led_polarity_set)(struct phy_device *dev, int index,
1179 unsigned long modes);
1180};
1181#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
1182 struct phy_driver, mdiodrv)
1183
1184#define PHY_ANY_ID "MATCH ANY PHY"
1185#define PHY_ANY_UID 0xffffffff
1186
1187#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
1188#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
1189#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
1190
1191/**
1192 * phy_id_compare - compare @id1 with @id2 taking account of @mask
1193 * @id1: first PHY ID
1194 * @id2: second PHY ID
1195 * @mask: the PHY ID mask, set bits are significant in matching
1196 *
1197 * Return true if the bits from @id1 and @id2 specified by @mask match.
1198 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask).
1199 */
1200static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask)
1201{
1202 return !((id1 ^ id2) & mask);
1203}
1204
1205/**
1206 * phydev_id_compare - compare @id with the PHY's Clause 22 ID
1207 * @phydev: the PHY device
1208 * @id: the PHY ID to be matched
1209 *
1210 * Compare the @phydev clause 22 ID with the provided @id and return true or
1211 * false depending whether it matches, using the bound driver mask. The
1212 * @phydev must be bound to a driver.
1213 */
1214static inline bool phydev_id_compare(struct phy_device *phydev, u32 id)
1215{
1216 return phy_id_compare(id1: id, id2: phydev->phy_id, mask: phydev->drv->phy_id_mask);
1217}
1218
1219/* A Structure for boards to register fixups with the PHY Lib */
1220struct phy_fixup {
1221 struct list_head list;
1222 char bus_id[MII_BUS_ID_SIZE + 3];
1223 u32 phy_uid;
1224 u32 phy_uid_mask;
1225 int (*run)(struct phy_device *phydev);
1226};
1227
1228const char *phy_speed_to_str(int speed);
1229const char *phy_duplex_to_str(unsigned int duplex);
1230const char *phy_rate_matching_to_str(int rate_matching);
1231
1232int phy_interface_num_ports(phy_interface_t interface);
1233
1234/* A structure for mapping a particular speed and duplex
1235 * combination to a particular SUPPORTED and ADVERTISED value
1236 */
1237struct phy_setting {
1238 u32 speed;
1239 u8 duplex;
1240 u8 bit;
1241};
1242
1243const struct phy_setting *
1244phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
1245 bool exact);
1246size_t phy_speeds(unsigned int *speeds, size_t size,
1247 unsigned long *mask);
1248void of_set_phy_supported(struct phy_device *phydev);
1249void of_set_phy_eee_broken(struct phy_device *phydev);
1250int phy_speed_down_core(struct phy_device *phydev);
1251
1252/**
1253 * phy_is_started - Convenience function to check whether PHY is started
1254 * @phydev: The phy_device struct
1255 */
1256static inline bool phy_is_started(struct phy_device *phydev)
1257{
1258 return phydev->state >= PHY_UP;
1259}
1260
1261void phy_resolve_aneg_pause(struct phy_device *phydev);
1262void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1263void phy_check_downshift(struct phy_device *phydev);
1264
1265/**
1266 * phy_read - Convenience function for reading a given PHY register
1267 * @phydev: the phy_device struct
1268 * @regnum: register number to read
1269 *
1270 * NOTE: MUST NOT be called from interrupt context,
1271 * because the bus read/write functions may wait for an interrupt
1272 * to conclude the operation.
1273 */
1274static inline int phy_read(struct phy_device *phydev, u32 regnum)
1275{
1276 return mdiobus_read(bus: phydev->mdio.bus, addr: phydev->mdio.addr, regnum);
1277}
1278
1279#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1280 timeout_us, sleep_before_read) \
1281({ \
1282 int __ret, __val; \
1283 __ret = read_poll_timeout(__val = phy_read, val, \
1284 __val < 0 || (cond), \
1285 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1286 if (__val < 0) \
1287 __ret = __val; \
1288 if (__ret) \
1289 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1290 __ret; \
1291})
1292
1293/**
1294 * __phy_read - convenience function for reading a given PHY register
1295 * @phydev: the phy_device struct
1296 * @regnum: register number to read
1297 *
1298 * The caller must have taken the MDIO bus lock.
1299 */
1300static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1301{
1302 return __mdiobus_read(bus: phydev->mdio.bus, addr: phydev->mdio.addr, regnum);
1303}
1304
1305/**
1306 * phy_write - Convenience function for writing a given PHY register
1307 * @phydev: the phy_device struct
1308 * @regnum: register number to write
1309 * @val: value to write to @regnum
1310 *
1311 * NOTE: MUST NOT be called from interrupt context,
1312 * because the bus read/write functions may wait for an interrupt
1313 * to conclude the operation.
1314 */
1315static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1316{
1317 return mdiobus_write(bus: phydev->mdio.bus, addr: phydev->mdio.addr, regnum, val);
1318}
1319
1320/**
1321 * __phy_write - Convenience function for writing a given PHY register
1322 * @phydev: the phy_device struct
1323 * @regnum: register number to write
1324 * @val: value to write to @regnum
1325 *
1326 * The caller must have taken the MDIO bus lock.
1327 */
1328static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1329{
1330 return __mdiobus_write(bus: phydev->mdio.bus, addr: phydev->mdio.addr, regnum,
1331 val);
1332}
1333
1334/**
1335 * __phy_modify_changed() - Convenience function for modifying a PHY register
1336 * @phydev: a pointer to a &struct phy_device
1337 * @regnum: register number
1338 * @mask: bit mask of bits to clear
1339 * @set: bit mask of bits to set
1340 *
1341 * Unlocked helper function which allows a PHY register to be modified as
1342 * new register value = (old register value & ~mask) | set
1343 *
1344 * Returns negative errno, 0 if there was no change, and 1 in case of change
1345 */
1346static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1347 u16 mask, u16 set)
1348{
1349 return __mdiobus_modify_changed(bus: phydev->mdio.bus, addr: phydev->mdio.addr,
1350 regnum, mask, set);
1351}
1352
1353/*
1354 * phy_read_mmd - Convenience function for reading a register
1355 * from an MMD on a given PHY.
1356 */
1357int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1358
1359/**
1360 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1361 * condition is met or a timeout occurs
1362 *
1363 * @phydev: The phy_device struct
1364 * @devaddr: The MMD to read from
1365 * @regnum: The register on the MMD to read
1366 * @val: Variable to read the register into
1367 * @cond: Break condition (usually involving @val)
1368 * @sleep_us: Maximum time to sleep between reads in us (0
1369 * tight-loops). Should be less than ~20ms since usleep_range
1370 * is used (see Documentation/timers/timers-howto.rst).
1371 * @timeout_us: Timeout in us, 0 means never timeout
1372 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1373 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1374 * case, the last read value at @args is stored in @val. Must not
1375 * be called from atomic context if sleep_us or timeout_us are used.
1376 */
1377#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1378 sleep_us, timeout_us, sleep_before_read) \
1379({ \
1380 int __ret, __val; \
1381 __ret = read_poll_timeout(__val = phy_read_mmd, val, \
1382 __val < 0 || (cond), \
1383 sleep_us, timeout_us, sleep_before_read, \
1384 phydev, devaddr, regnum); \
1385 if (__val < 0) \
1386 __ret = __val; \
1387 if (__ret) \
1388 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1389 __ret; \
1390})
1391
1392/*
1393 * __phy_read_mmd - Convenience function for reading a register
1394 * from an MMD on a given PHY.
1395 */
1396int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1397
1398/*
1399 * phy_write_mmd - Convenience function for writing a register
1400 * on an MMD on a given PHY.
1401 */
1402int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1403
1404/*
1405 * __phy_write_mmd - Convenience function for writing a register
1406 * on an MMD on a given PHY.
1407 */
1408int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1409
1410int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1411 u16 set);
1412int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1413 u16 set);
1414int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1415int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1416
1417int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1418 u16 mask, u16 set);
1419int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1420 u16 mask, u16 set);
1421int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1422 u16 mask, u16 set);
1423int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1424 u16 mask, u16 set);
1425
1426/**
1427 * __phy_set_bits - Convenience function for setting bits in a PHY register
1428 * @phydev: the phy_device struct
1429 * @regnum: register number to write
1430 * @val: bits to set
1431 *
1432 * The caller must have taken the MDIO bus lock.
1433 */
1434static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1435{
1436 return __phy_modify(phydev, regnum, mask: 0, set: val);
1437}
1438
1439/**
1440 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1441 * @phydev: the phy_device struct
1442 * @regnum: register number to write
1443 * @val: bits to clear
1444 *
1445 * The caller must have taken the MDIO bus lock.
1446 */
1447static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1448 u16 val)
1449{
1450 return __phy_modify(phydev, regnum, mask: val, set: 0);
1451}
1452
1453/**
1454 * phy_set_bits - Convenience function for setting bits in a PHY register
1455 * @phydev: the phy_device struct
1456 * @regnum: register number to write
1457 * @val: bits to set
1458 */
1459static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1460{
1461 return phy_modify(phydev, regnum, mask: 0, set: val);
1462}
1463
1464/**
1465 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1466 * @phydev: the phy_device struct
1467 * @regnum: register number to write
1468 * @val: bits to clear
1469 */
1470static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1471{
1472 return phy_modify(phydev, regnum, mask: val, set: 0);
1473}
1474
1475/**
1476 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1477 * on MMD
1478 * @phydev: the phy_device struct
1479 * @devad: the MMD containing register to modify
1480 * @regnum: register number to modify
1481 * @val: bits to set
1482 *
1483 * The caller must have taken the MDIO bus lock.
1484 */
1485static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1486 u32 regnum, u16 val)
1487{
1488 return __phy_modify_mmd(phydev, devad, regnum, mask: 0, set: val);
1489}
1490
1491/**
1492 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1493 * on MMD
1494 * @phydev: the phy_device struct
1495 * @devad: the MMD containing register to modify
1496 * @regnum: register number to modify
1497 * @val: bits to clear
1498 *
1499 * The caller must have taken the MDIO bus lock.
1500 */
1501static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1502 u32 regnum, u16 val)
1503{
1504 return __phy_modify_mmd(phydev, devad, regnum, mask: val, set: 0);
1505}
1506
1507/**
1508 * phy_set_bits_mmd - Convenience function for setting bits in a register
1509 * on MMD
1510 * @phydev: the phy_device struct
1511 * @devad: the MMD containing register to modify
1512 * @regnum: register number to modify
1513 * @val: bits to set
1514 */
1515static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1516 u32 regnum, u16 val)
1517{
1518 return phy_modify_mmd(phydev, devad, regnum, mask: 0, set: val);
1519}
1520
1521/**
1522 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1523 * on MMD
1524 * @phydev: the phy_device struct
1525 * @devad: the MMD containing register to modify
1526 * @regnum: register number to modify
1527 * @val: bits to clear
1528 */
1529static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1530 u32 regnum, u16 val)
1531{
1532 return phy_modify_mmd(phydev, devad, regnum, mask: val, set: 0);
1533}
1534
1535/**
1536 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1537 * @phydev: the phy_device struct
1538 *
1539 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1540 * PHY_MAC_INTERRUPT
1541 */
1542static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1543{
1544 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1545}
1546
1547/**
1548 * phy_polling_mode - Convenience function for testing whether polling is
1549 * used to detect PHY status changes
1550 * @phydev: the phy_device struct
1551 */
1552static inline bool phy_polling_mode(struct phy_device *phydev)
1553{
1554 if (phydev->state == PHY_CABLETEST)
1555 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1556 return true;
1557
1558 return phydev->irq == PHY_POLL;
1559}
1560
1561/**
1562 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1563 * @phydev: the phy_device struct
1564 */
1565static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1566{
1567 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1568}
1569
1570/**
1571 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1572 * @phydev: the phy_device struct
1573 */
1574static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1575{
1576 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1577}
1578
1579/**
1580 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1581 * PTP hardware clock capabilities.
1582 * @phydev: the phy_device struct
1583 */
1584static inline bool phy_has_tsinfo(struct phy_device *phydev)
1585{
1586 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1587}
1588
1589/**
1590 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1591 * @phydev: the phy_device struct
1592 */
1593static inline bool phy_has_txtstamp(struct phy_device *phydev)
1594{
1595 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1596}
1597
1598static inline int phy_hwtstamp(struct phy_device *phydev,
1599 struct kernel_hwtstamp_config *cfg,
1600 struct netlink_ext_ack *extack)
1601{
1602 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack);
1603}
1604
1605static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1606 int type)
1607{
1608 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1609}
1610
1611static inline int phy_ts_info(struct phy_device *phydev,
1612 struct ethtool_ts_info *tsinfo)
1613{
1614 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1615}
1616
1617static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1618 int type)
1619{
1620 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1621}
1622
1623/**
1624 * phy_is_internal - Convenience function for testing if a PHY is internal
1625 * @phydev: the phy_device struct
1626 */
1627static inline bool phy_is_internal(struct phy_device *phydev)
1628{
1629 return phydev->is_internal;
1630}
1631
1632/**
1633 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1634 * @phydev: the phy_device struct
1635 */
1636static inline bool phy_on_sfp(struct phy_device *phydev)
1637{
1638 return phydev->is_on_sfp_module;
1639}
1640
1641/**
1642 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1643 * PHY interface mode is RGMII (all variants)
1644 * @mode: the &phy_interface_t enum
1645 */
1646static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1647{
1648 return mode >= PHY_INTERFACE_MODE_RGMII &&
1649 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1650};
1651
1652/**
1653 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1654 * negotiation
1655 * @mode: one of &enum phy_interface_t
1656 *
1657 * Returns true if the PHY interface mode uses the 16-bit negotiation
1658 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1659 */
1660static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1661{
1662 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1663 mode == PHY_INTERFACE_MODE_2500BASEX;
1664}
1665
1666/**
1667 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1668 * is RGMII (all variants)
1669 * @phydev: the phy_device struct
1670 */
1671static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1672{
1673 return phy_interface_mode_is_rgmii(mode: phydev->interface);
1674};
1675
1676/**
1677 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1678 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1679 * @phydev: the phy_device struct
1680 */
1681static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1682{
1683 return phydev->is_pseudo_fixed_link;
1684}
1685
1686int phy_save_page(struct phy_device *phydev);
1687int phy_select_page(struct phy_device *phydev, int page);
1688int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1689int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1690int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1691int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1692 u16 mask, u16 set);
1693int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1694 u16 mask, u16 set);
1695
1696struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1697 bool is_c45,
1698 struct phy_c45_device_ids *c45_ids);
1699#if IS_ENABLED(CONFIG_PHYLIB)
1700int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1701struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1702struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1703struct phy_device *device_phy_find_device(struct device *dev);
1704struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode);
1705struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1706int phy_device_register(struct phy_device *phy);
1707void phy_device_free(struct phy_device *phydev);
1708#else
1709static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1710{
1711 return 0;
1712}
1713static inline
1714struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1715{
1716 return 0;
1717}
1718
1719static inline
1720struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1721{
1722 return NULL;
1723}
1724
1725static inline struct phy_device *device_phy_find_device(struct device *dev)
1726{
1727 return NULL;
1728}
1729
1730static inline
1731struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1732{
1733 return NULL;
1734}
1735
1736static inline
1737struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1738{
1739 return NULL;
1740}
1741
1742static inline int phy_device_register(struct phy_device *phy)
1743{
1744 return 0;
1745}
1746
1747static inline void phy_device_free(struct phy_device *phydev) { }
1748#endif /* CONFIG_PHYLIB */
1749void phy_device_remove(struct phy_device *phydev);
1750int phy_get_c45_ids(struct phy_device *phydev);
1751int phy_init_hw(struct phy_device *phydev);
1752int phy_suspend(struct phy_device *phydev);
1753int phy_resume(struct phy_device *phydev);
1754int __phy_resume(struct phy_device *phydev);
1755int phy_loopback(struct phy_device *phydev, bool enable);
1756void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1757void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1758int phy_sfp_probe(struct phy_device *phydev,
1759 const struct sfp_upstream_ops *ops);
1760struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1761 phy_interface_t interface);
1762struct phy_device *phy_find_first(struct mii_bus *bus);
1763int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1764 u32 flags, phy_interface_t interface);
1765int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1766 void (*handler)(struct net_device *),
1767 phy_interface_t interface);
1768struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1769 void (*handler)(struct net_device *),
1770 phy_interface_t interface);
1771void phy_disconnect(struct phy_device *phydev);
1772void phy_detach(struct phy_device *phydev);
1773void phy_start(struct phy_device *phydev);
1774void phy_stop(struct phy_device *phydev);
1775int phy_config_aneg(struct phy_device *phydev);
1776int _phy_start_aneg(struct phy_device *phydev);
1777int phy_start_aneg(struct phy_device *phydev);
1778int phy_aneg_done(struct phy_device *phydev);
1779int phy_speed_down(struct phy_device *phydev, bool sync);
1780int phy_speed_up(struct phy_device *phydev);
1781bool phy_check_valid(int speed, int duplex, unsigned long *features);
1782
1783int phy_restart_aneg(struct phy_device *phydev);
1784int phy_reset_after_clk_enable(struct phy_device *phydev);
1785
1786#if IS_ENABLED(CONFIG_PHYLIB)
1787int phy_start_cable_test(struct phy_device *phydev,
1788 struct netlink_ext_ack *extack);
1789int phy_start_cable_test_tdr(struct phy_device *phydev,
1790 struct netlink_ext_ack *extack,
1791 const struct phy_tdr_config *config);
1792#else
1793static inline
1794int phy_start_cable_test(struct phy_device *phydev,
1795 struct netlink_ext_ack *extack)
1796{
1797 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1798 return -EOPNOTSUPP;
1799}
1800static inline
1801int phy_start_cable_test_tdr(struct phy_device *phydev,
1802 struct netlink_ext_ack *extack,
1803 const struct phy_tdr_config *config)
1804{
1805 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1806 return -EOPNOTSUPP;
1807}
1808#endif
1809
1810static inline void phy_device_reset(struct phy_device *phydev, int value)
1811{
1812 mdio_device_reset(mdiodev: &phydev->mdio, value);
1813}
1814
1815#define phydev_err(_phydev, format, args...) \
1816 dev_err(&_phydev->mdio.dev, format, ##args)
1817
1818#define phydev_err_probe(_phydev, err, format, args...) \
1819 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1820
1821#define phydev_info(_phydev, format, args...) \
1822 dev_info(&_phydev->mdio.dev, format, ##args)
1823
1824#define phydev_warn(_phydev, format, args...) \
1825 dev_warn(&_phydev->mdio.dev, format, ##args)
1826
1827#define phydev_dbg(_phydev, format, args...) \
1828 dev_dbg(&_phydev->mdio.dev, format, ##args)
1829
1830static inline const char *phydev_name(const struct phy_device *phydev)
1831{
1832 return dev_name(dev: &phydev->mdio.dev);
1833}
1834
1835static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1836{
1837 mutex_lock(&phydev->mdio.bus->mdio_lock);
1838}
1839
1840static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1841{
1842 mutex_unlock(lock: &phydev->mdio.bus->mdio_lock);
1843}
1844
1845void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1846 __printf(2, 3);
1847char *phy_attached_info_irq(struct phy_device *phydev)
1848 __malloc;
1849void phy_attached_info(struct phy_device *phydev);
1850
1851/* Clause 22 PHY */
1852int genphy_read_abilities(struct phy_device *phydev);
1853int genphy_setup_forced(struct phy_device *phydev);
1854int genphy_restart_aneg(struct phy_device *phydev);
1855int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1856int genphy_config_eee_advert(struct phy_device *phydev);
1857int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1858int genphy_aneg_done(struct phy_device *phydev);
1859int genphy_update_link(struct phy_device *phydev);
1860int genphy_read_lpa(struct phy_device *phydev);
1861int genphy_read_status_fixed(struct phy_device *phydev);
1862int genphy_read_status(struct phy_device *phydev);
1863int genphy_read_master_slave(struct phy_device *phydev);
1864int genphy_suspend(struct phy_device *phydev);
1865int genphy_resume(struct phy_device *phydev);
1866int genphy_loopback(struct phy_device *phydev, bool enable);
1867int genphy_soft_reset(struct phy_device *phydev);
1868irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1869
1870static inline int genphy_config_aneg(struct phy_device *phydev)
1871{
1872 return __genphy_config_aneg(phydev, changed: false);
1873}
1874
1875static inline int genphy_no_config_intr(struct phy_device *phydev)
1876{
1877 return 0;
1878}
1879int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1880 u16 regnum);
1881int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1882 u16 regnum, u16 val);
1883
1884/* Clause 37 */
1885int genphy_c37_config_aneg(struct phy_device *phydev);
1886int genphy_c37_read_status(struct phy_device *phydev, bool *changed);
1887
1888/* Clause 45 PHY */
1889int genphy_c45_restart_aneg(struct phy_device *phydev);
1890int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1891int genphy_c45_aneg_done(struct phy_device *phydev);
1892int genphy_c45_read_link(struct phy_device *phydev);
1893int genphy_c45_read_lpa(struct phy_device *phydev);
1894int genphy_c45_read_pma(struct phy_device *phydev);
1895int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1896int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1897int genphy_c45_an_config_aneg(struct phy_device *phydev);
1898int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1899int genphy_c45_read_mdix(struct phy_device *phydev);
1900int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1901int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev);
1902int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev);
1903int genphy_c45_read_eee_abilities(struct phy_device *phydev);
1904int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1905int genphy_c45_read_status(struct phy_device *phydev);
1906int genphy_c45_baset1_read_status(struct phy_device *phydev);
1907int genphy_c45_config_aneg(struct phy_device *phydev);
1908int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1909int genphy_c45_pma_resume(struct phy_device *phydev);
1910int genphy_c45_pma_suspend(struct phy_device *phydev);
1911int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1912int genphy_c45_plca_get_cfg(struct phy_device *phydev,
1913 struct phy_plca_cfg *plca_cfg);
1914int genphy_c45_plca_set_cfg(struct phy_device *phydev,
1915 const struct phy_plca_cfg *plca_cfg);
1916int genphy_c45_plca_get_status(struct phy_device *phydev,
1917 struct phy_plca_status *plca_st);
1918int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv,
1919 unsigned long *lp, bool *is_enabled);
1920int genphy_c45_ethtool_get_eee(struct phy_device *phydev,
1921 struct ethtool_keee *data);
1922int genphy_c45_ethtool_set_eee(struct phy_device *phydev,
1923 struct ethtool_keee *data);
1924int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv);
1925int genphy_c45_an_config_eee_aneg(struct phy_device *phydev);
1926int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv);
1927
1928/* Generic C45 PHY driver */
1929extern struct phy_driver genphy_c45_driver;
1930
1931/* The gen10g_* functions are the old Clause 45 stub */
1932int gen10g_config_aneg(struct phy_device *phydev);
1933
1934static inline int phy_read_status(struct phy_device *phydev)
1935{
1936 if (!phydev->drv)
1937 return -EIO;
1938
1939 if (phydev->drv->read_status)
1940 return phydev->drv->read_status(phydev);
1941 else
1942 return genphy_read_status(phydev);
1943}
1944
1945void phy_driver_unregister(struct phy_driver *drv);
1946void phy_drivers_unregister(struct phy_driver *drv, int n);
1947int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1948int phy_drivers_register(struct phy_driver *new_driver, int n,
1949 struct module *owner);
1950void phy_error(struct phy_device *phydev);
1951void phy_state_machine(struct work_struct *work);
1952void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1953void phy_trigger_machine(struct phy_device *phydev);
1954void phy_mac_interrupt(struct phy_device *phydev);
1955void phy_start_machine(struct phy_device *phydev);
1956void phy_stop_machine(struct phy_device *phydev);
1957void phy_ethtool_ksettings_get(struct phy_device *phydev,
1958 struct ethtool_link_ksettings *cmd);
1959int phy_ethtool_ksettings_set(struct phy_device *phydev,
1960 const struct ethtool_link_ksettings *cmd);
1961int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1962int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1963int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1964int phy_disable_interrupts(struct phy_device *phydev);
1965void phy_request_interrupt(struct phy_device *phydev);
1966void phy_free_interrupt(struct phy_device *phydev);
1967void phy_print_status(struct phy_device *phydev);
1968int phy_get_rate_matching(struct phy_device *phydev,
1969 phy_interface_t iface);
1970void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1971void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1972void phy_advertise_supported(struct phy_device *phydev);
1973void phy_advertise_eee_all(struct phy_device *phydev);
1974void phy_support_sym_pause(struct phy_device *phydev);
1975void phy_support_asym_pause(struct phy_device *phydev);
1976void phy_support_eee(struct phy_device *phydev);
1977void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1978 bool autoneg);
1979void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1980bool phy_validate_pause(struct phy_device *phydev,
1981 struct ethtool_pauseparam *pp);
1982void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1983
1984s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1985 const int *delay_values, int size, bool is_rx);
1986
1987void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1988 bool *tx_pause, bool *rx_pause);
1989
1990int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1991 int (*run)(struct phy_device *));
1992int phy_register_fixup_for_id(const char *bus_id,
1993 int (*run)(struct phy_device *));
1994int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1995 int (*run)(struct phy_device *));
1996
1997int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1998int phy_unregister_fixup_for_id(const char *bus_id);
1999int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
2000
2001int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
2002int phy_get_eee_err(struct phy_device *phydev);
2003int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data);
2004int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data);
2005int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
2006void phy_ethtool_get_wol(struct phy_device *phydev,
2007 struct ethtool_wolinfo *wol);
2008int phy_ethtool_get_link_ksettings(struct net_device *ndev,
2009 struct ethtool_link_ksettings *cmd);
2010int phy_ethtool_set_link_ksettings(struct net_device *ndev,
2011 const struct ethtool_link_ksettings *cmd);
2012int phy_ethtool_nway_reset(struct net_device *ndev);
2013int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size);
2014int of_phy_package_join(struct phy_device *phydev, size_t priv_size);
2015void phy_package_leave(struct phy_device *phydev);
2016int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
2017 int base_addr, size_t priv_size);
2018int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev,
2019 size_t priv_size);
2020
2021int __init mdio_bus_init(void);
2022void mdio_bus_exit(void);
2023
2024int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
2025int phy_ethtool_get_sset_count(struct phy_device *phydev);
2026int phy_ethtool_get_stats(struct phy_device *phydev,
2027 struct ethtool_stats *stats, u64 *data);
2028int phy_ethtool_get_plca_cfg(struct phy_device *phydev,
2029 struct phy_plca_cfg *plca_cfg);
2030int phy_ethtool_set_plca_cfg(struct phy_device *phydev,
2031 const struct phy_plca_cfg *plca_cfg,
2032 struct netlink_ext_ack *extack);
2033int phy_ethtool_get_plca_status(struct phy_device *phydev,
2034 struct phy_plca_status *plca_st);
2035
2036int __phy_hwtstamp_get(struct phy_device *phydev,
2037 struct kernel_hwtstamp_config *config);
2038int __phy_hwtstamp_set(struct phy_device *phydev,
2039 struct kernel_hwtstamp_config *config,
2040 struct netlink_ext_ack *extack);
2041
2042static inline int phy_package_address(struct phy_device *phydev,
2043 unsigned int addr_offset)
2044{
2045 struct phy_package_shared *shared = phydev->shared;
2046 u8 base_addr = shared->base_addr;
2047
2048 if (addr_offset >= PHY_MAX_ADDR - base_addr)
2049 return -EIO;
2050
2051 /* we know that addr will be in the range 0..31 and thus the
2052 * implicit cast to a signed int is not a problem.
2053 */
2054 return base_addr + addr_offset;
2055}
2056
2057static inline int phy_package_read(struct phy_device *phydev,
2058 unsigned int addr_offset, u32 regnum)
2059{
2060 int addr = phy_package_address(phydev, addr_offset);
2061
2062 if (addr < 0)
2063 return addr;
2064
2065 return mdiobus_read(bus: phydev->mdio.bus, addr, regnum);
2066}
2067
2068static inline int __phy_package_read(struct phy_device *phydev,
2069 unsigned int addr_offset, u32 regnum)
2070{
2071 int addr = phy_package_address(phydev, addr_offset);
2072
2073 if (addr < 0)
2074 return addr;
2075
2076 return __mdiobus_read(bus: phydev->mdio.bus, addr, regnum);
2077}
2078
2079static inline int phy_package_write(struct phy_device *phydev,
2080 unsigned int addr_offset, u32 regnum,
2081 u16 val)
2082{
2083 int addr = phy_package_address(phydev, addr_offset);
2084
2085 if (addr < 0)
2086 return addr;
2087
2088 return mdiobus_write(bus: phydev->mdio.bus, addr, regnum, val);
2089}
2090
2091static inline int __phy_package_write(struct phy_device *phydev,
2092 unsigned int addr_offset, u32 regnum,
2093 u16 val)
2094{
2095 int addr = phy_package_address(phydev, addr_offset);
2096
2097 if (addr < 0)
2098 return addr;
2099
2100 return __mdiobus_write(bus: phydev->mdio.bus, addr, regnum, val);
2101}
2102
2103int __phy_package_read_mmd(struct phy_device *phydev,
2104 unsigned int addr_offset, int devad,
2105 u32 regnum);
2106
2107int phy_package_read_mmd(struct phy_device *phydev,
2108 unsigned int addr_offset, int devad,
2109 u32 regnum);
2110
2111int __phy_package_write_mmd(struct phy_device *phydev,
2112 unsigned int addr_offset, int devad,
2113 u32 regnum, u16 val);
2114
2115int phy_package_write_mmd(struct phy_device *phydev,
2116 unsigned int addr_offset, int devad,
2117 u32 regnum, u16 val);
2118
2119static inline bool __phy_package_set_once(struct phy_device *phydev,
2120 unsigned int b)
2121{
2122 struct phy_package_shared *shared = phydev->shared;
2123
2124 if (!shared)
2125 return false;
2126
2127 return !test_and_set_bit(nr: b, addr: &shared->flags);
2128}
2129
2130static inline bool phy_package_init_once(struct phy_device *phydev)
2131{
2132 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
2133}
2134
2135static inline bool phy_package_probe_once(struct phy_device *phydev)
2136{
2137 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
2138}
2139
2140extern const struct bus_type mdio_bus_type;
2141
2142struct mdio_board_info {
2143 const char *bus_id;
2144 char modalias[MDIO_NAME_SIZE];
2145 int mdio_addr;
2146 const void *platform_data;
2147};
2148
2149#if IS_ENABLED(CONFIG_MDIO_DEVICE)
2150int mdiobus_register_board_info(const struct mdio_board_info *info,
2151 unsigned int n);
2152#else
2153static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
2154 unsigned int n)
2155{
2156 return 0;
2157}
2158#endif
2159
2160
2161/**
2162 * phy_module_driver() - Helper macro for registering PHY drivers
2163 * @__phy_drivers: array of PHY drivers to register
2164 * @__count: Numbers of members in array
2165 *
2166 * Helper macro for PHY drivers which do not do anything special in module
2167 * init/exit. Each module may only use this macro once, and calling it
2168 * replaces module_init() and module_exit().
2169 */
2170#define phy_module_driver(__phy_drivers, __count) \
2171static int __init phy_module_init(void) \
2172{ \
2173 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
2174} \
2175module_init(phy_module_init); \
2176static void __exit phy_module_exit(void) \
2177{ \
2178 phy_drivers_unregister(__phy_drivers, __count); \
2179} \
2180module_exit(phy_module_exit)
2181
2182#define module_phy_driver(__phy_drivers) \
2183 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
2184
2185bool phy_driver_is_genphy(struct phy_device *phydev);
2186bool phy_driver_is_genphy_10g(struct phy_device *phydev);
2187
2188#endif /* __PHY_H */
2189

source code of linux/include/linux/phy.h