1 | //===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file defines the DAGTypeLegalizer class. This is a private interface |
10 | // shared between the code that implements the SelectionDAG::LegalizeTypes |
11 | // method. |
12 | // |
13 | //===----------------------------------------------------------------------===// |
14 | |
15 | #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H |
16 | #define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H |
17 | |
18 | #include "MatchContext.h" |
19 | #include "llvm/ADT/DenseMap.h" |
20 | #include "llvm/CodeGen/SelectionDAG.h" |
21 | #include "llvm/CodeGen/TargetLowering.h" |
22 | #include "llvm/Support/Compiler.h" |
23 | |
24 | namespace llvm { |
25 | |
26 | //===----------------------------------------------------------------------===// |
27 | /// This takes an arbitrary SelectionDAG as input and hacks on it until only |
28 | /// value types the target machine can handle are left. This involves promoting |
29 | /// small sizes to large sizes or splitting up large values into small values. |
30 | /// |
31 | class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer { |
32 | const TargetLowering &TLI; |
33 | SelectionDAG &DAG; |
34 | public: |
35 | /// This pass uses the NodeId on the SDNodes to hold information about the |
36 | /// state of the node. The enum has all the values. |
37 | enum NodeIdFlags { |
38 | /// All operands have been processed, so this node is ready to be handled. |
39 | ReadyToProcess = 0, |
40 | |
41 | /// This is a new node, not before seen, that was created in the process of |
42 | /// legalizing some other node. |
43 | NewNode = -1, |
44 | |
45 | /// This node's ID needs to be set to the number of its unprocessed |
46 | /// operands. |
47 | Unanalyzed = -2, |
48 | |
49 | /// This is a node that has already been processed. |
50 | Processed = -3 |
51 | |
52 | // 1+ - This is a node which has this many unprocessed operands. |
53 | }; |
54 | private: |
55 | |
56 | /// This is a bitvector that contains two bits for each simple value type, |
57 | /// where the two bits correspond to the LegalizeAction enum from |
58 | /// TargetLowering. This can be queried with "getTypeAction(VT)". |
59 | TargetLowering::ValueTypeActionImpl ValueTypeActions; |
60 | |
61 | /// Return how we should legalize values of this type. |
62 | TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const { |
63 | return TLI.getTypeAction(Context&: *DAG.getContext(), VT); |
64 | } |
65 | |
66 | /// Return true if this type is legal on this target. |
67 | bool isTypeLegal(EVT VT) const { |
68 | return TLI.getTypeAction(Context&: *DAG.getContext(), VT) == TargetLowering::TypeLegal; |
69 | } |
70 | |
71 | /// Return true if this is a simple legal type. |
72 | bool isSimpleLegalType(EVT VT) const { |
73 | return VT.isSimple() && TLI.isTypeLegal(VT); |
74 | } |
75 | |
76 | EVT getSetCCResultType(EVT VT) const { |
77 | return TLI.getSetCCResultType(DL: DAG.getDataLayout(), Context&: *DAG.getContext(), VT); |
78 | } |
79 | |
80 | /// Pretend all of this node's results are legal. |
81 | bool IgnoreNodeResults(SDNode *N) const { |
82 | return N->getOpcode() == ISD::TargetConstant || |
83 | N->getOpcode() == ISD::Register; |
84 | } |
85 | |
86 | // Bijection from SDValue to unique id. As each created node gets a |
87 | // new id we do not need to worry about reuse expunging. Should we |
88 | // run out of ids, we can do a one time expensive compactifcation. |
89 | typedef unsigned TableId; |
90 | |
91 | TableId NextValueId = 1; |
92 | |
93 | SmallDenseMap<SDValue, TableId, 8> ValueToIdMap; |
94 | SmallDenseMap<TableId, SDValue, 8> IdToValueMap; |
95 | |
96 | /// For integer nodes that are below legal width, this map indicates what |
97 | /// promoted value to use. |
98 | SmallDenseMap<TableId, TableId, 8> PromotedIntegers; |
99 | |
100 | /// For integer nodes that need to be expanded this map indicates which |
101 | /// operands are the expanded version of the input. |
102 | SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> ExpandedIntegers; |
103 | |
104 | /// For floating-point nodes converted to integers of the same size, this map |
105 | /// indicates the converted value to use. |
106 | SmallDenseMap<TableId, TableId, 8> SoftenedFloats; |
107 | |
108 | /// For floating-point nodes that have a smaller precision than the smallest |
109 | /// supported precision, this map indicates what promoted value to use. |
110 | SmallDenseMap<TableId, TableId, 8> PromotedFloats; |
111 | |
112 | /// For floating-point nodes that have a smaller precision than the smallest |
113 | /// supported precision, this map indicates the converted value to use. |
114 | SmallDenseMap<TableId, TableId, 8> SoftPromotedHalfs; |
115 | |
116 | /// For float nodes that need to be expanded this map indicates which operands |
117 | /// are the expanded version of the input. |
118 | SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> ExpandedFloats; |
119 | |
120 | /// For nodes that are <1 x ty>, this map indicates the scalar value of type |
121 | /// 'ty' to use. |
122 | SmallDenseMap<TableId, TableId, 8> ScalarizedVectors; |
123 | |
124 | /// For nodes that need to be split this map indicates which operands are the |
125 | /// expanded version of the input. |
126 | SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> SplitVectors; |
127 | |
128 | /// For vector nodes that need to be widened, indicates the widened value to |
129 | /// use. |
130 | SmallDenseMap<TableId, TableId, 8> WidenedVectors; |
131 | |
132 | /// For values that have been replaced with another, indicates the replacement |
133 | /// value to use. |
134 | SmallDenseMap<TableId, TableId, 8> ReplacedValues; |
135 | |
136 | /// This defines a worklist of nodes to process. In order to be pushed onto |
137 | /// this worklist, all operands of a node must have already been processed. |
138 | SmallVector<SDNode*, 128> Worklist; |
139 | |
140 | TableId getTableId(SDValue V) { |
141 | assert(V.getNode() && "Getting TableId on SDValue()" ); |
142 | |
143 | auto I = ValueToIdMap.find(Val: V); |
144 | if (I != ValueToIdMap.end()) { |
145 | // replace if there's been a shift. |
146 | RemapId(Id&: I->second); |
147 | assert(I->second && "All Ids should be nonzero" ); |
148 | return I->second; |
149 | } |
150 | // Add if it's not there. |
151 | ValueToIdMap.insert(KV: std::make_pair(x&: V, y&: NextValueId)); |
152 | IdToValueMap.insert(KV: std::make_pair(x&: NextValueId, y&: V)); |
153 | ++NextValueId; |
154 | assert(NextValueId != 0 && |
155 | "Ran out of Ids. Increase id type size or add compactification" ); |
156 | return NextValueId - 1; |
157 | } |
158 | |
159 | const SDValue &getSDValue(TableId &Id) { |
160 | RemapId(Id); |
161 | assert(Id && "TableId should be non-zero" ); |
162 | auto I = IdToValueMap.find(Val: Id); |
163 | assert(I != IdToValueMap.end() && "cannot find Id in map" ); |
164 | return I->second; |
165 | } |
166 | |
167 | public: |
168 | explicit DAGTypeLegalizer(SelectionDAG &dag) |
169 | : TLI(dag.getTargetLoweringInfo()), DAG(dag), |
170 | ValueTypeActions(TLI.getValueTypeActions()) { |
171 | static_assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE, |
172 | "Too many value types for ValueTypeActions to hold!" ); |
173 | } |
174 | |
175 | /// This is the main entry point for the type legalizer. This does a |
176 | /// top-down traversal of the dag, legalizing types as it goes. Returns |
177 | /// "true" if it made any changes. |
178 | bool run(); |
179 | |
180 | void NoteDeletion(SDNode *Old, SDNode *New) { |
181 | assert(Old != New && "node replaced with self" ); |
182 | for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i) { |
183 | TableId NewId = getTableId(V: SDValue(New, i)); |
184 | TableId OldId = getTableId(V: SDValue(Old, i)); |
185 | |
186 | if (OldId != NewId) { |
187 | ReplacedValues[OldId] = NewId; |
188 | |
189 | // Delete Node from tables. We cannot do this when OldId == NewId, |
190 | // because NewId can still have table references to it in |
191 | // ReplacedValues. |
192 | IdToValueMap.erase(Val: OldId); |
193 | PromotedIntegers.erase(Val: OldId); |
194 | ExpandedIntegers.erase(Val: OldId); |
195 | SoftenedFloats.erase(Val: OldId); |
196 | PromotedFloats.erase(Val: OldId); |
197 | SoftPromotedHalfs.erase(Val: OldId); |
198 | ExpandedFloats.erase(Val: OldId); |
199 | ScalarizedVectors.erase(Val: OldId); |
200 | SplitVectors.erase(Val: OldId); |
201 | WidenedVectors.erase(Val: OldId); |
202 | } |
203 | |
204 | ValueToIdMap.erase(Val: SDValue(Old, i)); |
205 | } |
206 | } |
207 | |
208 | SelectionDAG &getDAG() const { return DAG; } |
209 | |
210 | private: |
211 | SDNode *AnalyzeNewNode(SDNode *N); |
212 | void AnalyzeNewValue(SDValue &Val); |
213 | void PerformExpensiveChecks(); |
214 | void RemapId(TableId &Id); |
215 | void RemapValue(SDValue &V); |
216 | |
217 | // Common routines. |
218 | SDValue BitConvertToInteger(SDValue Op); |
219 | SDValue BitConvertVectorToIntegerVector(SDValue Op); |
220 | SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT); |
221 | bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult); |
222 | bool CustomWidenLowerNode(SDNode *N, EVT VT); |
223 | |
224 | /// Replace each result of the given MERGE_VALUES node with the corresponding |
225 | /// input operand, except for the result 'ResNo', for which the corresponding |
226 | /// input operand is returned. |
227 | SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo); |
228 | |
229 | SDValue JoinIntegers(SDValue Lo, SDValue Hi); |
230 | |
231 | std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node); |
232 | |
233 | SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT); |
234 | |
235 | void ReplaceValueWith(SDValue From, SDValue To); |
236 | void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi); |
237 | void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT, |
238 | SDValue &Lo, SDValue &Hi); |
239 | |
240 | //===--------------------------------------------------------------------===// |
241 | // Integer Promotion Support: LegalizeIntegerTypes.cpp |
242 | //===--------------------------------------------------------------------===// |
243 | |
244 | /// Given a processed operand Op which was promoted to a larger integer type, |
245 | /// this returns the promoted value. The low bits of the promoted value |
246 | /// corresponding to the original type are exactly equal to Op. |
247 | /// The extra bits contain rubbish, so the promoted value may need to be zero- |
248 | /// or sign-extended from the original type before it is usable (the helpers |
249 | /// SExtPromotedInteger and ZExtPromotedInteger can do this for you). |
250 | /// For example, if Op is an i16 and was promoted to an i32, then this method |
251 | /// returns an i32, the lower 16 bits of which coincide with Op, and the upper |
252 | /// 16 bits of which contain rubbish. |
253 | SDValue GetPromotedInteger(SDValue Op) { |
254 | TableId &PromotedId = PromotedIntegers[getTableId(V: Op)]; |
255 | SDValue PromotedOp = getSDValue(Id&: PromotedId); |
256 | assert(PromotedOp.getNode() && "Operand wasn't promoted?" ); |
257 | return PromotedOp; |
258 | } |
259 | void SetPromotedInteger(SDValue Op, SDValue Result); |
260 | |
261 | /// Get a promoted operand and sign extend it to the final size. |
262 | SDValue SExtPromotedInteger(SDValue Op) { |
263 | EVT OldVT = Op.getValueType(); |
264 | SDLoc dl(Op); |
265 | Op = GetPromotedInteger(Op); |
266 | return DAG.getNode(Opcode: ISD::SIGN_EXTEND_INREG, DL: dl, VT: Op.getValueType(), N1: Op, |
267 | N2: DAG.getValueType(OldVT)); |
268 | } |
269 | |
270 | /// Get a promoted operand and zero extend it to the final size. |
271 | SDValue ZExtPromotedInteger(SDValue Op) { |
272 | EVT OldVT = Op.getValueType(); |
273 | SDLoc dl(Op); |
274 | Op = GetPromotedInteger(Op); |
275 | return DAG.getZeroExtendInReg(Op, DL: dl, VT: OldVT); |
276 | } |
277 | |
278 | // Promote the given operand V (vector or scalar) according to N's specific |
279 | // reduction kind. N must be an integer VECREDUCE_* or VP_REDUCE_*. Returns |
280 | // the nominal extension opcode (ISD::(ANY|ZERO|SIGN)_EXTEND) and the |
281 | // promoted value. |
282 | SDValue PromoteIntOpVectorReduction(SDNode *N, SDValue V); |
283 | |
284 | // Integer Result Promotion. |
285 | void PromoteIntegerResult(SDNode *N, unsigned ResNo); |
286 | SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo); |
287 | SDValue PromoteIntRes_AssertSext(SDNode *N); |
288 | SDValue PromoteIntRes_AssertZext(SDNode *N); |
289 | SDValue PromoteIntRes_Atomic0(AtomicSDNode *N); |
290 | SDValue PromoteIntRes_Atomic1(AtomicSDNode *N); |
291 | SDValue PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo); |
292 | SDValue (SDNode *N); |
293 | SDValue PromoteIntRes_INSERT_SUBVECTOR(SDNode *N); |
294 | SDValue PromoteIntRes_VECTOR_REVERSE(SDNode *N); |
295 | SDValue PromoteIntRes_VECTOR_SHUFFLE(SDNode *N); |
296 | SDValue PromoteIntRes_VECTOR_SPLICE(SDNode *N); |
297 | SDValue PromoteIntRes_VECTOR_INTERLEAVE_DEINTERLEAVE(SDNode *N); |
298 | SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N); |
299 | SDValue PromoteIntRes_ScalarOp(SDNode *N); |
300 | SDValue PromoteIntRes_STEP_VECTOR(SDNode *N); |
301 | SDValue PromoteIntRes_EXTEND_VECTOR_INREG(SDNode *N); |
302 | SDValue PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N); |
303 | SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N); |
304 | SDValue PromoteIntRes_BITCAST(SDNode *N); |
305 | SDValue PromoteIntRes_BSWAP(SDNode *N); |
306 | SDValue PromoteIntRes_BITREVERSE(SDNode *N); |
307 | SDValue PromoteIntRes_BUILD_PAIR(SDNode *N); |
308 | SDValue PromoteIntRes_Constant(SDNode *N); |
309 | SDValue PromoteIntRes_CTLZ(SDNode *N); |
310 | SDValue PromoteIntRes_CTPOP_PARITY(SDNode *N); |
311 | SDValue PromoteIntRes_CTTZ(SDNode *N); |
312 | SDValue (SDNode *N); |
313 | SDValue PromoteIntRes_FP_TO_XINT(SDNode *N); |
314 | SDValue PromoteIntRes_FP_TO_XINT_SAT(SDNode *N); |
315 | SDValue PromoteIntRes_FP_TO_FP16_BF16(SDNode *N); |
316 | SDValue PromoteIntRes_STRICT_FP_TO_FP16_BF16(SDNode *N); |
317 | SDValue PromoteIntRes_XRINT(SDNode *N); |
318 | SDValue PromoteIntRes_FREEZE(SDNode *N); |
319 | SDValue PromoteIntRes_INT_EXTEND(SDNode *N); |
320 | SDValue PromoteIntRes_LOAD(LoadSDNode *N); |
321 | SDValue PromoteIntRes_MLOAD(MaskedLoadSDNode *N); |
322 | SDValue PromoteIntRes_MGATHER(MaskedGatherSDNode *N); |
323 | SDValue PromoteIntRes_Overflow(SDNode *N); |
324 | SDValue PromoteIntRes_FFREXP(SDNode *N); |
325 | SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo); |
326 | SDValue PromoteIntRes_Select(SDNode *N); |
327 | SDValue PromoteIntRes_SELECT_CC(SDNode *N); |
328 | SDValue PromoteIntRes_SETCC(SDNode *N); |
329 | SDValue PromoteIntRes_SHL(SDNode *N); |
330 | SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N); |
331 | SDValue PromoteIntRes_ZExtIntBinOp(SDNode *N); |
332 | SDValue PromoteIntRes_SExtIntBinOp(SDNode *N); |
333 | SDValue PromoteIntRes_UMINUMAX(SDNode *N); |
334 | SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N); |
335 | SDValue PromoteIntRes_SRA(SDNode *N); |
336 | SDValue PromoteIntRes_SRL(SDNode *N); |
337 | SDValue PromoteIntRes_TRUNCATE(SDNode *N); |
338 | SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo); |
339 | SDValue PromoteIntRes_UADDSUBO_CARRY(SDNode *N, unsigned ResNo); |
340 | SDValue PromoteIntRes_SADDSUBO_CARRY(SDNode *N, unsigned ResNo); |
341 | SDValue PromoteIntRes_UNDEF(SDNode *N); |
342 | SDValue PromoteIntRes_VAARG(SDNode *N); |
343 | SDValue PromoteIntRes_VSCALE(SDNode *N); |
344 | SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo); |
345 | template <class MatchContextClass> |
346 | SDValue PromoteIntRes_ADDSUBSHLSAT(SDNode *N); |
347 | SDValue PromoteIntRes_MULFIX(SDNode *N); |
348 | SDValue PromoteIntRes_DIVFIX(SDNode *N); |
349 | SDValue PromoteIntRes_GET_ROUNDING(SDNode *N); |
350 | SDValue PromoteIntRes_VECREDUCE(SDNode *N); |
351 | SDValue PromoteIntRes_VP_REDUCE(SDNode *N); |
352 | SDValue PromoteIntRes_ABS(SDNode *N); |
353 | SDValue PromoteIntRes_Rotate(SDNode *N); |
354 | SDValue PromoteIntRes_FunnelShift(SDNode *N); |
355 | SDValue PromoteIntRes_VPFunnelShift(SDNode *N); |
356 | SDValue PromoteIntRes_IS_FPCLASS(SDNode *N); |
357 | |
358 | // Integer Operand Promotion. |
359 | bool PromoteIntegerOperand(SDNode *N, unsigned OpNo); |
360 | SDValue PromoteIntOp_ANY_EXTEND(SDNode *N); |
361 | SDValue PromoteIntOp_ATOMIC_STORE(AtomicSDNode *N); |
362 | SDValue PromoteIntOp_BITCAST(SDNode *N); |
363 | SDValue PromoteIntOp_BUILD_PAIR(SDNode *N); |
364 | SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo); |
365 | SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo); |
366 | SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N); |
367 | SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo); |
368 | SDValue (SDNode *N); |
369 | SDValue (SDNode *N); |
370 | SDValue PromoteIntOp_INSERT_SUBVECTOR(SDNode *N); |
371 | SDValue PromoteIntOp_CONCAT_VECTORS(SDNode *N); |
372 | SDValue PromoteIntOp_ScalarOp(SDNode *N); |
373 | SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo); |
374 | SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo); |
375 | SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo); |
376 | SDValue PromoteIntOp_Shift(SDNode *N); |
377 | SDValue PromoteIntOp_FunnelShift(SDNode *N); |
378 | SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N); |
379 | SDValue PromoteIntOp_VP_SIGN_EXTEND(SDNode *N); |
380 | SDValue PromoteIntOp_SINT_TO_FP(SDNode *N); |
381 | SDValue PromoteIntOp_STRICT_SINT_TO_FP(SDNode *N); |
382 | SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo); |
383 | SDValue PromoteIntOp_TRUNCATE(SDNode *N); |
384 | SDValue PromoteIntOp_UINT_TO_FP(SDNode *N); |
385 | SDValue PromoteIntOp_STRICT_UINT_TO_FP(SDNode *N); |
386 | SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N); |
387 | SDValue PromoteIntOp_VP_ZERO_EXTEND(SDNode *N); |
388 | SDValue PromoteIntOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo); |
389 | SDValue PromoteIntOp_MLOAD(MaskedLoadSDNode *N, unsigned OpNo); |
390 | SDValue PromoteIntOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo); |
391 | SDValue PromoteIntOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo); |
392 | SDValue PromoteIntOp_FRAMERETURNADDR(SDNode *N); |
393 | SDValue PromoteIntOp_FIX(SDNode *N); |
394 | SDValue PromoteIntOp_ExpOp(SDNode *N); |
395 | SDValue PromoteIntOp_VECREDUCE(SDNode *N); |
396 | SDValue PromoteIntOp_VP_REDUCE(SDNode *N, unsigned OpNo); |
397 | SDValue PromoteIntOp_SET_ROUNDING(SDNode *N); |
398 | SDValue PromoteIntOp_STACKMAP(SDNode *N, unsigned OpNo); |
399 | SDValue PromoteIntOp_PATCHPOINT(SDNode *N, unsigned OpNo); |
400 | SDValue PromoteIntOp_VP_STRIDED(SDNode *N, unsigned OpNo); |
401 | SDValue PromoteIntOp_VP_SPLICE(SDNode *N, unsigned OpNo); |
402 | |
403 | void SExtOrZExtPromotedOperands(SDValue &LHS, SDValue &RHS); |
404 | void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code); |
405 | |
406 | //===--------------------------------------------------------------------===// |
407 | // Integer Expansion Support: LegalizeIntegerTypes.cpp |
408 | //===--------------------------------------------------------------------===// |
409 | |
410 | /// Given a processed operand Op which was expanded into two integers of half |
411 | /// the size, this returns the two halves. The low bits of Op are exactly |
412 | /// equal to the bits of Lo; the high bits exactly equal Hi. |
413 | /// For example, if Op is an i64 which was expanded into two i32's, then this |
414 | /// method returns the two i32's, with Lo being equal to the lower 32 bits of |
415 | /// Op, and Hi being equal to the upper 32 bits. |
416 | void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi); |
417 | void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi); |
418 | |
419 | // Integer Result Expansion. |
420 | void ExpandIntegerResult(SDNode *N, unsigned ResNo); |
421 | void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); |
422 | void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi); |
423 | void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi); |
424 | void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi); |
425 | void ExpandIntRes_ABS (SDNode *N, SDValue &Lo, SDValue &Hi); |
426 | void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi); |
427 | void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi); |
428 | void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi); |
429 | void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi); |
430 | void ExpandIntRes_READCOUNTER (SDNode *N, SDValue &Lo, SDValue &Hi); |
431 | void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); |
432 | void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi); |
433 | void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi); |
434 | void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); |
435 | void ExpandIntRes_GET_ROUNDING (SDNode *N, SDValue &Lo, SDValue &Hi); |
436 | void ExpandIntRes_FP_TO_XINT (SDNode *N, SDValue &Lo, SDValue &Hi); |
437 | void ExpandIntRes_FP_TO_XINT_SAT (SDNode *N, SDValue &Lo, SDValue &Hi); |
438 | void ExpandIntRes_XROUND_XRINT (SDNode *N, SDValue &Lo, SDValue &Hi); |
439 | |
440 | void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi); |
441 | void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi); |
442 | void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi); |
443 | void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi); |
444 | void ExpandIntRes_UADDSUBO_CARRY (SDNode *N, SDValue &Lo, SDValue &Hi); |
445 | void ExpandIntRes_SADDSUBO_CARRY (SDNode *N, SDValue &Lo, SDValue &Hi); |
446 | void ExpandIntRes_BITREVERSE (SDNode *N, SDValue &Lo, SDValue &Hi); |
447 | void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi); |
448 | void ExpandIntRes_PARITY (SDNode *N, SDValue &Lo, SDValue &Hi); |
449 | void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi); |
450 | void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi); |
451 | void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi); |
452 | void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi); |
453 | void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi); |
454 | void ExpandIntRes_ShiftThroughStack (SDNode *N, SDValue &Lo, SDValue &Hi); |
455 | void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi); |
456 | |
457 | void ExpandIntRes_MINMAX (SDNode *N, SDValue &Lo, SDValue &Hi); |
458 | |
459 | void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi); |
460 | void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi); |
461 | void ExpandIntRes_XMULO (SDNode *N, SDValue &Lo, SDValue &Hi); |
462 | void ExpandIntRes_ADDSUBSAT (SDNode *N, SDValue &Lo, SDValue &Hi); |
463 | void ExpandIntRes_SHLSAT (SDNode *N, SDValue &Lo, SDValue &Hi); |
464 | void ExpandIntRes_MULFIX (SDNode *N, SDValue &Lo, SDValue &Hi); |
465 | void ExpandIntRes_DIVFIX (SDNode *N, SDValue &Lo, SDValue &Hi); |
466 | |
467 | void ExpandIntRes_ATOMIC_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi); |
468 | void ExpandIntRes_VECREDUCE (SDNode *N, SDValue &Lo, SDValue &Hi); |
469 | |
470 | void ExpandIntRes_Rotate (SDNode *N, SDValue &Lo, SDValue &Hi); |
471 | void ExpandIntRes_FunnelShift (SDNode *N, SDValue &Lo, SDValue &Hi); |
472 | |
473 | void ExpandIntRes_VSCALE (SDNode *N, SDValue &Lo, SDValue &Hi); |
474 | |
475 | void ExpandShiftByConstant(SDNode *N, const APInt &Amt, |
476 | SDValue &Lo, SDValue &Hi); |
477 | bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi); |
478 | bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi); |
479 | |
480 | // Integer Operand Expansion. |
481 | bool ExpandIntegerOperand(SDNode *N, unsigned OpNo); |
482 | SDValue ExpandIntOp_BR_CC(SDNode *N); |
483 | SDValue ExpandIntOp_SELECT_CC(SDNode *N); |
484 | SDValue ExpandIntOp_SETCC(SDNode *N); |
485 | SDValue ExpandIntOp_SETCCCARRY(SDNode *N); |
486 | SDValue ExpandIntOp_Shift(SDNode *N); |
487 | SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo); |
488 | SDValue ExpandIntOp_TRUNCATE(SDNode *N); |
489 | SDValue ExpandIntOp_XINT_TO_FP(SDNode *N); |
490 | SDValue ExpandIntOp_RETURNADDR(SDNode *N); |
491 | SDValue ExpandIntOp_ATOMIC_STORE(SDNode *N); |
492 | SDValue ExpandIntOp_SPLAT_VECTOR(SDNode *N); |
493 | SDValue ExpandIntOp_STACKMAP(SDNode *N, unsigned OpNo); |
494 | SDValue ExpandIntOp_PATCHPOINT(SDNode *N, unsigned OpNo); |
495 | SDValue ExpandIntOp_VP_STRIDED(SDNode *N, unsigned OpNo); |
496 | |
497 | void IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS, |
498 | ISD::CondCode &CCCode, const SDLoc &dl); |
499 | |
500 | //===--------------------------------------------------------------------===// |
501 | // Float to Integer Conversion Support: LegalizeFloatTypes.cpp |
502 | //===--------------------------------------------------------------------===// |
503 | |
504 | /// GetSoftenedFloat - Given a processed operand Op which was converted to an |
505 | /// integer of the same size, this returns the integer. The integer contains |
506 | /// exactly the same bits as Op - only the type changed. For example, if Op |
507 | /// is an f32 which was softened to an i32, then this method returns an i32, |
508 | /// the bits of which coincide with those of Op |
509 | SDValue GetSoftenedFloat(SDValue Op) { |
510 | TableId Id = getTableId(V: Op); |
511 | auto Iter = SoftenedFloats.find(Val: Id); |
512 | if (Iter == SoftenedFloats.end()) { |
513 | assert(isSimpleLegalType(Op.getValueType()) && |
514 | "Operand wasn't converted to integer?" ); |
515 | return Op; |
516 | } |
517 | SDValue SoftenedOp = getSDValue(Id&: Iter->second); |
518 | assert(SoftenedOp.getNode() && "Unconverted op in SoftenedFloats?" ); |
519 | return SoftenedOp; |
520 | } |
521 | void SetSoftenedFloat(SDValue Op, SDValue Result); |
522 | |
523 | // Convert Float Results to Integer. |
524 | void SoftenFloatResult(SDNode *N, unsigned ResNo); |
525 | SDValue SoftenFloatRes_Unary(SDNode *N, RTLIB::Libcall LC); |
526 | SDValue SoftenFloatRes_Binary(SDNode *N, RTLIB::Libcall LC); |
527 | SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo); |
528 | SDValue SoftenFloatRes_ARITH_FENCE(SDNode *N); |
529 | SDValue SoftenFloatRes_BITCAST(SDNode *N); |
530 | SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N); |
531 | SDValue SoftenFloatRes_ConstantFP(SDNode *N); |
532 | SDValue (SDNode *N); |
533 | SDValue (SDNode *N, unsigned ResNo); |
534 | SDValue SoftenFloatRes_FABS(SDNode *N); |
535 | SDValue SoftenFloatRes_FMINNUM(SDNode *N); |
536 | SDValue SoftenFloatRes_FMAXNUM(SDNode *N); |
537 | SDValue SoftenFloatRes_FADD(SDNode *N); |
538 | SDValue SoftenFloatRes_FCBRT(SDNode *N); |
539 | SDValue SoftenFloatRes_FCEIL(SDNode *N); |
540 | SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N); |
541 | SDValue SoftenFloatRes_FCOS(SDNode *N); |
542 | SDValue SoftenFloatRes_FDIV(SDNode *N); |
543 | SDValue SoftenFloatRes_FEXP(SDNode *N); |
544 | SDValue SoftenFloatRes_FEXP2(SDNode *N); |
545 | SDValue SoftenFloatRes_FEXP10(SDNode *N); |
546 | SDValue SoftenFloatRes_FFLOOR(SDNode *N); |
547 | SDValue SoftenFloatRes_FLOG(SDNode *N); |
548 | SDValue SoftenFloatRes_FLOG2(SDNode *N); |
549 | SDValue SoftenFloatRes_FLOG10(SDNode *N); |
550 | SDValue SoftenFloatRes_FMA(SDNode *N); |
551 | SDValue SoftenFloatRes_FMUL(SDNode *N); |
552 | SDValue SoftenFloatRes_FNEARBYINT(SDNode *N); |
553 | SDValue SoftenFloatRes_FNEG(SDNode *N); |
554 | SDValue SoftenFloatRes_FP_EXTEND(SDNode *N); |
555 | SDValue SoftenFloatRes_FP16_TO_FP(SDNode *N); |
556 | SDValue SoftenFloatRes_BF16_TO_FP(SDNode *N); |
557 | SDValue SoftenFloatRes_FP_ROUND(SDNode *N); |
558 | SDValue SoftenFloatRes_FPOW(SDNode *N); |
559 | SDValue SoftenFloatRes_ExpOp(SDNode *N); |
560 | SDValue SoftenFloatRes_FFREXP(SDNode *N); |
561 | SDValue SoftenFloatRes_FREEZE(SDNode *N); |
562 | SDValue SoftenFloatRes_FREM(SDNode *N); |
563 | SDValue SoftenFloatRes_FRINT(SDNode *N); |
564 | SDValue SoftenFloatRes_FROUND(SDNode *N); |
565 | SDValue SoftenFloatRes_FROUNDEVEN(SDNode *N); |
566 | SDValue SoftenFloatRes_FSIN(SDNode *N); |
567 | SDValue SoftenFloatRes_FSQRT(SDNode *N); |
568 | SDValue SoftenFloatRes_FSUB(SDNode *N); |
569 | SDValue SoftenFloatRes_FTRUNC(SDNode *N); |
570 | SDValue SoftenFloatRes_LOAD(SDNode *N); |
571 | SDValue SoftenFloatRes_SELECT(SDNode *N); |
572 | SDValue SoftenFloatRes_SELECT_CC(SDNode *N); |
573 | SDValue SoftenFloatRes_UNDEF(SDNode *N); |
574 | SDValue SoftenFloatRes_VAARG(SDNode *N); |
575 | SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N); |
576 | SDValue SoftenFloatRes_VECREDUCE(SDNode *N); |
577 | SDValue SoftenFloatRes_VECREDUCE_SEQ(SDNode *N); |
578 | |
579 | // Convert Float Operand to Integer. |
580 | bool SoftenFloatOperand(SDNode *N, unsigned OpNo); |
581 | SDValue SoftenFloatOp_Unary(SDNode *N, RTLIB::Libcall LC); |
582 | SDValue SoftenFloatOp_BITCAST(SDNode *N); |
583 | SDValue SoftenFloatOp_BR_CC(SDNode *N); |
584 | SDValue SoftenFloatOp_FP_ROUND(SDNode *N); |
585 | SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N); |
586 | SDValue SoftenFloatOp_FP_TO_XINT_SAT(SDNode *N); |
587 | SDValue SoftenFloatOp_LROUND(SDNode *N); |
588 | SDValue SoftenFloatOp_LLROUND(SDNode *N); |
589 | SDValue SoftenFloatOp_LRINT(SDNode *N); |
590 | SDValue SoftenFloatOp_LLRINT(SDNode *N); |
591 | SDValue SoftenFloatOp_SELECT_CC(SDNode *N); |
592 | SDValue SoftenFloatOp_SETCC(SDNode *N); |
593 | SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo); |
594 | SDValue SoftenFloatOp_FCOPYSIGN(SDNode *N); |
595 | |
596 | //===--------------------------------------------------------------------===// |
597 | // Float Expansion Support: LegalizeFloatTypes.cpp |
598 | //===--------------------------------------------------------------------===// |
599 | |
600 | /// Given a processed operand Op which was expanded into two floating-point |
601 | /// values of half the size, this returns the two halves. |
602 | /// The low bits of Op are exactly equal to the bits of Lo; the high bits |
603 | /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded |
604 | /// into two f64's, then this method returns the two f64's, with Lo being |
605 | /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits. |
606 | void GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi); |
607 | void SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi); |
608 | |
609 | // Float Result Expansion. |
610 | void ExpandFloatResult(SDNode *N, unsigned ResNo); |
611 | void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi); |
612 | void ExpandFloatRes_Unary(SDNode *N, RTLIB::Libcall LC, |
613 | SDValue &Lo, SDValue &Hi); |
614 | void ExpandFloatRes_Binary(SDNode *N, RTLIB::Libcall LC, |
615 | SDValue &Lo, SDValue &Hi); |
616 | void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi); |
617 | void ExpandFloatRes_FMINNUM (SDNode *N, SDValue &Lo, SDValue &Hi); |
618 | void ExpandFloatRes_FMAXNUM (SDNode *N, SDValue &Lo, SDValue &Hi); |
619 | void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi); |
620 | void ExpandFloatRes_FCBRT (SDNode *N, SDValue &Lo, SDValue &Hi); |
621 | void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi); |
622 | void ExpandFloatRes_FCOPYSIGN (SDNode *N, SDValue &Lo, SDValue &Hi); |
623 | void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi); |
624 | void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi); |
625 | void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi); |
626 | void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi); |
627 | void ExpandFloatRes_FEXP10 (SDNode *N, SDValue &Lo, SDValue &Hi); |
628 | void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi); |
629 | void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi); |
630 | void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi); |
631 | void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi); |
632 | void ExpandFloatRes_FMA (SDNode *N, SDValue &Lo, SDValue &Hi); |
633 | void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi); |
634 | void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi); |
635 | void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi); |
636 | void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); |
637 | void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi); |
638 | void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi); |
639 | void ExpandFloatRes_FLDEXP (SDNode *N, SDValue &Lo, SDValue &Hi); |
640 | void ExpandFloatRes_FREEZE (SDNode *N, SDValue &Lo, SDValue &Hi); |
641 | void ExpandFloatRes_FREM (SDNode *N, SDValue &Lo, SDValue &Hi); |
642 | void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi); |
643 | void ExpandFloatRes_FROUND (SDNode *N, SDValue &Lo, SDValue &Hi); |
644 | void ExpandFloatRes_FROUNDEVEN(SDNode *N, SDValue &Lo, SDValue &Hi); |
645 | void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi); |
646 | void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi); |
647 | void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi); |
648 | void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi); |
649 | void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi); |
650 | void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi); |
651 | |
652 | // Float Operand Expansion. |
653 | bool ExpandFloatOperand(SDNode *N, unsigned OpNo); |
654 | SDValue ExpandFloatOp_BR_CC(SDNode *N); |
655 | SDValue ExpandFloatOp_FCOPYSIGN(SDNode *N); |
656 | SDValue ExpandFloatOp_FP_ROUND(SDNode *N); |
657 | SDValue ExpandFloatOp_FP_TO_XINT(SDNode *N); |
658 | SDValue ExpandFloatOp_LROUND(SDNode *N); |
659 | SDValue ExpandFloatOp_LLROUND(SDNode *N); |
660 | SDValue ExpandFloatOp_LRINT(SDNode *N); |
661 | SDValue ExpandFloatOp_LLRINT(SDNode *N); |
662 | SDValue ExpandFloatOp_SELECT_CC(SDNode *N); |
663 | SDValue ExpandFloatOp_SETCC(SDNode *N); |
664 | SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo); |
665 | |
666 | void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS, |
667 | ISD::CondCode &CCCode, const SDLoc &dl, |
668 | SDValue &Chain, bool IsSignaling = false); |
669 | |
670 | //===--------------------------------------------------------------------===// |
671 | // Float promotion support: LegalizeFloatTypes.cpp |
672 | //===--------------------------------------------------------------------===// |
673 | |
674 | SDValue GetPromotedFloat(SDValue Op) { |
675 | TableId &PromotedId = PromotedFloats[getTableId(V: Op)]; |
676 | SDValue PromotedOp = getSDValue(Id&: PromotedId); |
677 | assert(PromotedOp.getNode() && "Operand wasn't promoted?" ); |
678 | return PromotedOp; |
679 | } |
680 | void SetPromotedFloat(SDValue Op, SDValue Result); |
681 | |
682 | void PromoteFloatResult(SDNode *N, unsigned ResNo); |
683 | SDValue PromoteFloatRes_BITCAST(SDNode *N); |
684 | SDValue PromoteFloatRes_BinOp(SDNode *N); |
685 | SDValue PromoteFloatRes_ConstantFP(SDNode *N); |
686 | SDValue (SDNode *N); |
687 | SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N); |
688 | SDValue PromoteFloatRes_FMAD(SDNode *N); |
689 | SDValue PromoteFloatRes_ExpOp(SDNode *N); |
690 | SDValue PromoteFloatRes_FFREXP(SDNode *N); |
691 | SDValue PromoteFloatRes_FP_ROUND(SDNode *N); |
692 | SDValue PromoteFloatRes_STRICT_FP_ROUND(SDNode *N); |
693 | SDValue PromoteFloatRes_LOAD(SDNode *N); |
694 | SDValue PromoteFloatRes_SELECT(SDNode *N); |
695 | SDValue PromoteFloatRes_SELECT_CC(SDNode *N); |
696 | SDValue PromoteFloatRes_UnaryOp(SDNode *N); |
697 | SDValue PromoteFloatRes_UNDEF(SDNode *N); |
698 | SDValue BitcastToInt_ATOMIC_SWAP(SDNode *N); |
699 | SDValue PromoteFloatRes_XINT_TO_FP(SDNode *N); |
700 | SDValue PromoteFloatRes_VECREDUCE(SDNode *N); |
701 | SDValue PromoteFloatRes_VECREDUCE_SEQ(SDNode *N); |
702 | |
703 | bool PromoteFloatOperand(SDNode *N, unsigned OpNo); |
704 | SDValue PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo); |
705 | SDValue PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo); |
706 | SDValue PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo); |
707 | SDValue PromoteFloatOp_STRICT_FP_EXTEND(SDNode *N, unsigned OpNo); |
708 | SDValue PromoteFloatOp_UnaryOp(SDNode *N, unsigned OpNo); |
709 | SDValue PromoteFloatOp_FP_TO_XINT_SAT(SDNode *N, unsigned OpNo); |
710 | SDValue PromoteFloatOp_STORE(SDNode *N, unsigned OpNo); |
711 | SDValue PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo); |
712 | SDValue PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo); |
713 | |
714 | //===--------------------------------------------------------------------===// |
715 | // Half soft promotion support: LegalizeFloatTypes.cpp |
716 | //===--------------------------------------------------------------------===// |
717 | |
718 | SDValue GetSoftPromotedHalf(SDValue Op) { |
719 | TableId &PromotedId = SoftPromotedHalfs[getTableId(V: Op)]; |
720 | SDValue PromotedOp = getSDValue(Id&: PromotedId); |
721 | assert(PromotedOp.getNode() && "Operand wasn't promoted?" ); |
722 | return PromotedOp; |
723 | } |
724 | void SetSoftPromotedHalf(SDValue Op, SDValue Result); |
725 | |
726 | void SoftPromoteHalfResult(SDNode *N, unsigned ResNo); |
727 | SDValue SoftPromoteHalfRes_BinOp(SDNode *N); |
728 | SDValue SoftPromoteHalfRes_BITCAST(SDNode *N); |
729 | SDValue SoftPromoteHalfRes_ConstantFP(SDNode *N); |
730 | SDValue (SDNode *N); |
731 | SDValue SoftPromoteHalfRes_FCOPYSIGN(SDNode *N); |
732 | SDValue SoftPromoteHalfRes_FMAD(SDNode *N); |
733 | SDValue SoftPromoteHalfRes_ExpOp(SDNode *N); |
734 | SDValue SoftPromoteHalfRes_FFREXP(SDNode *N); |
735 | SDValue SoftPromoteHalfRes_FP_ROUND(SDNode *N); |
736 | SDValue SoftPromoteHalfRes_LOAD(SDNode *N); |
737 | SDValue SoftPromoteHalfRes_SELECT(SDNode *N); |
738 | SDValue SoftPromoteHalfRes_SELECT_CC(SDNode *N); |
739 | SDValue SoftPromoteHalfRes_UnaryOp(SDNode *N); |
740 | SDValue SoftPromoteHalfRes_XINT_TO_FP(SDNode *N); |
741 | SDValue SoftPromoteHalfRes_UNDEF(SDNode *N); |
742 | SDValue SoftPromoteHalfRes_VECREDUCE(SDNode *N); |
743 | SDValue SoftPromoteHalfRes_VECREDUCE_SEQ(SDNode *N); |
744 | |
745 | bool SoftPromoteHalfOperand(SDNode *N, unsigned OpNo); |
746 | SDValue SoftPromoteHalfOp_BITCAST(SDNode *N); |
747 | SDValue SoftPromoteHalfOp_FCOPYSIGN(SDNode *N, unsigned OpNo); |
748 | SDValue SoftPromoteHalfOp_FP_EXTEND(SDNode *N); |
749 | SDValue SoftPromoteHalfOp_FP_TO_XINT(SDNode *N); |
750 | SDValue SoftPromoteHalfOp_FP_TO_XINT_SAT(SDNode *N); |
751 | SDValue SoftPromoteHalfOp_SETCC(SDNode *N); |
752 | SDValue SoftPromoteHalfOp_SELECT_CC(SDNode *N, unsigned OpNo); |
753 | SDValue SoftPromoteHalfOp_STORE(SDNode *N, unsigned OpNo); |
754 | SDValue SoftPromoteHalfOp_STACKMAP(SDNode *N, unsigned OpNo); |
755 | SDValue SoftPromoteHalfOp_PATCHPOINT(SDNode *N, unsigned OpNo); |
756 | |
757 | //===--------------------------------------------------------------------===// |
758 | // Scalarization Support: LegalizeVectorTypes.cpp |
759 | //===--------------------------------------------------------------------===// |
760 | |
761 | /// Given a processed one-element vector Op which was scalarized to its |
762 | /// element type, this returns the element. For example, if Op is a v1i32, |
763 | /// Op = < i32 val >, this method returns val, an i32. |
764 | SDValue GetScalarizedVector(SDValue Op) { |
765 | TableId &ScalarizedId = ScalarizedVectors[getTableId(V: Op)]; |
766 | SDValue ScalarizedOp = getSDValue(Id&: ScalarizedId); |
767 | assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?" ); |
768 | return ScalarizedOp; |
769 | } |
770 | void SetScalarizedVector(SDValue Op, SDValue Result); |
771 | |
772 | // Vector Result Scalarization: <1 x ty> -> ty. |
773 | void ScalarizeVectorResult(SDNode *N, unsigned ResNo); |
774 | SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo); |
775 | SDValue ScalarizeVecRes_BinOp(SDNode *N); |
776 | SDValue ScalarizeVecRes_TernaryOp(SDNode *N); |
777 | SDValue ScalarizeVecRes_UnaryOp(SDNode *N); |
778 | SDValue ScalarizeVecRes_StrictFPOp(SDNode *N); |
779 | SDValue ScalarizeVecRes_OverflowOp(SDNode *N, unsigned ResNo); |
780 | SDValue ScalarizeVecRes_InregOp(SDNode *N); |
781 | SDValue ScalarizeVecRes_VecInregOp(SDNode *N); |
782 | |
783 | SDValue ScalarizeVecRes_BITCAST(SDNode *N); |
784 | SDValue ScalarizeVecRes_BUILD_VECTOR(SDNode *N); |
785 | SDValue (SDNode *N); |
786 | SDValue ScalarizeVecRes_FP_ROUND(SDNode *N); |
787 | SDValue ScalarizeVecRes_ExpOp(SDNode *N); |
788 | SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N); |
789 | SDValue ScalarizeVecRes_LOAD(LoadSDNode *N); |
790 | SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N); |
791 | SDValue ScalarizeVecRes_VSELECT(SDNode *N); |
792 | SDValue ScalarizeVecRes_SELECT(SDNode *N); |
793 | SDValue ScalarizeVecRes_SELECT_CC(SDNode *N); |
794 | SDValue ScalarizeVecRes_SETCC(SDNode *N); |
795 | SDValue ScalarizeVecRes_UNDEF(SDNode *N); |
796 | SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N); |
797 | SDValue ScalarizeVecRes_FP_TO_XINT_SAT(SDNode *N); |
798 | SDValue ScalarizeVecRes_IS_FPCLASS(SDNode *N); |
799 | |
800 | SDValue ScalarizeVecRes_FIX(SDNode *N); |
801 | SDValue ScalarizeVecRes_FFREXP(SDNode *N, unsigned ResNo); |
802 | |
803 | // Vector Operand Scalarization: <1 x ty> -> ty. |
804 | bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo); |
805 | SDValue ScalarizeVecOp_BITCAST(SDNode *N); |
806 | SDValue ScalarizeVecOp_UnaryOp(SDNode *N); |
807 | SDValue ScalarizeVecOp_UnaryOp_StrictFP(SDNode *N); |
808 | SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N); |
809 | SDValue (SDNode *N); |
810 | SDValue ScalarizeVecOp_VSELECT(SDNode *N); |
811 | SDValue ScalarizeVecOp_VSETCC(SDNode *N); |
812 | SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo); |
813 | SDValue ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo); |
814 | SDValue ScalarizeVecOp_STRICT_FP_ROUND(SDNode *N, unsigned OpNo); |
815 | SDValue ScalarizeVecOp_FP_EXTEND(SDNode *N); |
816 | SDValue ScalarizeVecOp_STRICT_FP_EXTEND(SDNode *N); |
817 | SDValue ScalarizeVecOp_VECREDUCE(SDNode *N); |
818 | SDValue ScalarizeVecOp_VECREDUCE_SEQ(SDNode *N); |
819 | |
820 | //===--------------------------------------------------------------------===// |
821 | // Vector Splitting Support: LegalizeVectorTypes.cpp |
822 | //===--------------------------------------------------------------------===// |
823 | |
824 | /// Given a processed vector Op which was split into vectors of half the size, |
825 | /// this method returns the halves. The first elements of Op coincide with the |
826 | /// elements of Lo; the remaining elements of Op coincide with the elements of |
827 | /// Hi: Op is what you would get by concatenating Lo and Hi. |
828 | /// For example, if Op is a v8i32 that was split into two v4i32's, then this |
829 | /// method returns the two v4i32's, with Lo corresponding to the first 4 |
830 | /// elements of Op, and Hi to the last 4 elements. |
831 | void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi); |
832 | void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi); |
833 | |
834 | /// Split mask operator of a VP intrinsic. |
835 | std::pair<SDValue, SDValue> SplitMask(SDValue Mask); |
836 | |
837 | /// Split mask operator of a VP intrinsic in a given location. |
838 | std::pair<SDValue, SDValue> SplitMask(SDValue Mask, const SDLoc &DL); |
839 | |
840 | // Helper function for incrementing the pointer when splitting |
841 | // memory operations |
842 | void IncrementPointer(MemSDNode *N, EVT MemVT, MachinePointerInfo &MPI, |
843 | SDValue &Ptr, uint64_t *ScaledOffset = nullptr); |
844 | |
845 | // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>. |
846 | void SplitVectorResult(SDNode *N, unsigned ResNo); |
847 | void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi); |
848 | void SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi); |
849 | void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi); |
850 | void SplitVecRes_FFREXP(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi); |
851 | void SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi); |
852 | void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi); |
853 | void SplitVecRes_ExtVecInRegOp(SDNode *N, SDValue &Lo, SDValue &Hi); |
854 | void SplitVecRes_StrictFPOp(SDNode *N, SDValue &Lo, SDValue &Hi); |
855 | void SplitVecRes_OverflowOp(SDNode *N, unsigned ResNo, |
856 | SDValue &Lo, SDValue &Hi); |
857 | |
858 | void SplitVecRes_FIX(SDNode *N, SDValue &Lo, SDValue &Hi); |
859 | |
860 | void SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi); |
861 | void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); |
862 | void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi); |
863 | void (SDNode *N, SDValue &Lo, SDValue &Hi); |
864 | void SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); |
865 | void SplitVecRes_FPOp_MultiType(SDNode *N, SDValue &Lo, SDValue &Hi); |
866 | void SplitVecRes_IS_FPCLASS(SDNode *N, SDValue &Lo, SDValue &Hi); |
867 | void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi); |
868 | void SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, SDValue &Hi); |
869 | void SplitVecRes_VP_LOAD(VPLoadSDNode *LD, SDValue &Lo, SDValue &Hi); |
870 | void SplitVecRes_VP_STRIDED_LOAD(VPStridedLoadSDNode *SLD, SDValue &Lo, |
871 | SDValue &Hi); |
872 | void SplitVecRes_MLOAD(MaskedLoadSDNode *MLD, SDValue &Lo, SDValue &Hi); |
873 | void SplitVecRes_Gather(MemSDNode *VPGT, SDValue &Lo, SDValue &Hi, |
874 | bool SplitSETCC = false); |
875 | void SplitVecRes_ScalarOp(SDNode *N, SDValue &Lo, SDValue &Hi); |
876 | void SplitVecRes_STEP_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); |
877 | void SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi); |
878 | void SplitVecRes_VECTOR_REVERSE(SDNode *N, SDValue &Lo, SDValue &Hi); |
879 | void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo, |
880 | SDValue &Hi); |
881 | void SplitVecRes_VECTOR_SPLICE(SDNode *N, SDValue &Lo, SDValue &Hi); |
882 | void SplitVecRes_VECTOR_DEINTERLEAVE(SDNode *N); |
883 | void SplitVecRes_VECTOR_INTERLEAVE(SDNode *N); |
884 | void SplitVecRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi); |
885 | void SplitVecRes_FP_TO_XINT_SAT(SDNode *N, SDValue &Lo, SDValue &Hi); |
886 | void SplitVecRes_VP_REVERSE(SDNode *N, SDValue &Lo, SDValue &Hi); |
887 | |
888 | // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>. |
889 | bool SplitVectorOperand(SDNode *N, unsigned OpNo); |
890 | SDValue SplitVecOp_VSELECT(SDNode *N, unsigned OpNo); |
891 | SDValue SplitVecOp_VECREDUCE(SDNode *N, unsigned OpNo); |
892 | SDValue SplitVecOp_VECREDUCE_SEQ(SDNode *N); |
893 | SDValue SplitVecOp_VP_REDUCE(SDNode *N, unsigned OpNo); |
894 | SDValue SplitVecOp_UnaryOp(SDNode *N); |
895 | SDValue SplitVecOp_TruncateHelper(SDNode *N); |
896 | |
897 | SDValue SplitVecOp_BITCAST(SDNode *N); |
898 | SDValue SplitVecOp_INSERT_SUBVECTOR(SDNode *N, unsigned OpNo); |
899 | SDValue (SDNode *N); |
900 | SDValue (SDNode *N); |
901 | SDValue SplitVecOp_ExtVecInRegOp(SDNode *N); |
902 | SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo); |
903 | SDValue SplitVecOp_VP_STORE(VPStoreSDNode *N, unsigned OpNo); |
904 | SDValue SplitVecOp_VP_STRIDED_STORE(VPStridedStoreSDNode *N, unsigned OpNo); |
905 | SDValue SplitVecOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo); |
906 | SDValue SplitVecOp_Scatter(MemSDNode *N, unsigned OpNo); |
907 | SDValue SplitVecOp_Gather(MemSDNode *MGT, unsigned OpNo); |
908 | SDValue SplitVecOp_CONCAT_VECTORS(SDNode *N); |
909 | SDValue SplitVecOp_VSETCC(SDNode *N); |
910 | SDValue SplitVecOp_FP_ROUND(SDNode *N); |
911 | SDValue SplitVecOp_FPOpDifferentTypes(SDNode *N); |
912 | SDValue SplitVecOp_FP_TO_XINT_SAT(SDNode *N); |
913 | |
914 | //===--------------------------------------------------------------------===// |
915 | // Vector Widening Support: LegalizeVectorTypes.cpp |
916 | //===--------------------------------------------------------------------===// |
917 | |
918 | /// Given a processed vector Op which was widened into a larger vector, this |
919 | /// method returns the larger vector. The elements of the returned vector |
920 | /// consist of the elements of Op followed by elements containing rubbish. |
921 | /// For example, if Op is a v2i32 that was widened to a v4i32, then this |
922 | /// method returns a v4i32 for which the first two elements are the same as |
923 | /// those of Op, while the last two elements contain rubbish. |
924 | SDValue GetWidenedVector(SDValue Op) { |
925 | TableId &WidenedId = WidenedVectors[getTableId(V: Op)]; |
926 | SDValue WidenedOp = getSDValue(Id&: WidenedId); |
927 | assert(WidenedOp.getNode() && "Operand wasn't widened?" ); |
928 | return WidenedOp; |
929 | } |
930 | void SetWidenedVector(SDValue Op, SDValue Result); |
931 | |
932 | /// Given a mask Mask, returns the larger vector into which Mask was widened. |
933 | SDValue GetWidenedMask(SDValue Mask, ElementCount EC) { |
934 | // For VP operations, we must also widen the mask. Note that the mask type |
935 | // may not actually need widening, leading it be split along with the VP |
936 | // operation. |
937 | // FIXME: This could lead to an infinite split/widen loop. We only handle |
938 | // the case where the mask needs widening to an identically-sized type as |
939 | // the vector inputs. |
940 | assert(getTypeAction(Mask.getValueType()) == |
941 | TargetLowering::TypeWidenVector && |
942 | "Unable to widen binary VP op" ); |
943 | Mask = GetWidenedVector(Op: Mask); |
944 | assert(Mask.getValueType().getVectorElementCount() == EC && |
945 | "Unable to widen binary VP op" ); |
946 | return Mask; |
947 | } |
948 | |
949 | // Widen Vector Result Promotion. |
950 | void WidenVectorResult(SDNode *N, unsigned ResNo); |
951 | SDValue WidenVecRes_MERGE_VALUES(SDNode* N, unsigned ResNo); |
952 | SDValue WidenVecRes_AssertZext(SDNode* N); |
953 | SDValue WidenVecRes_BITCAST(SDNode* N); |
954 | SDValue WidenVecRes_BUILD_VECTOR(SDNode* N); |
955 | SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N); |
956 | SDValue WidenVecRes_EXTEND_VECTOR_INREG(SDNode* N); |
957 | SDValue (SDNode* N); |
958 | SDValue WidenVecRes_INSERT_SUBVECTOR(SDNode *N); |
959 | SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N); |
960 | SDValue WidenVecRes_LOAD(SDNode* N); |
961 | SDValue WidenVecRes_VP_LOAD(VPLoadSDNode *N); |
962 | SDValue WidenVecRes_VP_STRIDED_LOAD(VPStridedLoadSDNode *N); |
963 | SDValue WidenVecRes_MLOAD(MaskedLoadSDNode* N); |
964 | SDValue WidenVecRes_MGATHER(MaskedGatherSDNode* N); |
965 | SDValue WidenVecRes_VP_GATHER(VPGatherSDNode* N); |
966 | SDValue WidenVecRes_ScalarOp(SDNode* N); |
967 | SDValue WidenVecRes_Select(SDNode *N); |
968 | SDValue WidenVSELECTMask(SDNode *N); |
969 | SDValue WidenVecRes_SELECT_CC(SDNode* N); |
970 | SDValue WidenVecRes_SETCC(SDNode* N); |
971 | SDValue WidenVecRes_STRICT_FSETCC(SDNode* N); |
972 | SDValue WidenVecRes_UNDEF(SDNode *N); |
973 | SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N); |
974 | SDValue WidenVecRes_VECTOR_REVERSE(SDNode *N); |
975 | |
976 | SDValue WidenVecRes_Ternary(SDNode *N); |
977 | SDValue WidenVecRes_Binary(SDNode *N); |
978 | SDValue WidenVecRes_BinaryCanTrap(SDNode *N); |
979 | SDValue (SDNode *N); |
980 | SDValue WidenVecRes_StrictFP(SDNode *N); |
981 | SDValue WidenVecRes_OverflowOp(SDNode *N, unsigned ResNo); |
982 | SDValue WidenVecRes_Convert(SDNode *N); |
983 | SDValue WidenVecRes_Convert_StrictFP(SDNode *N); |
984 | SDValue WidenVecRes_FP_TO_XINT_SAT(SDNode *N); |
985 | SDValue WidenVecRes_XRINT(SDNode *N); |
986 | SDValue WidenVecRes_FCOPYSIGN(SDNode *N); |
987 | SDValue WidenVecRes_UnarySameEltsWithScalarArg(SDNode *N); |
988 | SDValue WidenVecRes_ExpOp(SDNode *N); |
989 | SDValue WidenVecRes_Unary(SDNode *N); |
990 | SDValue WidenVecRes_InregOp(SDNode *N); |
991 | |
992 | // Widen Vector Operand. |
993 | bool WidenVectorOperand(SDNode *N, unsigned OpNo); |
994 | SDValue WidenVecOp_BITCAST(SDNode *N); |
995 | SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N); |
996 | SDValue WidenVecOp_EXTEND(SDNode *N); |
997 | SDValue (SDNode *N); |
998 | SDValue WidenVecOp_INSERT_SUBVECTOR(SDNode *N); |
999 | SDValue (SDNode *N); |
1000 | SDValue WidenVecOp_EXTEND_VECTOR_INREG(SDNode *N); |
1001 | SDValue WidenVecOp_STORE(SDNode* N); |
1002 | SDValue WidenVecOp_VP_STORE(SDNode *N, unsigned OpNo); |
1003 | SDValue WidenVecOp_VP_STRIDED_STORE(SDNode *N, unsigned OpNo); |
1004 | SDValue WidenVecOp_MSTORE(SDNode* N, unsigned OpNo); |
1005 | SDValue WidenVecOp_MGATHER(SDNode* N, unsigned OpNo); |
1006 | SDValue WidenVecOp_MSCATTER(SDNode* N, unsigned OpNo); |
1007 | SDValue WidenVecOp_VP_SCATTER(SDNode* N, unsigned OpNo); |
1008 | SDValue WidenVecOp_SETCC(SDNode* N); |
1009 | SDValue WidenVecOp_STRICT_FSETCC(SDNode* N); |
1010 | SDValue WidenVecOp_VSELECT(SDNode *N); |
1011 | |
1012 | SDValue WidenVecOp_Convert(SDNode *N); |
1013 | SDValue WidenVecOp_FP_TO_XINT_SAT(SDNode *N); |
1014 | SDValue WidenVecOp_UnrollVectorOp(SDNode *N); |
1015 | SDValue WidenVecOp_IS_FPCLASS(SDNode *N); |
1016 | SDValue WidenVecOp_VECREDUCE(SDNode *N); |
1017 | SDValue WidenVecOp_VECREDUCE_SEQ(SDNode *N); |
1018 | SDValue WidenVecOp_VP_REDUCE(SDNode *N); |
1019 | SDValue WidenVecOp_ExpOp(SDNode *N); |
1020 | |
1021 | /// Helper function to generate a set of operations to perform |
1022 | /// a vector operation for a wider type. |
1023 | /// |
1024 | SDValue UnrollVectorOp_StrictFP(SDNode *N, unsigned ResNE); |
1025 | |
1026 | //===--------------------------------------------------------------------===// |
1027 | // Vector Widening Utilities Support: LegalizeVectorTypes.cpp |
1028 | //===--------------------------------------------------------------------===// |
1029 | |
1030 | /// Helper function to generate a set of loads to load a vector with a |
1031 | /// resulting wider type. It takes: |
1032 | /// LdChain: list of chains for the load to be generated. |
1033 | /// Ld: load to widen |
1034 | SDValue GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain, |
1035 | LoadSDNode *LD); |
1036 | |
1037 | /// Helper function to generate a set of extension loads to load a vector with |
1038 | /// a resulting wider type. It takes: |
1039 | /// LdChain: list of chains for the load to be generated. |
1040 | /// Ld: load to widen |
1041 | /// ExtType: extension element type |
1042 | SDValue GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain, |
1043 | LoadSDNode *LD, ISD::LoadExtType ExtType); |
1044 | |
1045 | /// Helper function to generate a set of stores to store a widen vector into |
1046 | /// non-widen memory. Returns true if successful, false otherwise. |
1047 | /// StChain: list of chains for the stores we have generated |
1048 | /// ST: store of a widen value |
1049 | bool GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST); |
1050 | |
1051 | /// Modifies a vector input (widen or narrows) to a vector of NVT. The |
1052 | /// input vector must have the same element type as NVT. |
1053 | /// When FillWithZeroes is "on" the vector will be widened with zeroes. |
1054 | /// By default, the vector will be widened with undefined values. |
1055 | SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false); |
1056 | |
1057 | /// Return a mask of vector type MaskVT to replace InMask. Also adjust |
1058 | /// MaskVT to ToMaskVT if needed with vector extension or truncation. |
1059 | SDValue convertMask(SDValue InMask, EVT MaskVT, EVT ToMaskVT); |
1060 | |
1061 | //===--------------------------------------------------------------------===// |
1062 | // Generic Splitting: LegalizeTypesGeneric.cpp |
1063 | //===--------------------------------------------------------------------===// |
1064 | |
1065 | // Legalization methods which only use that the illegal type is split into two |
1066 | // not necessarily identical types. As such they can be used for splitting |
1067 | // vectors and expanding integers and floats. |
1068 | |
1069 | void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) { |
1070 | if (Op.getValueType().isVector()) |
1071 | GetSplitVector(Op, Lo, Hi); |
1072 | else if (Op.getValueType().isInteger()) |
1073 | GetExpandedInteger(Op, Lo, Hi); |
1074 | else |
1075 | GetExpandedFloat(Op, Lo, Hi); |
1076 | } |
1077 | |
1078 | /// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the |
1079 | /// given value. |
1080 | void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi); |
1081 | |
1082 | // Generic Result Splitting. |
1083 | void SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, |
1084 | SDValue &Lo, SDValue &Hi); |
1085 | void SplitVecRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi); |
1086 | void SplitRes_ARITH_FENCE (SDNode *N, SDValue &Lo, SDValue &Hi); |
1087 | void SplitRes_Select (SDNode *N, SDValue &Lo, SDValue &Hi); |
1088 | void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi); |
1089 | void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi); |
1090 | void SplitRes_FREEZE (SDNode *N, SDValue &Lo, SDValue &Hi); |
1091 | |
1092 | //===--------------------------------------------------------------------===// |
1093 | // Generic Expansion: LegalizeTypesGeneric.cpp |
1094 | //===--------------------------------------------------------------------===// |
1095 | |
1096 | // Legalization methods which only use that the illegal type is split into two |
1097 | // identical types of half the size, and that the Lo/Hi part is stored first |
1098 | // in memory on little/big-endian machines, followed by the Hi/Lo part. As |
1099 | // such they can be used for expanding integers and floats. |
1100 | |
1101 | void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) { |
1102 | if (Op.getValueType().isInteger()) |
1103 | GetExpandedInteger(Op, Lo, Hi); |
1104 | else |
1105 | GetExpandedFloat(Op, Lo, Hi); |
1106 | } |
1107 | |
1108 | |
1109 | /// This function will split the integer \p Op into \p NumElements |
1110 | /// operations of type \p EltVT and store them in \p Ops. |
1111 | void IntegerToVector(SDValue Op, unsigned NumElements, |
1112 | SmallVectorImpl<SDValue> &Ops, EVT EltVT); |
1113 | |
1114 | // Generic Result Expansion. |
1115 | void ExpandRes_MERGE_VALUES (SDNode *N, unsigned ResNo, |
1116 | SDValue &Lo, SDValue &Hi); |
1117 | void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi); |
1118 | void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi); |
1119 | void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi); |
1120 | void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi); |
1121 | void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi); |
1122 | void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi); |
1123 | |
1124 | // Generic Operand Expansion. |
1125 | SDValue ExpandOp_BITCAST (SDNode *N); |
1126 | SDValue ExpandOp_BUILD_VECTOR (SDNode *N); |
1127 | SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N); |
1128 | SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N); |
1129 | SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N); |
1130 | SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo); |
1131 | }; |
1132 | |
1133 | } // end namespace llvm. |
1134 | |
1135 | #endif |
1136 | |