1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* Include file for the EP93XX GPIO controller machine specifics */ |
3 | |
4 | #ifndef __GPIO_EP93XX_H |
5 | #define __GPIO_EP93XX_H |
6 | |
7 | #include "ep93xx-regs.h" |
8 | |
9 | #define EP93XX_GPIO_PHYS_BASE EP93XX_APB_PHYS(0x00040000) |
10 | #define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000) |
11 | #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) |
12 | #define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) |
13 | #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) |
14 | #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) |
15 | #define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8) |
16 | |
17 | /* GPIO port A. */ |
18 | #define EP93XX_GPIO_LINE_A(x) ((x) + 0) |
19 | #define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0) |
20 | #define EP93XX_GPIO_LINE_EGPIO1 EP93XX_GPIO_LINE_A(1) |
21 | #define EP93XX_GPIO_LINE_EGPIO2 EP93XX_GPIO_LINE_A(2) |
22 | #define EP93XX_GPIO_LINE_EGPIO3 EP93XX_GPIO_LINE_A(3) |
23 | #define EP93XX_GPIO_LINE_EGPIO4 EP93XX_GPIO_LINE_A(4) |
24 | #define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5) |
25 | #define EP93XX_GPIO_LINE_EGPIO6 EP93XX_GPIO_LINE_A(6) |
26 | #define EP93XX_GPIO_LINE_EGPIO7 EP93XX_GPIO_LINE_A(7) |
27 | |
28 | /* GPIO port B. */ |
29 | #define EP93XX_GPIO_LINE_B(x) ((x) + 8) |
30 | #define EP93XX_GPIO_LINE_EGPIO8 EP93XX_GPIO_LINE_B(0) |
31 | #define EP93XX_GPIO_LINE_EGPIO9 EP93XX_GPIO_LINE_B(1) |
32 | #define EP93XX_GPIO_LINE_EGPIO10 EP93XX_GPIO_LINE_B(2) |
33 | #define EP93XX_GPIO_LINE_EGPIO11 EP93XX_GPIO_LINE_B(3) |
34 | #define EP93XX_GPIO_LINE_EGPIO12 EP93XX_GPIO_LINE_B(4) |
35 | #define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5) |
36 | #define EP93XX_GPIO_LINE_EGPIO14 EP93XX_GPIO_LINE_B(6) |
37 | #define EP93XX_GPIO_LINE_EGPIO15 EP93XX_GPIO_LINE_B(7) |
38 | |
39 | /* GPIO port C. */ |
40 | #define EP93XX_GPIO_LINE_C(x) ((x) + 40) |
41 | #define EP93XX_GPIO_LINE_ROW0 EP93XX_GPIO_LINE_C(0) |
42 | #define EP93XX_GPIO_LINE_ROW1 EP93XX_GPIO_LINE_C(1) |
43 | #define EP93XX_GPIO_LINE_ROW2 EP93XX_GPIO_LINE_C(2) |
44 | #define EP93XX_GPIO_LINE_ROW3 EP93XX_GPIO_LINE_C(3) |
45 | #define EP93XX_GPIO_LINE_ROW4 EP93XX_GPIO_LINE_C(4) |
46 | #define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5) |
47 | #define EP93XX_GPIO_LINE_ROW6 EP93XX_GPIO_LINE_C(6) |
48 | #define EP93XX_GPIO_LINE_ROW7 EP93XX_GPIO_LINE_C(7) |
49 | |
50 | /* GPIO port D. */ |
51 | #define EP93XX_GPIO_LINE_D(x) ((x) + 24) |
52 | #define EP93XX_GPIO_LINE_COL0 EP93XX_GPIO_LINE_D(0) |
53 | #define EP93XX_GPIO_LINE_COL1 EP93XX_GPIO_LINE_D(1) |
54 | #define EP93XX_GPIO_LINE_COL2 EP93XX_GPIO_LINE_D(2) |
55 | #define EP93XX_GPIO_LINE_COL3 EP93XX_GPIO_LINE_D(3) |
56 | #define EP93XX_GPIO_LINE_COL4 EP93XX_GPIO_LINE_D(4) |
57 | #define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5) |
58 | #define EP93XX_GPIO_LINE_COL6 EP93XX_GPIO_LINE_D(6) |
59 | #define EP93XX_GPIO_LINE_COL7 EP93XX_GPIO_LINE_D(7) |
60 | |
61 | /* GPIO port E. */ |
62 | #define EP93XX_GPIO_LINE_E(x) ((x) + 32) |
63 | #define EP93XX_GPIO_LINE_GRLED EP93XX_GPIO_LINE_E(0) |
64 | #define EP93XX_GPIO_LINE_RDLED EP93XX_GPIO_LINE_E(1) |
65 | #define EP93XX_GPIO_LINE_DIORn EP93XX_GPIO_LINE_E(2) |
66 | #define EP93XX_GPIO_LINE_IDECS1n EP93XX_GPIO_LINE_E(3) |
67 | #define EP93XX_GPIO_LINE_IDECS2n EP93XX_GPIO_LINE_E(4) |
68 | #define EP93XX_GPIO_LINE_IDEDA0 EP93XX_GPIO_LINE_E(5) |
69 | #define EP93XX_GPIO_LINE_IDEDA1 EP93XX_GPIO_LINE_E(6) |
70 | #define EP93XX_GPIO_LINE_IDEDA2 EP93XX_GPIO_LINE_E(7) |
71 | |
72 | /* GPIO port F. */ |
73 | #define EP93XX_GPIO_LINE_F(x) ((x) + 16) |
74 | #define EP93XX_GPIO_LINE_WP EP93XX_GPIO_LINE_F(0) |
75 | #define EP93XX_GPIO_LINE_MCCD1 EP93XX_GPIO_LINE_F(1) |
76 | #define EP93XX_GPIO_LINE_MCCD2 EP93XX_GPIO_LINE_F(2) |
77 | #define EP93XX_GPIO_LINE_MCBVD1 EP93XX_GPIO_LINE_F(3) |
78 | #define EP93XX_GPIO_LINE_MCBVD2 EP93XX_GPIO_LINE_F(4) |
79 | #define EP93XX_GPIO_LINE_VS1 EP93XX_GPIO_LINE_F(5) |
80 | #define EP93XX_GPIO_LINE_READY EP93XX_GPIO_LINE_F(6) |
81 | #define EP93XX_GPIO_LINE_VS2 EP93XX_GPIO_LINE_F(7) |
82 | |
83 | /* GPIO port G. */ |
84 | #define EP93XX_GPIO_LINE_G(x) ((x) + 48) |
85 | #define EP93XX_GPIO_LINE_EECLK EP93XX_GPIO_LINE_G(0) |
86 | #define EP93XX_GPIO_LINE_EEDAT EP93XX_GPIO_LINE_G(1) |
87 | #define EP93XX_GPIO_LINE_SLA0 EP93XX_GPIO_LINE_G(2) |
88 | #define EP93XX_GPIO_LINE_SLA1 EP93XX_GPIO_LINE_G(3) |
89 | #define EP93XX_GPIO_LINE_DD12 EP93XX_GPIO_LINE_G(4) |
90 | #define EP93XX_GPIO_LINE_DD13 EP93XX_GPIO_LINE_G(5) |
91 | #define EP93XX_GPIO_LINE_DD14 EP93XX_GPIO_LINE_G(6) |
92 | #define EP93XX_GPIO_LINE_DD15 EP93XX_GPIO_LINE_G(7) |
93 | |
94 | /* GPIO port H. */ |
95 | #define EP93XX_GPIO_LINE_H(x) ((x) + 56) |
96 | #define EP93XX_GPIO_LINE_DD0 EP93XX_GPIO_LINE_H(0) |
97 | #define EP93XX_GPIO_LINE_DD1 EP93XX_GPIO_LINE_H(1) |
98 | #define EP93XX_GPIO_LINE_DD2 EP93XX_GPIO_LINE_H(2) |
99 | #define EP93XX_GPIO_LINE_DD3 EP93XX_GPIO_LINE_H(3) |
100 | #define EP93XX_GPIO_LINE_DD4 EP93XX_GPIO_LINE_H(4) |
101 | #define EP93XX_GPIO_LINE_DD5 EP93XX_GPIO_LINE_H(5) |
102 | #define EP93XX_GPIO_LINE_DD6 EP93XX_GPIO_LINE_H(6) |
103 | #define EP93XX_GPIO_LINE_DD7 EP93XX_GPIO_LINE_H(7) |
104 | |
105 | /* maximum value for gpio line identifiers */ |
106 | #define EP93XX_GPIO_LINE_MAX EP93XX_GPIO_LINE_H(7) |
107 | |
108 | /* maximum value for irq capable line identifiers */ |
109 | #define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7) |
110 | |
111 | #endif /* __GPIO_EP93XX_H */ |
112 | |