| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * linux/arch/arm/mach-mv78xx0/mpp.h -- Multi Purpose Pins |
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| 4 | * |
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| 5 | * sebastien requiem <sebastien@requiem.fr> |
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| 6 | */ |
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| 7 | |
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| 8 | #ifndef __MV78X00_MPP_H |
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| 9 | #define __MV78X00_MPP_H |
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| 10 | |
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| 11 | #define MPP(_num, _sel, _in, _out, _78100_A0) (\ |
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| 12 | /* MPP number */ ((_num) & 0xff) | \ |
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| 13 | /* MPP select value */ (((_sel) & 0xf) << 8) | \ |
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| 14 | /* may be input signal */ ((!!(_in)) << 12) | \ |
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| 15 | /* may be output signal */ ((!!(_out)) << 13) | \ |
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| 16 | /* available on A0 */ ((!!(_78100_A0)) << 14)) |
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| 17 | |
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| 18 | /* num sel i o 78100_A0 */ |
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| 19 | |
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| 20 | #define MPP_78100_A0_MASK MPP(0, 0x0, 0, 0, 1) |
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| 21 | |
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| 22 | #define MPP0_GPIO MPP(0, 0x0, 1, 1, 1) |
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| 23 | #define MPP0_GE0_COL MPP(0, 0x1, 0, 0, 1) |
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| 24 | #define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 0, 1) |
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| 25 | #define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1) |
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| 26 | |
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| 27 | #define MPP1_GPIO MPP(1, 0x0, 1, 1, 1) |
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| 28 | #define MPP1_GE0_RXERR MPP(1, 0x1, 0, 0, 1) |
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| 29 | #define MPP1_GE1_TXCTL MPP(1, 0x2, 0, 0, 1) |
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| 30 | #define MPP1_UNUSED MPP(1, 0x3, 0, 0, 1) |
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| 31 | |
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| 32 | #define MPP2_GPIO MPP(2, 0x0, 1, 1, 1) |
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| 33 | #define MPP2_GE0_CRS MPP(2, 0x1, 0, 0, 1) |
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| 34 | #define MPP2_GE1_RXCTL MPP(2, 0x2, 0, 0, 1) |
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| 35 | #define MPP2_UNUSED MPP(2, 0x3, 0, 0, 1) |
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| 36 | |
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| 37 | #define MPP3_GPIO MPP(3, 0x0, 1, 1, 1) |
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| 38 | #define MPP3_GE0_TXERR MPP(3, 0x1, 0, 0, 1) |
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| 39 | #define MPP3_GE1_RXCLK MPP(3, 0x2, 0, 0, 1) |
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| 40 | #define MPP3_UNUSED MPP(3, 0x3, 0, 0, 1) |
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| 41 | |
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| 42 | #define MPP4_GPIO MPP(4, 0x0, 1, 1, 1) |
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| 43 | #define MPP4_GE0_TXD4 MPP(4, 0x1, 0, 0, 1) |
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| 44 | #define MPP4_GE1_TXD0 MPP(4, 0x2, 0, 0, 1) |
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| 45 | #define MPP4_UNUSED MPP(4, 0x3, 0, 0, 1) |
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| 46 | |
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| 47 | #define MPP5_GPIO MPP(5, 0x0, 1, 1, 1) |
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| 48 | #define MPP5_GE0_TXD5 MPP(5, 0x1, 0, 0, 1) |
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| 49 | #define MPP5_GE1_TXD1 MPP(5, 0x2, 0, 0, 1) |
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| 50 | #define MPP5_UNUSED MPP(5, 0x3, 0, 0, 1) |
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| 51 | |
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| 52 | #define MPP6_GPIO MPP(6, 0x0, 1, 1, 1) |
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| 53 | #define MPP6_GE0_TXD6 MPP(6, 0x1, 0, 0, 1) |
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| 54 | #define MPP6_GE1_TXD2 MPP(6, 0x2, 0, 0, 1) |
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| 55 | #define MPP6_UNUSED MPP(6, 0x3, 0, 0, 1) |
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| 56 | |
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| 57 | #define MPP7_GPIO MPP(7, 0x0, 1, 1, 1) |
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| 58 | #define MPP7_GE0_TXD7 MPP(7, 0x1, 0, 0, 1) |
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| 59 | #define MPP7_GE1_TXD3 MPP(7, 0x2, 0, 0, 1) |
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| 60 | #define MPP7_UNUSED MPP(7, 0x3, 0, 0, 1) |
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| 61 | |
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| 62 | #define MPP8_GPIO MPP(8, 0x0, 1, 1, 1) |
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| 63 | #define MPP8_GE0_RXD4 MPP(8, 0x1, 0, 0, 1) |
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| 64 | #define MPP8_GE1_RXD0 MPP(8, 0x2, 0, 0, 1) |
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| 65 | #define MPP8_UNUSED MPP(8, 0x3, 0, 0, 1) |
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| 66 | |
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| 67 | #define MPP9_GPIO MPP(9, 0x0, 1, 1, 1) |
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| 68 | #define MPP9_GE0_RXD5 MPP(9, 0x1, 0, 0, 1) |
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| 69 | #define MPP9_GE1_RXD1 MPP(9, 0x2, 0, 0, 1) |
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| 70 | #define MPP9_UNUSED MPP(9, 0x3, 0, 0, 1) |
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| 71 | |
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| 72 | #define MPP10_GPIO MPP(10, 0x0, 1, 1, 1) |
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| 73 | #define MPP10_GE0_RXD6 MPP(10, 0x1, 0, 0, 1) |
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| 74 | #define MPP10_GE1_RXD2 MPP(10, 0x2, 0, 0, 1) |
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| 75 | #define MPP10_UNUSED MPP(10, 0x3, 0, 0, 1) |
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| 76 | |
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| 77 | #define MPP11_GPIO MPP(11, 0x0, 1, 1, 1) |
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| 78 | #define MPP11_GE0_RXD7 MPP(11, 0x1, 0, 0, 1) |
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| 79 | #define MPP11_GE1_RXD3 MPP(11, 0x2, 0, 0, 1) |
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| 80 | #define MPP11_UNUSED MPP(11, 0x3, 0, 0, 1) |
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| 81 | |
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| 82 | #define MPP12_GPIO MPP(12, 0x0, 1, 1, 1) |
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| 83 | #define MPP12_M_BB MPP(12, 0x3, 0, 0, 1) |
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| 84 | #define MPP12_UA0_CTSn MPP(12, 0x4, 0, 0, 1) |
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| 85 | #define MPP12_NAND_FLASH_REn0 MPP(12, 0x5, 0, 0, 1) |
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| 86 | #define MPP12_TDM0_SCSn MPP(12, 0X6, 0, 0, 1) |
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| 87 | #define MPP12_UNUSED MPP(12, 0x1, 0, 0, 1) |
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| 88 | |
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| 89 | #define MPP13_GPIO MPP(13, 0x0, 1, 1, 1) |
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| 90 | #define MPP13_SYSRST_OUTn MPP(13, 0x3, 0, 0, 1) |
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| 91 | #define MPP13_UA0_RTSn MPP(13, 0x4, 0, 0, 1) |
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| 92 | #define MPP13_NAN_FLASH_WEn0 MPP(13, 0x5, 0, 0, 1) |
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| 93 | #define MPP13_TDM_SCLK MPP(13, 0x6, 0, 0, 1) |
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| 94 | #define MPP13_UNUSED MPP(13, 0x1, 0, 0, 1) |
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| 95 | |
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| 96 | #define MPP14_GPIO MPP(14, 0x0, 1, 1, 1) |
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| 97 | #define MPP14_SATA1_ACTn MPP(14, 0x3, 0, 0, 1) |
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| 98 | #define MPP14_UA1_CTSn MPP(14, 0x4, 0, 0, 1) |
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| 99 | #define MPP14_NAND_FLASH_REn1 MPP(14, 0x5, 0, 0, 1) |
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| 100 | #define MPP14_TDM_SMOSI MPP(14, 0x6, 0, 0, 1) |
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| 101 | #define MPP14_UNUSED MPP(14, 0x1, 0, 0, 1) |
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| 102 | |
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| 103 | #define MPP15_GPIO MPP(15, 0x0, 1, 1, 1) |
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| 104 | #define MPP15_SATA0_ACTn MPP(15, 0x3, 0, 0, 1) |
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| 105 | #define MPP15_UA1_RTSn MPP(15, 0x4, 0, 0, 1) |
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| 106 | #define MPP15_NAND_FLASH_WEn1 MPP(15, 0x5, 0, 0, 1) |
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| 107 | #define MPP15_TDM_SMISO MPP(15, 0x6, 0, 0, 1) |
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| 108 | #define MPP15_UNUSED MPP(15, 0x1, 0, 0, 1) |
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| 109 | |
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| 110 | #define MPP16_GPIO MPP(16, 0x0, 1, 1, 1) |
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| 111 | #define MPP16_SATA1_PRESENTn MPP(16, 0x3, 0, 0, 1) |
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| 112 | #define MPP16_UA2_TXD MPP(16, 0x4, 0, 0, 1) |
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| 113 | #define MPP16_NAND_FLASH_REn3 MPP(16, 0x5, 0, 0, 1) |
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| 114 | #define MPP16_TDM_INTn MPP(16, 0x6, 0, 0, 1) |
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| 115 | #define MPP16_UNUSED MPP(16, 0x1, 0, 0, 1) |
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| 116 | |
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| 117 | |
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| 118 | #define MPP17_GPIO MPP(17, 0x0, 1, 1, 1) |
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| 119 | #define MPP17_SATA0_PRESENTn MPP(17, 0x3, 0, 0, 1) |
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| 120 | #define MPP17_UA2_RXD MPP(17, 0x4, 0, 0, 1) |
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| 121 | #define MPP17_NAND_FLASH_WEn3 MPP(17, 0x5, 0, 0, 1) |
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| 122 | #define MPP17_TDM_RSTn MPP(17, 0x6, 0, 0, 1) |
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| 123 | #define MPP17_UNUSED MPP(17, 0x1, 0, 0, 1) |
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| 124 | |
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| 125 | |
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| 126 | #define MPP18_GPIO MPP(18, 0x0, 1, 1, 1) |
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| 127 | #define MPP18_UA0_CTSn MPP(18, 0x4, 0, 0, 1) |
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| 128 | #define MPP18_BOOT_FLASH_REn MPP(18, 0x5, 0, 0, 1) |
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| 129 | #define MPP18_UNUSED MPP(18, 0x1, 0, 0, 1) |
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| 130 | |
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| 131 | |
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| 132 | |
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| 133 | #define MPP19_GPIO MPP(19, 0x0, 1, 1, 1) |
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| 134 | #define MPP19_UA0_CTSn MPP(19, 0x4, 0, 0, 1) |
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| 135 | #define MPP19_BOOT_FLASH_WEn MPP(19, 0x5, 0, 0, 1) |
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| 136 | #define MPP19_UNUSED MPP(19, 0x1, 0, 0, 1) |
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| 137 | |
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| 138 | |
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| 139 | #define MPP20_GPIO MPP(20, 0x0, 1, 1, 1) |
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| 140 | #define MPP20_UA1_CTSs MPP(20, 0x4, 0, 0, 1) |
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| 141 | #define MPP20_TDM_PCLK MPP(20, 0x6, 0, 0, 0) |
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| 142 | #define MPP20_UNUSED MPP(20, 0x1, 0, 0, 1) |
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| 143 | |
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| 144 | |
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| 145 | |
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| 146 | #define MPP21_GPIO MPP(21, 0x0, 1, 1, 1) |
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| 147 | #define MPP21_UA1_CTSs MPP(21, 0x4, 0, 0, 1) |
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| 148 | #define MPP21_TDM_FSYNC MPP(21, 0x6, 0, 0, 0) |
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| 149 | #define MPP21_UNUSED MPP(21, 0x1, 0, 0, 1) |
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| 150 | |
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| 151 | |
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| 152 | |
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| 153 | #define MPP22_GPIO MPP(22, 0x0, 1, 1, 1) |
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| 154 | #define MPP22_UA3_TDX MPP(22, 0x4, 0, 0, 1) |
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| 155 | #define MPP22_NAND_FLASH_REn2 MPP(22, 0x5, 0, 0, 1) |
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| 156 | #define MPP22_TDM_DRX MPP(22, 0x6, 0, 0, 1) |
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| 157 | #define MPP22_UNUSED MPP(22, 0x1, 0, 0, 1) |
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| 158 | |
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| 159 | |
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| 160 | |
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| 161 | #define MPP23_GPIO MPP(23, 0x0, 1, 1, 1) |
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| 162 | #define MPP23_UA3_RDX MPP(23, 0x4, 0, 0, 1) |
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| 163 | #define MPP23_NAND_FLASH_WEn2 MPP(23, 0x5, 0, 0, 1) |
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| 164 | #define MPP23_TDM_DTX MPP(23, 0x6, 0, 0, 1) |
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| 165 | #define MPP23_UNUSED MPP(23, 0x1, 0, 0, 1) |
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| 166 | |
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| 167 | |
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| 168 | #define MPP24_GPIO MPP(24, 0x0, 1, 1, 1) |
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| 169 | #define MPP24_UA2_TXD MPP(24, 0x4, 0, 0, 1) |
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| 170 | #define MPP24_TDM_INTn MPP(24, 0x6, 0, 0, 1) |
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| 171 | #define MPP24_UNUSED MPP(24, 0x1, 0, 0, 1) |
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| 172 | |
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| 173 | |
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| 174 | #define MPP25_GPIO MPP(25, 0x0, 1, 1, 1) |
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| 175 | #define MPP25_UA2_RXD MPP(25, 0x4, 0, 0, 1) |
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| 176 | #define MPP25_TDM_RSTn MPP(25, 0x6, 0, 0, 1) |
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| 177 | #define MPP25_UNUSED MPP(25, 0x1, 0, 0, 1) |
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| 178 | |
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| 179 | |
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| 180 | #define MPP26_GPIO MPP(26, 0x0, 1, 1, 1) |
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| 181 | #define MPP26_UA2_CTSn MPP(26, 0x4, 0, 0, 1) |
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| 182 | #define MPP26_TDM_PCLK MPP(26, 0x6, 0, 0, 1) |
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| 183 | #define MPP26_UNUSED MPP(26, 0x1, 0, 0, 1) |
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| 184 | |
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| 185 | |
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| 186 | #define MPP27_GPIO MPP(27, 0x0, 1, 1, 1) |
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| 187 | #define MPP27_UA2_RTSn MPP(27, 0x4, 0, 0, 1) |
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| 188 | #define MPP27_TDM_FSYNC MPP(27, 0x6, 0, 0, 1) |
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| 189 | #define MPP27_UNUSED MPP(27, 0x1, 0, 0, 1) |
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| 190 | |
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| 191 | |
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| 192 | #define MPP28_GPIO MPP(28, 0x0, 1, 1, 1) |
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| 193 | #define MPP28_UA3_TXD MPP(28, 0x4, 0, 0, 1) |
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| 194 | #define MPP28_TDM_DRX MPP(28, 0x6, 0, 0, 1) |
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| 195 | #define MPP28_UNUSED MPP(28, 0x1, 0, 0, 1) |
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| 196 | |
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| 197 | #define MPP29_GPIO MPP(29, 0x0, 1, 1, 1) |
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| 198 | #define MPP29_UA3_RXD MPP(29, 0x4, 0, 0, 1) |
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| 199 | #define MPP29_SYSRST_OUTn MPP(29, 0x5, 0, 0, 1) |
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| 200 | #define MPP29_TDM_DTX MPP(29, 0x6, 0, 0, 1) |
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| 201 | #define MPP29_UNUSED MPP(29, 0x1, 0, 0, 1) |
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| 202 | |
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| 203 | #define MPP30_GPIO MPP(30, 0x0, 1, 1, 1) |
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| 204 | #define MPP30_UA3_CTSn MPP(30, 0x4, 0, 0, 1) |
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| 205 | #define MPP30_UNUSED MPP(30, 0x1, 0, 0, 1) |
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| 206 | |
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| 207 | #define MPP31_GPIO MPP(31, 0x0, 1, 1, 1) |
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| 208 | #define MPP31_UA3_RTSn MPP(31, 0x4, 0, 0, 1) |
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| 209 | #define MPP31_TDM1_SCSn MPP(31, 0x6, 0, 0, 1) |
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| 210 | #define MPP31_UNUSED MPP(31, 0x1, 0, 0, 1) |
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| 211 | |
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| 212 | |
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| 213 | #define MPP32_GPIO MPP(32, 0x1, 1, 1, 1) |
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| 214 | #define MPP32_UA3_TDX MPP(32, 0x4, 0, 0, 1) |
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| 215 | #define MPP32_SYSRST_OUTn MPP(32, 0x5, 0, 0, 1) |
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| 216 | #define MPP32_TDM0_RXQ MPP(32, 0x6, 0, 0, 1) |
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| 217 | #define MPP32_UNUSED MPP(32, 0x3, 0, 0, 1) |
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| 218 | |
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| 219 | |
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| 220 | #define MPP33_GPIO MPP(33, 0x1, 1, 1, 1) |
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| 221 | #define MPP33_UA3_RDX MPP(33, 0x4, 0, 0, 1) |
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| 222 | #define MPP33_TDM0_TXQ MPP(33, 0x6, 0, 0, 1) |
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| 223 | #define MPP33_UNUSED MPP(33, 0x3, 0, 0, 1) |
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| 224 | |
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| 225 | |
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| 226 | |
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| 227 | #define MPP34_GPIO MPP(34, 0x1, 1, 1, 1) |
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| 228 | #define MPP34_UA2_TDX MPP(34, 0x4, 0, 0, 1) |
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| 229 | #define MPP34_TDM1_RXQ MPP(34, 0x6, 0, 0, 1) |
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| 230 | #define MPP34_UNUSED MPP(34, 0x3, 0, 0, 1) |
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| 231 | |
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| 232 | |
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| 233 | |
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| 234 | #define MPP35_GPIO MPP(35, 0x1, 1, 1, 1) |
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| 235 | #define MPP35_UA2_RDX MPP(35, 0x4, 0, 0, 1) |
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| 236 | #define MPP35_TDM1_TXQ MPP(35, 0x6, 0, 0, 1) |
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| 237 | #define MPP35_UNUSED MPP(35, 0x3, 0, 0, 1) |
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| 238 | |
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| 239 | #define MPP36_GPIO MPP(36, 0x1, 1, 1, 1) |
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| 240 | #define MPP36_UA0_CTSn MPP(36, 0x2, 0, 0, 1) |
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| 241 | #define MPP36_UA2_TDX MPP(36, 0x4, 0, 0, 1) |
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| 242 | #define MPP36_TDM0_SCSn MPP(36, 0x6, 0, 0, 1) |
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| 243 | #define MPP36_UNUSED MPP(36, 0x3, 0, 0, 1) |
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| 244 | |
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| 245 | |
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| 246 | #define MPP37_GPIO MPP(37, 0x1, 1, 1, 1) |
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| 247 | #define MPP37_UA0_RTSn MPP(37, 0x2, 0, 0, 1) |
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| 248 | #define MPP37_UA2_RXD MPP(37, 0x4, 0, 0, 1) |
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| 249 | #define MPP37_SYSRST_OUTn MPP(37, 0x5, 0, 0, 1) |
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| 250 | #define MPP37_TDM_SCLK MPP(37, 0x6, 0, 0, 1) |
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| 251 | #define MPP37_UNUSED MPP(37, 0x3, 0, 0, 1) |
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| 252 | |
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| 253 | |
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| 254 | |
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| 255 | |
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| 256 | #define MPP38_GPIO MPP(38, 0x1, 1, 1, 1) |
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| 257 | #define MPP38_UA1_CTSn MPP(38, 0x2, 0, 0, 1) |
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| 258 | #define MPP38_UA3_TXD MPP(38, 0x4, 0, 0, 1) |
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| 259 | #define MPP38_SYSRST_OUTn MPP(38, 0x5, 0, 0, 1) |
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| 260 | #define MPP38_TDM_SMOSI MPP(38, 0x6, 0, 0, 1) |
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| 261 | #define MPP38_UNUSED MPP(38, 0x3, 0, 0, 1) |
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| 262 | |
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| 263 | |
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| 264 | |
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| 265 | |
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| 266 | #define MPP39_GPIO MPP(39, 0x1, 1, 1, 1) |
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| 267 | #define MPP39_UA1_RTSn MPP(39, 0x2, 0, 0, 1) |
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| 268 | #define MPP39_UA3_RXD MPP(39, 0x4, 0, 0, 1) |
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| 269 | #define MPP39_SYSRST_OUTn MPP(39, 0x5, 0, 0, 1) |
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| 270 | #define MPP39_TDM_SMISO MPP(39, 0x6, 0, 0, 1) |
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| 271 | #define MPP39_UNUSED MPP(39, 0x3, 0, 0, 1) |
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| 272 | |
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| 273 | |
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| 274 | |
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| 275 | #define MPP40_GPIO MPP(40, 0x1, 1, 1, 1) |
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| 276 | #define MPP40_TDM_INTn MPP(40, 0x6, 0, 0, 1) |
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| 277 | #define MPP40_UNUSED MPP(40, 0x0, 0, 0, 1) |
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| 278 | |
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| 279 | |
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| 280 | |
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| 281 | #define MPP41_GPIO MPP(41, 0x1, 1, 1, 1) |
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| 282 | #define MPP41_TDM_RSTn MPP(41, 0x6, 0, 0, 1) |
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| 283 | #define MPP41_UNUSED MPP(41, 0x0, 0, 0, 1) |
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| 284 | |
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| 285 | |
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| 286 | |
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| 287 | #define MPP42_GPIO MPP(42, 0x1, 1, 1, 1) |
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| 288 | #define MPP42_TDM_PCLK MPP(42, 0x6, 0, 0, 1) |
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| 289 | #define MPP42_UNUSED MPP(42, 0x0, 0, 0, 1) |
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| 290 | |
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| 291 | |
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| 292 | |
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| 293 | #define MPP43_GPIO MPP(43, 0x1, 1, 1, 1) |
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| 294 | #define MPP43_TDM_FSYNC MPP(43, 0x6, 0, 0, 1) |
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| 295 | #define MPP43_UNUSED MPP(43, 0x0, 0, 0, 1) |
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| 296 | |
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| 297 | |
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| 298 | |
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| 299 | #define MPP44_GPIO MPP(44, 0x1, 1, 1, 1) |
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| 300 | #define MPP44_TDM_DRX MPP(44, 0x6, 0, 0, 1) |
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| 301 | #define MPP44_UNUSED MPP(44, 0x0, 0, 0, 1) |
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| 302 | |
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| 303 | |
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| 304 | |
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| 305 | #define MPP45_GPIO MPP(45, 0x1, 1, 1, 1) |
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| 306 | #define MPP45_SATA0_ACTn MPP(45, 0x3, 0, 0, 1) |
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| 307 | #define MPP45_TDM_DRX MPP(45, 0x6, 0, 0, 1) |
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| 308 | #define MPP45_UNUSED MPP(45, 0x0, 0, 0, 1) |
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| 309 | |
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| 310 | |
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| 311 | #define MPP46_GPIO MPP(46, 0x1, 1, 1, 1) |
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| 312 | #define MPP46_TDM_SCSn MPP(46, 0x6, 0, 0, 1) |
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| 313 | #define MPP46_UNUSED MPP(46, 0x0, 0, 0, 1) |
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| 314 | |
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| 315 | |
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| 316 | #define MPP47_GPIO MPP(47, 0x1, 1, 1, 1) |
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| 317 | #define MPP47_UNUSED MPP(47, 0x0, 0, 0, 1) |
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| 318 | |
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| 319 | |
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| 320 | |
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| 321 | #define MPP48_GPIO MPP(48, 0x1, 1, 1, 1) |
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| 322 | #define MPP48_SATA1_ACTn MPP(48, 0x3, 0, 0, 1) |
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| 323 | #define MPP48_UNUSED MPP(48, 0x2, 0, 0, 1) |
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| 324 | |
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| 325 | |
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| 326 | |
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| 327 | #define MPP49_GPIO MPP(49, 0x1, 1, 1, 1) |
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| 328 | #define MPP49_SATA0_ACTn MPP(49, 0x3, 0, 0, 1) |
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| 329 | #define MPP49_M_BB MPP(49, 0x4, 0, 0, 1) |
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| 330 | #define MPP49_UNUSED MPP(49, 0x2, 0, 0, 1) |
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| 331 | |
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| 332 | |
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| 333 | #define MPP_MAX 49 |
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| 334 | |
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| 335 | void mv78xx0_mpp_conf(unsigned int *mpp_list); |
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| 336 | |
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| 337 | #endif |
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| 338 | |
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