1// SPDX-License-Identifier: GPL-2.0
2/*
3 * OMAP1 reset support
4 */
5#include <linux/kernel.h>
6#include <linux/io.h>
7#include <linux/reboot.h>
8
9#include "hardware.h"
10#include "iomap.h"
11#include "common.h"
12
13/* ARM_SYSST bit shifts related to SoC reset sources */
14#define ARM_SYSST_POR_SHIFT 5
15#define ARM_SYSST_EXT_RST_SHIFT 4
16#define ARM_SYSST_ARM_WDRST_SHIFT 2
17#define ARM_SYSST_GLOB_SWRST_SHIFT 1
18
19/* Standardized reset source bits (across all OMAP SoCs) */
20#define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0
21#define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1
22#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3
23#define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5
24
25
26void omap1_restart(enum reboot_mode mode, const char *cmd)
27{
28 /*
29 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
30 * "Global Software Reset Affects Traffic Controller Frequency".
31 */
32 if (cpu_is_omap5912()) {
33 omap_writew(v: omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL);
34 omap_writew(v: 0x8, ARM_RSTCT1);
35 }
36
37 omap_writew(v: 1, ARM_RSTCT1);
38}
39
40/**
41 * omap1_get_reset_sources - return the source of the SoC's last reset
42 *
43 * Returns bits that represent the last reset source for the SoC. The
44 * format is standardized across OMAPs for use by the OMAP watchdog.
45 */
46u32 omap1_get_reset_sources(void)
47{
48 u32 ret = 0;
49 u16 rs;
50
51 rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST));
52
53 if (rs & (1 << ARM_SYSST_POR_SHIFT))
54 ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT;
55 if (rs & (1 << ARM_SYSST_EXT_RST_SHIFT))
56 ret |= 1 << OMAP_EXTWARM_RST_SRC_ID_SHIFT;
57 if (rs & (1 << ARM_SYSST_ARM_WDRST_SHIFT))
58 ret |= 1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT;
59 if (rs & (1 << ARM_SYSST_GLOB_SWRST_SHIFT))
60 ret |= 1 << OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT;
61
62 return ret;
63}
64

source code of linux/arch/arm/mach-omap1/reset.c