1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Generic definitions of Orion SoC flavors: |
4 | * Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90. |
5 | * |
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> |
7 | */ |
8 | |
9 | #ifndef __ASM_ARCH_ORION5X_H |
10 | #define __ASM_ARCH_ORION5X_H |
11 | |
12 | #include "irqs.h" |
13 | |
14 | /***************************************************************************** |
15 | * Orion Address Maps |
16 | * |
17 | * phys |
18 | * e0000000 PCIe MEM space |
19 | * e8000000 PCI MEM space |
20 | * f0000000 PCIe WA space (Orion-1/Orion-NAS only) |
21 | * f1000000 on-chip peripheral registers |
22 | * f2000000 PCIe I/O space |
23 | * f2100000 PCI I/O space |
24 | * f2200000 SRAM dedicated for the crypto unit |
25 | * f4000000 device bus mappings (boot) |
26 | * fa000000 device bus mappings (cs0) |
27 | * fa800000 device bus mappings (cs2) |
28 | * fc000000 device bus mappings (cs0/cs1) |
29 | * |
30 | * virt phys size |
31 | * fec00000 f1000000 1M on-chip peripheral registers |
32 | * fee00000 f2000000 64K PCIe I/O space |
33 | * fee10000 f2100000 64K PCI I/O space |
34 | * fd000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) |
35 | ****************************************************************************/ |
36 | #define ORION5X_REGS_PHYS_BASE 0xf1000000 |
37 | #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000) |
38 | #define ORION5X_REGS_SIZE SZ_1M |
39 | |
40 | #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 |
41 | #define ORION5X_PCIE_IO_BUS_BASE 0x00000000 |
42 | #define ORION5X_PCIE_IO_SIZE SZ_64K |
43 | |
44 | #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 |
45 | #define ORION5X_PCI_IO_BUS_BASE 0x00010000 |
46 | #define ORION5X_PCI_IO_SIZE SZ_64K |
47 | |
48 | #define ORION5X_SRAM_PHYS_BASE (0xf2200000) |
49 | #define ORION5X_SRAM_SIZE SZ_8K |
50 | |
51 | /* Relevant only for Orion-1/Orion-NAS */ |
52 | #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 |
53 | #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000) |
54 | #define ORION5X_PCIE_WA_SIZE SZ_16M |
55 | |
56 | #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 |
57 | #define ORION5X_PCIE_MEM_SIZE SZ_128M |
58 | |
59 | #define ORION5X_PCI_MEM_PHYS_BASE 0xe8000000 |
60 | #define ORION5X_PCI_MEM_SIZE SZ_128M |
61 | |
62 | /******************************************************************************* |
63 | * Orion Registers Map |
64 | ******************************************************************************/ |
65 | |
66 | #define ORION5X_DDR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x00000) |
67 | #define ORION5X_DDR_WINS_BASE (ORION5X_DDR_PHYS_BASE + 0x1500) |
68 | #define ORION5X_DDR_WINS_SZ (0x10) |
69 | #define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x00000) |
70 | #define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x10000) |
71 | #define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x10000) |
72 | #define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE + (x)) |
73 | #define GPIO_VIRT_BASE ORION5X_DEV_BUS_REG(0x0100) |
74 | #define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x0600) |
75 | #define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x1000) |
76 | #define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2000) |
77 | #define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2000) |
78 | #define UART1_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2100) |
79 | #define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2100) |
80 | |
81 | #define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x20000) |
82 | #define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x20000) |
83 | #define ORION5X_BRIDGE_WINS_BASE (ORION5X_BRIDGE_PHYS_BASE) |
84 | #define ORION5X_BRIDGE_WINS_SZ (0x80) |
85 | |
86 | #define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x30000) |
87 | |
88 | #define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x40000) |
89 | |
90 | #define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x50000) |
91 | #define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x50000) |
92 | |
93 | #define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x60900) |
94 | #define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x60900) |
95 | |
96 | #define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x70000) |
97 | #define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x70000) |
98 | |
99 | #define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x80000) |
100 | #define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x80000) |
101 | |
102 | #define ORION5X_CRYPTO_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x90000) |
103 | |
104 | #define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0xa0000) |
105 | #define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0xa0000) |
106 | |
107 | /******************************************************************************* |
108 | * Device Bus Registers |
109 | ******************************************************************************/ |
110 | #define MPP_0_7_CTRL ORION5X_DEV_BUS_REG(0x000) |
111 | #define MPP_8_15_CTRL ORION5X_DEV_BUS_REG(0x004) |
112 | #define MPP_16_19_CTRL ORION5X_DEV_BUS_REG(0x050) |
113 | #define MPP_DEV_CTRL ORION5X_DEV_BUS_REG(0x008) |
114 | #define MPP_RESET_SAMPLE ORION5X_DEV_BUS_REG(0x010) |
115 | #define DEV_BANK_0_PARAM ORION5X_DEV_BUS_REG(0x45c) |
116 | #define DEV_BANK_1_PARAM ORION5X_DEV_BUS_REG(0x460) |
117 | #define DEV_BANK_2_PARAM ORION5X_DEV_BUS_REG(0x464) |
118 | #define DEV_BANK_BOOT_PARAM ORION5X_DEV_BUS_REG(0x46c) |
119 | #define DEV_BUS_CTRL ORION5X_DEV_BUS_REG(0x4c0) |
120 | #define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0) |
121 | #define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4) |
122 | |
123 | /******************************************************************************* |
124 | * Supported Devices & Revisions |
125 | ******************************************************************************/ |
126 | /* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */ |
127 | #define MV88F5181_DEV_ID 0x5181 |
128 | #define MV88F5181_REV_B1 3 |
129 | #define MV88F5181L_REV_A0 8 |
130 | #define MV88F5181L_REV_A1 9 |
131 | /* Orion-NAS (88F5182) */ |
132 | #define MV88F5182_DEV_ID 0x5182 |
133 | #define MV88F5182_REV_A2 2 |
134 | /* Orion-2 (88F5281) */ |
135 | #define MV88F5281_DEV_ID 0x5281 |
136 | #define MV88F5281_REV_D0 4 |
137 | #define MV88F5281_REV_D1 5 |
138 | #define MV88F5281_REV_D2 6 |
139 | /* Orion-1-90 (88F6183) */ |
140 | #define MV88F6183_DEV_ID 0x6183 |
141 | #define MV88F6183_REV_B0 3 |
142 | |
143 | #endif |
144 | |