1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * linux/arch/arm/mach-sa1100/generic.c |
4 | * |
5 | * Author: Nicolas Pitre |
6 | * |
7 | * Code common to all SA11x0 machines. |
8 | */ |
9 | #include <linux/gpio.h> |
10 | #include <linux/gpio/machine.h> |
11 | #include <linux/module.h> |
12 | #include <linux/kernel.h> |
13 | #include <linux/init.h> |
14 | #include <linux/delay.h> |
15 | #include <linux/dma-mapping.h> |
16 | #include <linux/pm.h> |
17 | #include <linux/cpufreq.h> |
18 | #include <linux/ioport.h> |
19 | #include <linux/platform_device.h> |
20 | #include <linux/reboot.h> |
21 | #include <linux/regulator/fixed.h> |
22 | #include <linux/regulator/machine.h> |
23 | #include <linux/irqchip/irq-sa11x0.h> |
24 | |
25 | #include <video/sa1100fb.h> |
26 | |
27 | #include <soc/sa1100/pwer.h> |
28 | |
29 | #include <asm/div64.h> |
30 | #include <asm/mach/map.h> |
31 | #include <asm/mach/flash.h> |
32 | #include <asm/irq.h> |
33 | #include <asm/system_misc.h> |
34 | |
35 | #include <mach/hardware.h> |
36 | #include <mach/irqs.h> |
37 | #include <mach/reset.h> |
38 | |
39 | #include "generic.h" |
40 | #include <clocksource/pxa.h> |
41 | |
42 | #define NR_FREQS 16 |
43 | |
44 | /* |
45 | * This table is setup for a 3.6864MHz Crystal. |
46 | */ |
47 | struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = { |
48 | { .frequency = 59000, /* 59.0 MHz */}, |
49 | { .frequency = 73700, /* 73.7 MHz */}, |
50 | { .frequency = 88500, /* 88.5 MHz */}, |
51 | { .frequency = 103200, /* 103.2 MHz */}, |
52 | { .frequency = 118000, /* 118.0 MHz */}, |
53 | { .frequency = 132700, /* 132.7 MHz */}, |
54 | { .frequency = 147500, /* 147.5 MHz */}, |
55 | { .frequency = 162200, /* 162.2 MHz */}, |
56 | { .frequency = 176900, /* 176.9 MHz */}, |
57 | { .frequency = 191700, /* 191.7 MHz */}, |
58 | { .frequency = 206400, /* 206.4 MHz */}, |
59 | { .frequency = 221200, /* 221.2 MHz */}, |
60 | { .frequency = 235900, /* 235.9 MHz */}, |
61 | { .frequency = 250700, /* 250.7 MHz */}, |
62 | { .frequency = 265400, /* 265.4 MHz */}, |
63 | { .frequency = 280200, /* 280.2 MHz */}, |
64 | { .frequency = CPUFREQ_TABLE_END, }, |
65 | }; |
66 | |
67 | unsigned int sa11x0_getspeed(unsigned int cpu) |
68 | { |
69 | if (cpu) |
70 | return 0; |
71 | return sa11x0_freq_table[PPCR & 0xf].frequency; |
72 | } |
73 | |
74 | /* |
75 | * Default power-off for SA1100 |
76 | */ |
77 | static void sa1100_power_off(void) |
78 | { |
79 | mdelay(100); |
80 | local_irq_disable(); |
81 | /* disable internal oscillator, float CS lines */ |
82 | PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS); |
83 | /* enable wake-up on GPIO0 (Assabet...) */ |
84 | PWER = GFER = GRER = 1; |
85 | /* |
86 | * set scratchpad to zero, just in case it is used as a |
87 | * restart address by the bootloader. |
88 | */ |
89 | PSPR = 0; |
90 | /* enter sleep mode */ |
91 | PMCR = PMCR_SF; |
92 | } |
93 | |
94 | void sa11x0_restart(enum reboot_mode mode, const char *cmd) |
95 | { |
96 | clear_reset_status(RESET_STATUS_ALL); |
97 | |
98 | if (mode == REBOOT_SOFT) { |
99 | /* Jump into ROM at address 0 */ |
100 | soft_restart(0); |
101 | } else { |
102 | /* Use on-chip reset capability */ |
103 | RSRR = RSRR_SWR; |
104 | } |
105 | } |
106 | |
107 | static void sa11x0_register_device(struct platform_device *dev, void *data) |
108 | { |
109 | int err; |
110 | dev->dev.platform_data = data; |
111 | err = platform_device_register(dev); |
112 | if (err) |
113 | printk(KERN_ERR "Unable to register device %s: %d\n" , |
114 | dev->name, err); |
115 | } |
116 | |
117 | |
118 | static struct resource sa11x0udc_resources[] = { |
119 | [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K), |
120 | [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC), |
121 | }; |
122 | |
123 | static u64 sa11x0udc_dma_mask = 0xffffffffUL; |
124 | |
125 | static struct platform_device sa11x0udc_device = { |
126 | .name = "sa11x0-udc" , |
127 | .id = -1, |
128 | .dev = { |
129 | .dma_mask = &sa11x0udc_dma_mask, |
130 | .coherent_dma_mask = 0xffffffff, |
131 | }, |
132 | .num_resources = ARRAY_SIZE(sa11x0udc_resources), |
133 | .resource = sa11x0udc_resources, |
134 | }; |
135 | |
136 | static struct resource sa11x0uart1_resources[] = { |
137 | [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K), |
138 | [1] = DEFINE_RES_IRQ(IRQ_Ser1UART), |
139 | }; |
140 | |
141 | static struct platform_device sa11x0uart1_device = { |
142 | .name = "sa11x0-uart" , |
143 | .id = 1, |
144 | .num_resources = ARRAY_SIZE(sa11x0uart1_resources), |
145 | .resource = sa11x0uart1_resources, |
146 | }; |
147 | |
148 | static struct resource sa11x0uart3_resources[] = { |
149 | [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K), |
150 | [1] = DEFINE_RES_IRQ(IRQ_Ser3UART), |
151 | }; |
152 | |
153 | static struct platform_device sa11x0uart3_device = { |
154 | .name = "sa11x0-uart" , |
155 | .id = 3, |
156 | .num_resources = ARRAY_SIZE(sa11x0uart3_resources), |
157 | .resource = sa11x0uart3_resources, |
158 | }; |
159 | |
160 | static struct resource sa11x0mcp_resources[] = { |
161 | [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K), |
162 | [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4), |
163 | [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP), |
164 | }; |
165 | |
166 | static u64 sa11x0mcp_dma_mask = 0xffffffffUL; |
167 | |
168 | static struct platform_device sa11x0mcp_device = { |
169 | .name = "sa11x0-mcp" , |
170 | .id = -1, |
171 | .dev = { |
172 | .dma_mask = &sa11x0mcp_dma_mask, |
173 | .coherent_dma_mask = 0xffffffff, |
174 | }, |
175 | .num_resources = ARRAY_SIZE(sa11x0mcp_resources), |
176 | .resource = sa11x0mcp_resources, |
177 | }; |
178 | |
179 | void __init sa11x0_ppc_configure_mcp(void) |
180 | { |
181 | /* Setup the PPC unit for the MCP */ |
182 | PPDR &= ~PPC_RXD4; |
183 | PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; |
184 | PSDR |= PPC_RXD4; |
185 | PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); |
186 | PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); |
187 | } |
188 | |
189 | void sa11x0_register_mcp(struct mcp_plat_data *data) |
190 | { |
191 | sa11x0_register_device(dev: &sa11x0mcp_device, data); |
192 | } |
193 | |
194 | static struct resource sa11x0ssp_resources[] = { |
195 | [0] = DEFINE_RES_MEM(0x80070000, SZ_64K), |
196 | [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP), |
197 | }; |
198 | |
199 | static u64 sa11x0ssp_dma_mask = 0xffffffffUL; |
200 | |
201 | static struct platform_device sa11x0ssp_device = { |
202 | .name = "sa11x0-ssp" , |
203 | .id = -1, |
204 | .dev = { |
205 | .dma_mask = &sa11x0ssp_dma_mask, |
206 | .coherent_dma_mask = 0xffffffff, |
207 | }, |
208 | .num_resources = ARRAY_SIZE(sa11x0ssp_resources), |
209 | .resource = sa11x0ssp_resources, |
210 | }; |
211 | |
212 | static struct resource sa11x0fb_resources[] = { |
213 | [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K), |
214 | [1] = DEFINE_RES_IRQ(IRQ_LCD), |
215 | }; |
216 | |
217 | static struct platform_device sa11x0fb_device = { |
218 | .name = "sa11x0-fb" , |
219 | .id = -1, |
220 | .dev = { |
221 | .coherent_dma_mask = 0xffffffff, |
222 | }, |
223 | .num_resources = ARRAY_SIZE(sa11x0fb_resources), |
224 | .resource = sa11x0fb_resources, |
225 | }; |
226 | |
227 | void sa11x0_register_lcd(struct sa1100fb_mach_info *inf) |
228 | { |
229 | sa11x0_register_device(dev: &sa11x0fb_device, data: inf); |
230 | } |
231 | |
232 | void sa11x0_register_pcmcia(int socket, struct gpiod_lookup_table *table) |
233 | { |
234 | if (table) |
235 | gpiod_add_lookup_table(table); |
236 | platform_device_register_simple(name: "sa11x0-pcmcia" , id: socket, NULL, num: 0); |
237 | } |
238 | |
239 | static struct platform_device sa11x0mtd_device = { |
240 | .name = "sa1100-mtd" , |
241 | .id = -1, |
242 | }; |
243 | |
244 | void sa11x0_register_mtd(struct flash_platform_data *flash, |
245 | struct resource *res, int nr) |
246 | { |
247 | flash->name = "sa1100" ; |
248 | sa11x0mtd_device.resource = res; |
249 | sa11x0mtd_device.num_resources = nr; |
250 | sa11x0_register_device(dev: &sa11x0mtd_device, data: flash); |
251 | } |
252 | |
253 | static struct resource sa1100_rtc_resources[] = { |
254 | DEFINE_RES_MEM(0x90010000, 0x40), |
255 | DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz" ), |
256 | DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm" ), |
257 | }; |
258 | |
259 | static struct platform_device sa11x0rtc_device = { |
260 | .name = "sa1100-rtc" , |
261 | .id = -1, |
262 | .num_resources = ARRAY_SIZE(sa1100_rtc_resources), |
263 | .resource = sa1100_rtc_resources, |
264 | }; |
265 | |
266 | static struct resource sa11x0dma_resources[] = { |
267 | DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE), |
268 | DEFINE_RES_IRQ(IRQ_DMA0), |
269 | DEFINE_RES_IRQ(IRQ_DMA1), |
270 | DEFINE_RES_IRQ(IRQ_DMA2), |
271 | DEFINE_RES_IRQ(IRQ_DMA3), |
272 | DEFINE_RES_IRQ(IRQ_DMA4), |
273 | DEFINE_RES_IRQ(IRQ_DMA5), |
274 | }; |
275 | |
276 | static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32); |
277 | |
278 | static struct platform_device sa11x0dma_device = { |
279 | .name = "sa11x0-dma" , |
280 | .id = -1, |
281 | .dev = { |
282 | .dma_mask = &sa11x0dma_dma_mask, |
283 | .coherent_dma_mask = 0xffffffff, |
284 | }, |
285 | .num_resources = ARRAY_SIZE(sa11x0dma_resources), |
286 | .resource = sa11x0dma_resources, |
287 | }; |
288 | |
289 | static struct platform_device *sa11x0_devices[] __initdata = { |
290 | &sa11x0udc_device, |
291 | &sa11x0uart1_device, |
292 | &sa11x0uart3_device, |
293 | &sa11x0ssp_device, |
294 | &sa11x0rtc_device, |
295 | &sa11x0dma_device, |
296 | }; |
297 | |
298 | static int __init sa1100_init(void) |
299 | { |
300 | struct resource wdt_res = DEFINE_RES_MEM(0x90000000, 0x20); |
301 | pm_power_off = sa1100_power_off; |
302 | |
303 | regulator_has_full_constraints(); |
304 | |
305 | platform_device_register_simple(name: "sa1100_wdt" , id: -1, res: &wdt_res, num: 1); |
306 | |
307 | return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices)); |
308 | } |
309 | |
310 | arch_initcall(sa1100_init); |
311 | |
312 | void __init sa11x0_init_late(void) |
313 | { |
314 | sa11x0_pm_init(); |
315 | } |
316 | |
317 | int __init sa11x0_register_fixed_regulator(int n, |
318 | struct fixed_voltage_config *cfg, |
319 | struct regulator_consumer_supply *supplies, unsigned num_supplies, |
320 | bool uses_gpio) |
321 | { |
322 | struct regulator_init_data *id; |
323 | |
324 | cfg->init_data = id = kzalloc(size: sizeof(*cfg->init_data), GFP_KERNEL); |
325 | if (!cfg->init_data) |
326 | return -ENOMEM; |
327 | |
328 | if (!uses_gpio) |
329 | id->constraints.always_on = 1; |
330 | id->constraints.name = cfg->supply_name; |
331 | id->constraints.min_uV = cfg->microvolts; |
332 | id->constraints.max_uV = cfg->microvolts; |
333 | id->constraints.valid_modes_mask = REGULATOR_MODE_NORMAL; |
334 | id->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS; |
335 | id->consumer_supplies = supplies; |
336 | id->num_consumer_supplies = num_supplies; |
337 | |
338 | platform_device_register_resndata(NULL, name: "reg-fixed-voltage" , id: n, |
339 | NULL, num: 0, data: cfg, size: sizeof(*cfg)); |
340 | return 0; |
341 | } |
342 | |
343 | /* |
344 | * Common I/O mapping: |
345 | * |
346 | * Typically, static virtual address mappings are as follow: |
347 | * |
348 | * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.) |
349 | * 0xf4000000-0xf4ffffff: SA-1111 |
350 | * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area) |
351 | * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above) |
352 | * 0xffff0000-0xffff0fff: SA1100 exception vectors |
353 | * 0xffff2000-0xffff2fff: Minicache copy_user_page area |
354 | * |
355 | * Below 0xe8000000 is reserved for vm allocation. |
356 | * |
357 | * The machine specific code must provide the extra mapping beside the |
358 | * default mapping provided here. |
359 | */ |
360 | |
361 | static struct map_desc standard_io_desc[] __initdata = { |
362 | { /* PCM */ |
363 | .virtual = 0xf8000000, |
364 | .pfn = __phys_to_pfn(0x80000000), |
365 | .length = 0x00100000, |
366 | .type = MT_DEVICE |
367 | }, { /* SCM */ |
368 | .virtual = 0xfa000000, |
369 | .pfn = __phys_to_pfn(0x90000000), |
370 | .length = 0x00100000, |
371 | .type = MT_DEVICE |
372 | }, { /* MER */ |
373 | .virtual = 0xfc000000, |
374 | .pfn = __phys_to_pfn(0xa0000000), |
375 | .length = 0x00100000, |
376 | .type = MT_DEVICE |
377 | }, { /* LCD + DMA */ |
378 | .virtual = 0xfe000000, |
379 | .pfn = __phys_to_pfn(0xb0000000), |
380 | .length = 0x00200000, |
381 | .type = MT_DEVICE |
382 | }, |
383 | }; |
384 | |
385 | void __init sa1100_map_io(void) |
386 | { |
387 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); |
388 | } |
389 | |
390 | void __init sa1100_timer_init(void) |
391 | { |
392 | pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000)); |
393 | } |
394 | |
395 | static struct resource irq_resource = |
396 | DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs" ); |
397 | |
398 | void __init sa1100_init_irq(void) |
399 | { |
400 | request_resource(root: &iomem_resource, new: &irq_resource); |
401 | |
402 | sa11x0_init_irq_nodt(IRQ_GPIO0_SC, irq_resource.start); |
403 | |
404 | sa1100_init_gpio(); |
405 | sa11xx_clk_init(); |
406 | } |
407 | |
408 | /* |
409 | * Disable the memory bus request/grant signals on the SA1110 to |
410 | * ensure that we don't receive spurious memory requests. We set |
411 | * the MBGNT signal false to ensure the SA1111 doesn't own the |
412 | * SDRAM bus. |
413 | */ |
414 | void sa1110_mb_disable(void) |
415 | { |
416 | unsigned long flags; |
417 | |
418 | local_irq_save(flags); |
419 | |
420 | PGSR &= ~GPIO_MBGNT; |
421 | GPCR = GPIO_MBGNT; |
422 | GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; |
423 | |
424 | GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ); |
425 | |
426 | local_irq_restore(flags); |
427 | } |
428 | |
429 | /* |
430 | * If the system is going to use the SA-1111 DMA engines, set up |
431 | * the memory bus request/grant pins. |
432 | */ |
433 | void sa1110_mb_enable(void) |
434 | { |
435 | unsigned long flags; |
436 | |
437 | local_irq_save(flags); |
438 | |
439 | PGSR &= ~GPIO_MBGNT; |
440 | GPCR = GPIO_MBGNT; |
441 | GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; |
442 | |
443 | GAFR |= (GPIO_MBGNT | GPIO_MBREQ); |
444 | TUCR |= TUCR_MR; |
445 | |
446 | local_irq_restore(flags); |
447 | } |
448 | |
449 | int sa11x0_gpio_set_wake(unsigned int gpio, unsigned int on) |
450 | { |
451 | if (on) |
452 | PWER |= BIT(gpio); |
453 | else |
454 | PWER &= ~BIT(gpio); |
455 | |
456 | return 0; |
457 | } |
458 | |
459 | int sa11x0_sc_set_wake(unsigned int irq, unsigned int on) |
460 | { |
461 | if (BIT(irq) != IC_RTCAlrm) |
462 | return -EINVAL; |
463 | |
464 | if (on) |
465 | PWER |= PWER_RTC; |
466 | else |
467 | PWER &= ~PWER_RTC; |
468 | |
469 | return 0; |
470 | } |
471 | |