1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * SPEAr3xx/6xx Machine family specific definition |
4 | * |
5 | * Copyright (C) 2009,2012 ST Microelectronics |
6 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> |
7 | * Viresh Kumar <vireshk@kernel.org> |
8 | */ |
9 | |
10 | #ifndef __MACH_SPEAR_H |
11 | #define __MACH_SPEAR_H |
12 | |
13 | #include <asm/page.h> |
14 | |
15 | #if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX) |
16 | |
17 | /* ICM1 - Low speed connection */ |
18 | #define SPEAR_ICM1_2_BASE UL(0xD0000000) |
19 | #define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000) |
20 | #define SPEAR_ICM1_UART_BASE UL(0xD0000000) |
21 | #define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE) |
22 | #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) |
23 | |
24 | /* ML-1, 2 - Multi Layer CPU Subsystem */ |
25 | #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) |
26 | #define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000) |
27 | |
28 | /* ICM3 - Basic Subsystem */ |
29 | #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) |
30 | #define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000) |
31 | #define SPEAR_ICM3_DMA_BASE UL(0xFC400000) |
32 | #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) |
33 | #define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE) |
34 | #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) |
35 | #define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE) |
36 | |
37 | /* Debug uart for linux, will be used for debug and uncompress messages */ |
38 | #define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE |
39 | |
40 | /* Sysctl base for spear platform */ |
41 | #define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE |
42 | #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE |
43 | #endif /* SPEAR3xx || SPEAR6XX */ |
44 | |
45 | /* SPEAr320 Macros */ |
46 | #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) |
47 | #define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000) |
48 | |
49 | #ifdef CONFIG_ARCH_SPEAR13XX |
50 | |
51 | #define PERIP_GRP2_BASE UL(0xB3000000) |
52 | #define VA_PERIP_GRP2_BASE IOMEM(0xF9000000) |
53 | #define MCIF_SDHCI_BASE UL(0xB3000000) |
54 | #define SYSRAM0_BASE UL(0xB3800000) |
55 | #define VA_SYSRAM0_BASE IOMEM(0xF9800000) |
56 | #define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) |
57 | |
58 | #define PERIP_GRP1_BASE UL(0xE0000000) |
59 | #define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) |
60 | #define UART_BASE UL(0xE0000000) |
61 | #define VA_UART_BASE IOMEM(0xFD000000) |
62 | #define SSP_BASE UL(0xE0100000) |
63 | #define MISC_BASE UL(0xE0700000) |
64 | #define VA_MISC_BASE IOMEM(0xFD700000) |
65 | |
66 | #define A9SM_AND_MPMC_BASE UL(0xEC000000) |
67 | #define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) |
68 | |
69 | #define SPEAR1310_RAS_BASE UL(0xD8400000) |
70 | #define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000)) |
71 | |
72 | /* A9SM peripheral offsets */ |
73 | #define A9SM_PERIP_BASE UL(0xEC800000) |
74 | #define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) |
75 | #define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) |
76 | |
77 | #define L2CC_BASE UL(0xED000000) |
78 | #define VA_L2CC_BASE IOMEM(UL(0xFB000000)) |
79 | |
80 | /* others */ |
81 | #define MCIF_CF_BASE UL(0xB2800000) |
82 | |
83 | /* Debug uart for linux, will be used for debug and uncompress messages */ |
84 | #define SPEAR_DBG_UART_BASE UART_BASE |
85 | |
86 | #endif /* SPEAR13XX */ |
87 | |
88 | #endif /* __MACH_SPEAR_H */ |
89 | |