| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * This file contains common function prototypes to avoid externs |
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| 4 | * in the c files. |
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| 5 | * |
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| 6 | * Copyright (C) 2011 Xilinx |
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| 7 | */ |
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| 8 | |
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| 9 | #ifndef __MACH_ZYNQ_COMMON_H__ |
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| 10 | #define __MACH_ZYNQ_COMMON_H__ |
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| 11 | |
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| 12 | extern int zynq_slcr_init(void); |
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| 13 | extern int zynq_early_slcr_init(void); |
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| 14 | extern void zynq_slcr_cpu_stop(int cpu); |
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| 15 | extern void zynq_slcr_cpu_start(int cpu); |
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| 16 | extern bool zynq_slcr_cpu_state_read(int cpu); |
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| 17 | extern void zynq_slcr_cpu_state_write(int cpu, bool die); |
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| 18 | extern u32 zynq_slcr_get_device_id(void); |
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| 19 | |
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| 20 | #ifdef CONFIG_SMP |
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| 21 | extern char zynq_secondary_trampoline; |
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| 22 | extern char zynq_secondary_trampoline_jump; |
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| 23 | extern char zynq_secondary_trampoline_end; |
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| 24 | extern int zynq_cpun_start(u32 address, int cpu); |
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| 25 | extern const struct smp_operations zynq_smp_ops; |
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| 26 | #endif |
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| 27 | |
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| 28 | extern void __iomem *zynq_scu_base; |
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| 29 | |
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| 30 | void zynq_pm_late_init(void); |
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| 31 | |
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| 32 | static inline void zynq_core_pm_init(void) |
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| 33 | { |
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| 34 | /* A9 clock gating */ |
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| 35 | asm volatile ("mrc p15, 0, r12, c15, c0, 0\n" |
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| 36 | "orr r12, r12, #1\n" |
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| 37 | "mcr p15, 0, r12, c15, c0, 0\n" |
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| 38 | : /* no outputs */ |
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| 39 | : /* no inputs */ |
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| 40 | : "r12" ); |
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| 41 | } |
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| 42 | |
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| 43 | #endif |
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| 44 | |
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