1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * arch/arm/probes/decode-thumb.c |
4 | * |
5 | * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>. |
6 | */ |
7 | |
8 | #include <linux/stddef.h> |
9 | #include <linux/kernel.h> |
10 | #include <linux/module.h> |
11 | |
12 | #include "decode.h" |
13 | #include "decode-thumb.h" |
14 | |
15 | |
16 | static const union decode_item t32_table_1110_100x_x0xx[] = { |
17 | /* Load/store multiple instructions */ |
18 | |
19 | /* Rn is PC 1110 100x x0xx 1111 xxxx xxxx xxxx xxxx */ |
20 | DECODE_REJECT (0xfe4f0000, 0xe80f0000), |
21 | |
22 | /* SRS 1110 1000 00x0 xxxx xxxx xxxx xxxx xxxx */ |
23 | /* RFE 1110 1000 00x1 xxxx xxxx xxxx xxxx xxxx */ |
24 | DECODE_REJECT (0xffc00000, 0xe8000000), |
25 | /* SRS 1110 1001 10x0 xxxx xxxx xxxx xxxx xxxx */ |
26 | /* RFE 1110 1001 10x1 xxxx xxxx xxxx xxxx xxxx */ |
27 | DECODE_REJECT (0xffc00000, 0xe9800000), |
28 | |
29 | /* STM Rn, {...pc} 1110 100x x0x0 xxxx 1xxx xxxx xxxx xxxx */ |
30 | DECODE_REJECT (0xfe508000, 0xe8008000), |
31 | /* LDM Rn, {...lr,pc} 1110 100x x0x1 xxxx 11xx xxxx xxxx xxxx */ |
32 | DECODE_REJECT (0xfe50c000, 0xe810c000), |
33 | /* LDM/STM Rn, {...sp} 1110 100x x0xx xxxx xx1x xxxx xxxx xxxx */ |
34 | DECODE_REJECT (0xfe402000, 0xe8002000), |
35 | |
36 | /* STMIA 1110 1000 10x0 xxxx xxxx xxxx xxxx xxxx */ |
37 | /* LDMIA 1110 1000 10x1 xxxx xxxx xxxx xxxx xxxx */ |
38 | /* STMDB 1110 1001 00x0 xxxx xxxx xxxx xxxx xxxx */ |
39 | /* LDMDB 1110 1001 00x1 xxxx xxxx xxxx xxxx xxxx */ |
40 | DECODE_CUSTOM (0xfe400000, 0xe8000000, PROBES_T32_LDMSTM), |
41 | |
42 | DECODE_END |
43 | }; |
44 | |
45 | static const union decode_item t32_table_1110_100x_x1xx[] = { |
46 | /* Load/store dual, load/store exclusive, table branch */ |
47 | |
48 | /* STRD (immediate) 1110 1000 x110 xxxx xxxx xxxx xxxx xxxx */ |
49 | /* LDRD (immediate) 1110 1000 x111 xxxx xxxx xxxx xxxx xxxx */ |
50 | DECODE_OR (0xff600000, 0xe8600000), |
51 | /* STRD (immediate) 1110 1001 x1x0 xxxx xxxx xxxx xxxx xxxx */ |
52 | /* LDRD (immediate) 1110 1001 x1x1 xxxx xxxx xxxx xxxx xxxx */ |
53 | DECODE_EMULATEX (0xff400000, 0xe9400000, PROBES_T32_LDRDSTRD, |
54 | REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)), |
55 | |
56 | /* TBB 1110 1000 1101 xxxx xxxx xxxx 0000 xxxx */ |
57 | /* TBH 1110 1000 1101 xxxx xxxx xxxx 0001 xxxx */ |
58 | DECODE_SIMULATEX(0xfff000e0, 0xe8d00000, PROBES_T32_TABLE_BRANCH, |
59 | REGS(NOSP, 0, 0, 0, NOSPPC)), |
60 | |
61 | /* STREX 1110 1000 0100 xxxx xxxx xxxx xxxx xxxx */ |
62 | /* LDREX 1110 1000 0101 xxxx xxxx xxxx xxxx xxxx */ |
63 | /* STREXB 1110 1000 1100 xxxx xxxx xxxx 0100 xxxx */ |
64 | /* STREXH 1110 1000 1100 xxxx xxxx xxxx 0101 xxxx */ |
65 | /* STREXD 1110 1000 1100 xxxx xxxx xxxx 0111 xxxx */ |
66 | /* LDREXB 1110 1000 1101 xxxx xxxx xxxx 0100 xxxx */ |
67 | /* LDREXH 1110 1000 1101 xxxx xxxx xxxx 0101 xxxx */ |
68 | /* LDREXD 1110 1000 1101 xxxx xxxx xxxx 0111 xxxx */ |
69 | /* And unallocated instructions... */ |
70 | DECODE_END |
71 | }; |
72 | |
73 | static const union decode_item t32_table_1110_101x[] = { |
74 | /* Data-processing (shifted register) */ |
75 | |
76 | /* TST 1110 1010 0001 xxxx xxxx 1111 xxxx xxxx */ |
77 | /* TEQ 1110 1010 1001 xxxx xxxx 1111 xxxx xxxx */ |
78 | DECODE_EMULATEX (0xff700f00, 0xea100f00, PROBES_T32_TST, |
79 | REGS(NOSPPC, 0, 0, 0, NOSPPC)), |
80 | |
81 | /* CMN 1110 1011 0001 xxxx xxxx 1111 xxxx xxxx */ |
82 | DECODE_OR (0xfff00f00, 0xeb100f00), |
83 | /* CMP 1110 1011 1011 xxxx xxxx 1111 xxxx xxxx */ |
84 | DECODE_EMULATEX (0xfff00f00, 0xebb00f00, PROBES_T32_TST, |
85 | REGS(NOPC, 0, 0, 0, NOSPPC)), |
86 | |
87 | /* MOV 1110 1010 010x 1111 xxxx xxxx xxxx xxxx */ |
88 | /* MVN 1110 1010 011x 1111 xxxx xxxx xxxx xxxx */ |
89 | DECODE_EMULATEX (0xffcf0000, 0xea4f0000, PROBES_T32_MOV, |
90 | REGS(0, 0, NOSPPC, 0, NOSPPC)), |
91 | |
92 | /* ??? 1110 1010 101x xxxx xxxx xxxx xxxx xxxx */ |
93 | /* ??? 1110 1010 111x xxxx xxxx xxxx xxxx xxxx */ |
94 | DECODE_REJECT (0xffa00000, 0xeaa00000), |
95 | /* ??? 1110 1011 001x xxxx xxxx xxxx xxxx xxxx */ |
96 | DECODE_REJECT (0xffe00000, 0xeb200000), |
97 | /* ??? 1110 1011 100x xxxx xxxx xxxx xxxx xxxx */ |
98 | DECODE_REJECT (0xffe00000, 0xeb800000), |
99 | /* ??? 1110 1011 111x xxxx xxxx xxxx xxxx xxxx */ |
100 | DECODE_REJECT (0xffe00000, 0xebe00000), |
101 | |
102 | /* ADD/SUB SP, SP, Rm, LSL #0..3 */ |
103 | /* 1110 1011 x0xx 1101 x000 1101 xx00 xxxx */ |
104 | DECODE_EMULATEX (0xff4f7f30, 0xeb0d0d00, PROBES_T32_ADDSUB, |
105 | REGS(SP, 0, SP, 0, NOSPPC)), |
106 | |
107 | /* ADD/SUB SP, SP, Rm, shift */ |
108 | /* 1110 1011 x0xx 1101 xxxx 1101 xxxx xxxx */ |
109 | DECODE_REJECT (0xff4f0f00, 0xeb0d0d00), |
110 | |
111 | /* ADD/SUB Rd, SP, Rm, shift */ |
112 | /* 1110 1011 x0xx 1101 xxxx xxxx xxxx xxxx */ |
113 | DECODE_EMULATEX (0xff4f0000, 0xeb0d0000, PROBES_T32_ADDSUB, |
114 | REGS(SP, 0, NOPC, 0, NOSPPC)), |
115 | |
116 | /* AND 1110 1010 000x xxxx xxxx xxxx xxxx xxxx */ |
117 | /* BIC 1110 1010 001x xxxx xxxx xxxx xxxx xxxx */ |
118 | /* ORR 1110 1010 010x xxxx xxxx xxxx xxxx xxxx */ |
119 | /* ORN 1110 1010 011x xxxx xxxx xxxx xxxx xxxx */ |
120 | /* EOR 1110 1010 100x xxxx xxxx xxxx xxxx xxxx */ |
121 | /* PKH 1110 1010 110x xxxx xxxx xxxx xxxx xxxx */ |
122 | /* ADD 1110 1011 000x xxxx xxxx xxxx xxxx xxxx */ |
123 | /* ADC 1110 1011 010x xxxx xxxx xxxx xxxx xxxx */ |
124 | /* SBC 1110 1011 011x xxxx xxxx xxxx xxxx xxxx */ |
125 | /* SUB 1110 1011 101x xxxx xxxx xxxx xxxx xxxx */ |
126 | /* RSB 1110 1011 110x xxxx xxxx xxxx xxxx xxxx */ |
127 | DECODE_EMULATEX (0xfe000000, 0xea000000, PROBES_T32_LOGICAL, |
128 | REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)), |
129 | |
130 | DECODE_END |
131 | }; |
132 | |
133 | static const union decode_item t32_table_1111_0x0x___0[] = { |
134 | /* Data-processing (modified immediate) */ |
135 | |
136 | /* TST 1111 0x00 0001 xxxx 0xxx 1111 xxxx xxxx */ |
137 | /* TEQ 1111 0x00 1001 xxxx 0xxx 1111 xxxx xxxx */ |
138 | DECODE_EMULATEX (0xfb708f00, 0xf0100f00, PROBES_T32_TST, |
139 | REGS(NOSPPC, 0, 0, 0, 0)), |
140 | |
141 | /* CMN 1111 0x01 0001 xxxx 0xxx 1111 xxxx xxxx */ |
142 | DECODE_OR (0xfbf08f00, 0xf1100f00), |
143 | /* CMP 1111 0x01 1011 xxxx 0xxx 1111 xxxx xxxx */ |
144 | DECODE_EMULATEX (0xfbf08f00, 0xf1b00f00, PROBES_T32_CMP, |
145 | REGS(NOPC, 0, 0, 0, 0)), |
146 | |
147 | /* MOV 1111 0x00 010x 1111 0xxx xxxx xxxx xxxx */ |
148 | /* MVN 1111 0x00 011x 1111 0xxx xxxx xxxx xxxx */ |
149 | DECODE_EMULATEX (0xfbcf8000, 0xf04f0000, PROBES_T32_MOV, |
150 | REGS(0, 0, NOSPPC, 0, 0)), |
151 | |
152 | /* ??? 1111 0x00 101x xxxx 0xxx xxxx xxxx xxxx */ |
153 | DECODE_REJECT (0xfbe08000, 0xf0a00000), |
154 | /* ??? 1111 0x00 110x xxxx 0xxx xxxx xxxx xxxx */ |
155 | /* ??? 1111 0x00 111x xxxx 0xxx xxxx xxxx xxxx */ |
156 | DECODE_REJECT (0xfbc08000, 0xf0c00000), |
157 | /* ??? 1111 0x01 001x xxxx 0xxx xxxx xxxx xxxx */ |
158 | DECODE_REJECT (0xfbe08000, 0xf1200000), |
159 | /* ??? 1111 0x01 100x xxxx 0xxx xxxx xxxx xxxx */ |
160 | DECODE_REJECT (0xfbe08000, 0xf1800000), |
161 | /* ??? 1111 0x01 111x xxxx 0xxx xxxx xxxx xxxx */ |
162 | DECODE_REJECT (0xfbe08000, 0xf1e00000), |
163 | |
164 | /* ADD Rd, SP, #imm 1111 0x01 000x 1101 0xxx xxxx xxxx xxxx */ |
165 | /* SUB Rd, SP, #imm 1111 0x01 101x 1101 0xxx xxxx xxxx xxxx */ |
166 | DECODE_EMULATEX (0xfb4f8000, 0xf10d0000, PROBES_T32_ADDSUB, |
167 | REGS(SP, 0, NOPC, 0, 0)), |
168 | |
169 | /* AND 1111 0x00 000x xxxx 0xxx xxxx xxxx xxxx */ |
170 | /* BIC 1111 0x00 001x xxxx 0xxx xxxx xxxx xxxx */ |
171 | /* ORR 1111 0x00 010x xxxx 0xxx xxxx xxxx xxxx */ |
172 | /* ORN 1111 0x00 011x xxxx 0xxx xxxx xxxx xxxx */ |
173 | /* EOR 1111 0x00 100x xxxx 0xxx xxxx xxxx xxxx */ |
174 | /* ADD 1111 0x01 000x xxxx 0xxx xxxx xxxx xxxx */ |
175 | /* ADC 1111 0x01 010x xxxx 0xxx xxxx xxxx xxxx */ |
176 | /* SBC 1111 0x01 011x xxxx 0xxx xxxx xxxx xxxx */ |
177 | /* SUB 1111 0x01 101x xxxx 0xxx xxxx xxxx xxxx */ |
178 | /* RSB 1111 0x01 110x xxxx 0xxx xxxx xxxx xxxx */ |
179 | DECODE_EMULATEX (0xfa008000, 0xf0000000, PROBES_T32_LOGICAL, |
180 | REGS(NOSPPC, 0, NOSPPC, 0, 0)), |
181 | |
182 | DECODE_END |
183 | }; |
184 | |
185 | static const union decode_item t32_table_1111_0x1x___0[] = { |
186 | /* Data-processing (plain binary immediate) */ |
187 | |
188 | /* ADDW Rd, PC, #imm 1111 0x10 0000 1111 0xxx xxxx xxxx xxxx */ |
189 | DECODE_OR (0xfbff8000, 0xf20f0000), |
190 | /* SUBW Rd, PC, #imm 1111 0x10 1010 1111 0xxx xxxx xxxx xxxx */ |
191 | DECODE_EMULATEX (0xfbff8000, 0xf2af0000, PROBES_T32_ADDWSUBW_PC, |
192 | REGS(PC, 0, NOSPPC, 0, 0)), |
193 | |
194 | /* ADDW SP, SP, #imm 1111 0x10 0000 1101 0xxx 1101 xxxx xxxx */ |
195 | DECODE_OR (0xfbff8f00, 0xf20d0d00), |
196 | /* SUBW SP, SP, #imm 1111 0x10 1010 1101 0xxx 1101 xxxx xxxx */ |
197 | DECODE_EMULATEX (0xfbff8f00, 0xf2ad0d00, PROBES_T32_ADDWSUBW, |
198 | REGS(SP, 0, SP, 0, 0)), |
199 | |
200 | /* ADDW 1111 0x10 0000 xxxx 0xxx xxxx xxxx xxxx */ |
201 | DECODE_OR (0xfbf08000, 0xf2000000), |
202 | /* SUBW 1111 0x10 1010 xxxx 0xxx xxxx xxxx xxxx */ |
203 | DECODE_EMULATEX (0xfbf08000, 0xf2a00000, PROBES_T32_ADDWSUBW, |
204 | REGS(NOPCX, 0, NOSPPC, 0, 0)), |
205 | |
206 | /* MOVW 1111 0x10 0100 xxxx 0xxx xxxx xxxx xxxx */ |
207 | /* MOVT 1111 0x10 1100 xxxx 0xxx xxxx xxxx xxxx */ |
208 | DECODE_EMULATEX (0xfb708000, 0xf2400000, PROBES_T32_MOVW, |
209 | REGS(0, 0, NOSPPC, 0, 0)), |
210 | |
211 | /* SSAT16 1111 0x11 0010 xxxx 0000 xxxx 00xx xxxx */ |
212 | /* SSAT 1111 0x11 00x0 xxxx 0xxx xxxx xxxx xxxx */ |
213 | /* USAT16 1111 0x11 1010 xxxx 0000 xxxx 00xx xxxx */ |
214 | /* USAT 1111 0x11 10x0 xxxx 0xxx xxxx xxxx xxxx */ |
215 | DECODE_EMULATEX (0xfb508000, 0xf3000000, PROBES_T32_SAT, |
216 | REGS(NOSPPC, 0, NOSPPC, 0, 0)), |
217 | |
218 | /* SFBX 1111 0x11 0100 xxxx 0xxx xxxx xxxx xxxx */ |
219 | /* UFBX 1111 0x11 1100 xxxx 0xxx xxxx xxxx xxxx */ |
220 | DECODE_EMULATEX (0xfb708000, 0xf3400000, PROBES_T32_BITFIELD, |
221 | REGS(NOSPPC, 0, NOSPPC, 0, 0)), |
222 | |
223 | /* BFC 1111 0x11 0110 1111 0xxx xxxx xxxx xxxx */ |
224 | DECODE_EMULATEX (0xfbff8000, 0xf36f0000, PROBES_T32_BITFIELD, |
225 | REGS(0, 0, NOSPPC, 0, 0)), |
226 | |
227 | /* BFI 1111 0x11 0110 xxxx 0xxx xxxx xxxx xxxx */ |
228 | DECODE_EMULATEX (0xfbf08000, 0xf3600000, PROBES_T32_BITFIELD, |
229 | REGS(NOSPPCX, 0, NOSPPC, 0, 0)), |
230 | |
231 | DECODE_END |
232 | }; |
233 | |
234 | static const union decode_item t32_table_1111_0xxx___1[] = { |
235 | /* Branches and miscellaneous control */ |
236 | |
237 | /* YIELD 1111 0011 1010 xxxx 10x0 x000 0000 0001 */ |
238 | DECODE_OR (0xfff0d7ff, 0xf3a08001), |
239 | /* SEV 1111 0011 1010 xxxx 10x0 x000 0000 0100 */ |
240 | DECODE_EMULATE (0xfff0d7ff, 0xf3a08004, PROBES_T32_SEV), |
241 | /* NOP 1111 0011 1010 xxxx 10x0 x000 0000 0000 */ |
242 | /* WFE 1111 0011 1010 xxxx 10x0 x000 0000 0010 */ |
243 | /* WFI 1111 0011 1010 xxxx 10x0 x000 0000 0011 */ |
244 | DECODE_SIMULATE (0xfff0d7fc, 0xf3a08000, PROBES_T32_WFE), |
245 | |
246 | /* MRS Rd, CPSR 1111 0011 1110 xxxx 10x0 xxxx xxxx xxxx */ |
247 | DECODE_SIMULATEX(0xfff0d000, 0xf3e08000, PROBES_T32_MRS, |
248 | REGS(0, 0, NOSPPC, 0, 0)), |
249 | |
250 | /* |
251 | * Unsupported instructions |
252 | * 1111 0x11 1xxx xxxx 10x0 xxxx xxxx xxxx |
253 | * |
254 | * MSR 1111 0011 100x xxxx 10x0 xxxx xxxx xxxx |
255 | * DBG hint 1111 0011 1010 xxxx 10x0 x000 1111 xxxx |
256 | * Unallocated hints 1111 0011 1010 xxxx 10x0 x000 xxxx xxxx |
257 | * CPS 1111 0011 1010 xxxx 10x0 xxxx xxxx xxxx |
258 | * CLREX/DSB/DMB/ISB 1111 0011 1011 xxxx 10x0 xxxx xxxx xxxx |
259 | * BXJ 1111 0011 1100 xxxx 10x0 xxxx xxxx xxxx |
260 | * SUBS PC,LR,#<imm8> 1111 0011 1101 xxxx 10x0 xxxx xxxx xxxx |
261 | * MRS Rd, SPSR 1111 0011 1111 xxxx 10x0 xxxx xxxx xxxx |
262 | * SMC 1111 0111 1111 xxxx 1000 xxxx xxxx xxxx |
263 | * UNDEFINED 1111 0111 1111 xxxx 1010 xxxx xxxx xxxx |
264 | * ??? 1111 0111 1xxx xxxx 1010 xxxx xxxx xxxx |
265 | */ |
266 | DECODE_REJECT (0xfb80d000, 0xf3808000), |
267 | |
268 | /* Bcc 1111 0xxx xxxx xxxx 10x0 xxxx xxxx xxxx */ |
269 | DECODE_CUSTOM (0xf800d000, 0xf0008000, PROBES_T32_BRANCH_COND), |
270 | |
271 | /* BLX 1111 0xxx xxxx xxxx 11x0 xxxx xxxx xxx0 */ |
272 | DECODE_OR (0xf800d001, 0xf000c000), |
273 | /* B 1111 0xxx xxxx xxxx 10x1 xxxx xxxx xxxx */ |
274 | /* BL 1111 0xxx xxxx xxxx 11x1 xxxx xxxx xxxx */ |
275 | DECODE_SIMULATE (0xf8009000, 0xf0009000, PROBES_T32_BRANCH), |
276 | |
277 | DECODE_END |
278 | }; |
279 | |
280 | static const union decode_item t32_table_1111_100x_x0x1__1111[] = { |
281 | /* Memory hints */ |
282 | |
283 | /* PLD (literal) 1111 1000 x001 1111 1111 xxxx xxxx xxxx */ |
284 | /* PLI (literal) 1111 1001 x001 1111 1111 xxxx xxxx xxxx */ |
285 | DECODE_SIMULATE (0xfe7ff000, 0xf81ff000, PROBES_T32_PLDI), |
286 | |
287 | /* PLD{W} (immediate) 1111 1000 10x1 xxxx 1111 xxxx xxxx xxxx */ |
288 | DECODE_OR (0xffd0f000, 0xf890f000), |
289 | /* PLD{W} (immediate) 1111 1000 00x1 xxxx 1111 1100 xxxx xxxx */ |
290 | DECODE_OR (0xffd0ff00, 0xf810fc00), |
291 | /* PLI (immediate) 1111 1001 1001 xxxx 1111 xxxx xxxx xxxx */ |
292 | DECODE_OR (0xfff0f000, 0xf990f000), |
293 | /* PLI (immediate) 1111 1001 0001 xxxx 1111 1100 xxxx xxxx */ |
294 | DECODE_SIMULATEX(0xfff0ff00, 0xf910fc00, PROBES_T32_PLDI, |
295 | REGS(NOPCX, 0, 0, 0, 0)), |
296 | |
297 | /* PLD{W} (register) 1111 1000 00x1 xxxx 1111 0000 00xx xxxx */ |
298 | DECODE_OR (0xffd0ffc0, 0xf810f000), |
299 | /* PLI (register) 1111 1001 0001 xxxx 1111 0000 00xx xxxx */ |
300 | DECODE_SIMULATEX(0xfff0ffc0, 0xf910f000, PROBES_T32_PLDI, |
301 | REGS(NOPCX, 0, 0, 0, NOSPPC)), |
302 | |
303 | /* Other unallocated instructions... */ |
304 | DECODE_END |
305 | }; |
306 | |
307 | static const union decode_item t32_table_1111_100x[] = { |
308 | /* Store/Load single data item */ |
309 | |
310 | /* ??? 1111 100x x11x xxxx xxxx xxxx xxxx xxxx */ |
311 | DECODE_REJECT (0xfe600000, 0xf8600000), |
312 | |
313 | /* ??? 1111 1001 0101 xxxx xxxx xxxx xxxx xxxx */ |
314 | DECODE_REJECT (0xfff00000, 0xf9500000), |
315 | |
316 | /* ??? 1111 100x 0xxx xxxx xxxx 10x0 xxxx xxxx */ |
317 | DECODE_REJECT (0xfe800d00, 0xf8000800), |
318 | |
319 | /* STRBT 1111 1000 0000 xxxx xxxx 1110 xxxx xxxx */ |
320 | /* STRHT 1111 1000 0010 xxxx xxxx 1110 xxxx xxxx */ |
321 | /* STRT 1111 1000 0100 xxxx xxxx 1110 xxxx xxxx */ |
322 | /* LDRBT 1111 1000 0001 xxxx xxxx 1110 xxxx xxxx */ |
323 | /* LDRSBT 1111 1001 0001 xxxx xxxx 1110 xxxx xxxx */ |
324 | /* LDRHT 1111 1000 0011 xxxx xxxx 1110 xxxx xxxx */ |
325 | /* LDRSHT 1111 1001 0011 xxxx xxxx 1110 xxxx xxxx */ |
326 | /* LDRT 1111 1000 0101 xxxx xxxx 1110 xxxx xxxx */ |
327 | DECODE_REJECT (0xfe800f00, 0xf8000e00), |
328 | |
329 | /* STR{,B,H} Rn,[PC...] 1111 1000 xxx0 1111 xxxx xxxx xxxx xxxx */ |
330 | DECODE_REJECT (0xff1f0000, 0xf80f0000), |
331 | |
332 | /* STR{,B,H} PC,[Rn...] 1111 1000 xxx0 xxxx 1111 xxxx xxxx xxxx */ |
333 | DECODE_REJECT (0xff10f000, 0xf800f000), |
334 | |
335 | /* LDR (literal) 1111 1000 x101 1111 xxxx xxxx xxxx xxxx */ |
336 | DECODE_SIMULATEX(0xff7f0000, 0xf85f0000, PROBES_T32_LDR_LIT, |
337 | REGS(PC, ANY, 0, 0, 0)), |
338 | |
339 | /* STR (immediate) 1111 1000 0100 xxxx xxxx 1xxx xxxx xxxx */ |
340 | /* LDR (immediate) 1111 1000 0101 xxxx xxxx 1xxx xxxx xxxx */ |
341 | DECODE_OR (0xffe00800, 0xf8400800), |
342 | /* STR (immediate) 1111 1000 1100 xxxx xxxx xxxx xxxx xxxx */ |
343 | /* LDR (immediate) 1111 1000 1101 xxxx xxxx xxxx xxxx xxxx */ |
344 | DECODE_EMULATEX (0xffe00000, 0xf8c00000, PROBES_T32_LDRSTR, |
345 | REGS(NOPCX, ANY, 0, 0, 0)), |
346 | |
347 | /* STR (register) 1111 1000 0100 xxxx xxxx 0000 00xx xxxx */ |
348 | /* LDR (register) 1111 1000 0101 xxxx xxxx 0000 00xx xxxx */ |
349 | DECODE_EMULATEX (0xffe00fc0, 0xf8400000, PROBES_T32_LDRSTR, |
350 | REGS(NOPCX, ANY, 0, 0, NOSPPC)), |
351 | |
352 | /* LDRB (literal) 1111 1000 x001 1111 xxxx xxxx xxxx xxxx */ |
353 | /* LDRSB (literal) 1111 1001 x001 1111 xxxx xxxx xxxx xxxx */ |
354 | /* LDRH (literal) 1111 1000 x011 1111 xxxx xxxx xxxx xxxx */ |
355 | /* LDRSH (literal) 1111 1001 x011 1111 xxxx xxxx xxxx xxxx */ |
356 | DECODE_SIMULATEX(0xfe5f0000, 0xf81f0000, PROBES_T32_LDR_LIT, |
357 | REGS(PC, NOSPPCX, 0, 0, 0)), |
358 | |
359 | /* STRB (immediate) 1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */ |
360 | /* STRH (immediate) 1111 1000 0010 xxxx xxxx 1xxx xxxx xxxx */ |
361 | /* LDRB (immediate) 1111 1000 0001 xxxx xxxx 1xxx xxxx xxxx */ |
362 | /* LDRSB (immediate) 1111 1001 0001 xxxx xxxx 1xxx xxxx xxxx */ |
363 | /* LDRH (immediate) 1111 1000 0011 xxxx xxxx 1xxx xxxx xxxx */ |
364 | /* LDRSH (immediate) 1111 1001 0011 xxxx xxxx 1xxx xxxx xxxx */ |
365 | DECODE_OR (0xfec00800, 0xf8000800), |
366 | /* STRB (immediate) 1111 1000 1000 xxxx xxxx xxxx xxxx xxxx */ |
367 | /* STRH (immediate) 1111 1000 1010 xxxx xxxx xxxx xxxx xxxx */ |
368 | /* LDRB (immediate) 1111 1000 1001 xxxx xxxx xxxx xxxx xxxx */ |
369 | /* LDRSB (immediate) 1111 1001 1001 xxxx xxxx xxxx xxxx xxxx */ |
370 | /* LDRH (immediate) 1111 1000 1011 xxxx xxxx xxxx xxxx xxxx */ |
371 | /* LDRSH (immediate) 1111 1001 1011 xxxx xxxx xxxx xxxx xxxx */ |
372 | DECODE_EMULATEX (0xfec00000, 0xf8800000, PROBES_T32_LDRSTR, |
373 | REGS(NOPCX, NOSPPCX, 0, 0, 0)), |
374 | |
375 | /* STRB (register) 1111 1000 0000 xxxx xxxx 0000 00xx xxxx */ |
376 | /* STRH (register) 1111 1000 0010 xxxx xxxx 0000 00xx xxxx */ |
377 | /* LDRB (register) 1111 1000 0001 xxxx xxxx 0000 00xx xxxx */ |
378 | /* LDRSB (register) 1111 1001 0001 xxxx xxxx 0000 00xx xxxx */ |
379 | /* LDRH (register) 1111 1000 0011 xxxx xxxx 0000 00xx xxxx */ |
380 | /* LDRSH (register) 1111 1001 0011 xxxx xxxx 0000 00xx xxxx */ |
381 | DECODE_EMULATEX (0xfe800fc0, 0xf8000000, PROBES_T32_LDRSTR, |
382 | REGS(NOPCX, NOSPPCX, 0, 0, NOSPPC)), |
383 | |
384 | /* Other unallocated instructions... */ |
385 | DECODE_END |
386 | }; |
387 | |
388 | static const union decode_item t32_table_1111_1010___1111[] = { |
389 | /* Data-processing (register) */ |
390 | |
391 | /* ??? 1111 1010 011x xxxx 1111 xxxx 1xxx xxxx */ |
392 | DECODE_REJECT (0xffe0f080, 0xfa60f080), |
393 | |
394 | /* SXTH 1111 1010 0000 1111 1111 xxxx 1xxx xxxx */ |
395 | /* UXTH 1111 1010 0001 1111 1111 xxxx 1xxx xxxx */ |
396 | /* SXTB16 1111 1010 0010 1111 1111 xxxx 1xxx xxxx */ |
397 | /* UXTB16 1111 1010 0011 1111 1111 xxxx 1xxx xxxx */ |
398 | /* SXTB 1111 1010 0100 1111 1111 xxxx 1xxx xxxx */ |
399 | /* UXTB 1111 1010 0101 1111 1111 xxxx 1xxx xxxx */ |
400 | DECODE_EMULATEX (0xff8ff080, 0xfa0ff080, PROBES_T32_SIGN_EXTEND, |
401 | REGS(0, 0, NOSPPC, 0, NOSPPC)), |
402 | |
403 | |
404 | /* ??? 1111 1010 1xxx xxxx 1111 xxxx 0x11 xxxx */ |
405 | DECODE_REJECT (0xff80f0b0, 0xfa80f030), |
406 | /* ??? 1111 1010 1x11 xxxx 1111 xxxx 0xxx xxxx */ |
407 | DECODE_REJECT (0xffb0f080, 0xfab0f000), |
408 | |
409 | /* SADD16 1111 1010 1001 xxxx 1111 xxxx 0000 xxxx */ |
410 | /* SASX 1111 1010 1010 xxxx 1111 xxxx 0000 xxxx */ |
411 | /* SSAX 1111 1010 1110 xxxx 1111 xxxx 0000 xxxx */ |
412 | /* SSUB16 1111 1010 1101 xxxx 1111 xxxx 0000 xxxx */ |
413 | /* SADD8 1111 1010 1000 xxxx 1111 xxxx 0000 xxxx */ |
414 | /* SSUB8 1111 1010 1100 xxxx 1111 xxxx 0000 xxxx */ |
415 | |
416 | /* QADD16 1111 1010 1001 xxxx 1111 xxxx 0001 xxxx */ |
417 | /* QASX 1111 1010 1010 xxxx 1111 xxxx 0001 xxxx */ |
418 | /* QSAX 1111 1010 1110 xxxx 1111 xxxx 0001 xxxx */ |
419 | /* QSUB16 1111 1010 1101 xxxx 1111 xxxx 0001 xxxx */ |
420 | /* QADD8 1111 1010 1000 xxxx 1111 xxxx 0001 xxxx */ |
421 | /* QSUB8 1111 1010 1100 xxxx 1111 xxxx 0001 xxxx */ |
422 | |
423 | /* SHADD16 1111 1010 1001 xxxx 1111 xxxx 0010 xxxx */ |
424 | /* SHASX 1111 1010 1010 xxxx 1111 xxxx 0010 xxxx */ |
425 | /* SHSAX 1111 1010 1110 xxxx 1111 xxxx 0010 xxxx */ |
426 | /* SHSUB16 1111 1010 1101 xxxx 1111 xxxx 0010 xxxx */ |
427 | /* SHADD8 1111 1010 1000 xxxx 1111 xxxx 0010 xxxx */ |
428 | /* SHSUB8 1111 1010 1100 xxxx 1111 xxxx 0010 xxxx */ |
429 | |
430 | /* UADD16 1111 1010 1001 xxxx 1111 xxxx 0100 xxxx */ |
431 | /* UASX 1111 1010 1010 xxxx 1111 xxxx 0100 xxxx */ |
432 | /* USAX 1111 1010 1110 xxxx 1111 xxxx 0100 xxxx */ |
433 | /* USUB16 1111 1010 1101 xxxx 1111 xxxx 0100 xxxx */ |
434 | /* UADD8 1111 1010 1000 xxxx 1111 xxxx 0100 xxxx */ |
435 | /* USUB8 1111 1010 1100 xxxx 1111 xxxx 0100 xxxx */ |
436 | |
437 | /* UQADD16 1111 1010 1001 xxxx 1111 xxxx 0101 xxxx */ |
438 | /* UQASX 1111 1010 1010 xxxx 1111 xxxx 0101 xxxx */ |
439 | /* UQSAX 1111 1010 1110 xxxx 1111 xxxx 0101 xxxx */ |
440 | /* UQSUB16 1111 1010 1101 xxxx 1111 xxxx 0101 xxxx */ |
441 | /* UQADD8 1111 1010 1000 xxxx 1111 xxxx 0101 xxxx */ |
442 | /* UQSUB8 1111 1010 1100 xxxx 1111 xxxx 0101 xxxx */ |
443 | |
444 | /* UHADD16 1111 1010 1001 xxxx 1111 xxxx 0110 xxxx */ |
445 | /* UHASX 1111 1010 1010 xxxx 1111 xxxx 0110 xxxx */ |
446 | /* UHSAX 1111 1010 1110 xxxx 1111 xxxx 0110 xxxx */ |
447 | /* UHSUB16 1111 1010 1101 xxxx 1111 xxxx 0110 xxxx */ |
448 | /* UHADD8 1111 1010 1000 xxxx 1111 xxxx 0110 xxxx */ |
449 | /* UHSUB8 1111 1010 1100 xxxx 1111 xxxx 0110 xxxx */ |
450 | DECODE_OR (0xff80f080, 0xfa80f000), |
451 | |
452 | /* SXTAH 1111 1010 0000 xxxx 1111 xxxx 1xxx xxxx */ |
453 | /* UXTAH 1111 1010 0001 xxxx 1111 xxxx 1xxx xxxx */ |
454 | /* SXTAB16 1111 1010 0010 xxxx 1111 xxxx 1xxx xxxx */ |
455 | /* UXTAB16 1111 1010 0011 xxxx 1111 xxxx 1xxx xxxx */ |
456 | /* SXTAB 1111 1010 0100 xxxx 1111 xxxx 1xxx xxxx */ |
457 | /* UXTAB 1111 1010 0101 xxxx 1111 xxxx 1xxx xxxx */ |
458 | DECODE_OR (0xff80f080, 0xfa00f080), |
459 | |
460 | /* QADD 1111 1010 1000 xxxx 1111 xxxx 1000 xxxx */ |
461 | /* QDADD 1111 1010 1000 xxxx 1111 xxxx 1001 xxxx */ |
462 | /* QSUB 1111 1010 1000 xxxx 1111 xxxx 1010 xxxx */ |
463 | /* QDSUB 1111 1010 1000 xxxx 1111 xxxx 1011 xxxx */ |
464 | DECODE_OR (0xfff0f0c0, 0xfa80f080), |
465 | |
466 | /* SEL 1111 1010 1010 xxxx 1111 xxxx 1000 xxxx */ |
467 | DECODE_OR (0xfff0f0f0, 0xfaa0f080), |
468 | |
469 | /* LSL 1111 1010 000x xxxx 1111 xxxx 0000 xxxx */ |
470 | /* LSR 1111 1010 001x xxxx 1111 xxxx 0000 xxxx */ |
471 | /* ASR 1111 1010 010x xxxx 1111 xxxx 0000 xxxx */ |
472 | /* ROR 1111 1010 011x xxxx 1111 xxxx 0000 xxxx */ |
473 | DECODE_EMULATEX (0xff80f0f0, 0xfa00f000, PROBES_T32_MEDIA, |
474 | REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)), |
475 | |
476 | /* CLZ 1111 1010 1010 xxxx 1111 xxxx 1000 xxxx */ |
477 | DECODE_OR (0xfff0f0f0, 0xfab0f080), |
478 | |
479 | /* REV 1111 1010 1001 xxxx 1111 xxxx 1000 xxxx */ |
480 | /* REV16 1111 1010 1001 xxxx 1111 xxxx 1001 xxxx */ |
481 | /* RBIT 1111 1010 1001 xxxx 1111 xxxx 1010 xxxx */ |
482 | /* REVSH 1111 1010 1001 xxxx 1111 xxxx 1011 xxxx */ |
483 | DECODE_EMULATEX (0xfff0f0c0, 0xfa90f080, PROBES_T32_REVERSE, |
484 | REGS(NOSPPC, 0, NOSPPC, 0, SAMEAS16)), |
485 | |
486 | /* Other unallocated instructions... */ |
487 | DECODE_END |
488 | }; |
489 | |
490 | static const union decode_item t32_table_1111_1011_0[] = { |
491 | /* Multiply, multiply accumulate, and absolute difference */ |
492 | |
493 | /* ??? 1111 1011 0000 xxxx 1111 xxxx 0001 xxxx */ |
494 | DECODE_REJECT (0xfff0f0f0, 0xfb00f010), |
495 | /* ??? 1111 1011 0111 xxxx 1111 xxxx 0001 xxxx */ |
496 | DECODE_REJECT (0xfff0f0f0, 0xfb70f010), |
497 | |
498 | /* SMULxy 1111 1011 0001 xxxx 1111 xxxx 00xx xxxx */ |
499 | DECODE_OR (0xfff0f0c0, 0xfb10f000), |
500 | /* MUL 1111 1011 0000 xxxx 1111 xxxx 0000 xxxx */ |
501 | /* SMUAD{X} 1111 1011 0010 xxxx 1111 xxxx 000x xxxx */ |
502 | /* SMULWy 1111 1011 0011 xxxx 1111 xxxx 000x xxxx */ |
503 | /* SMUSD{X} 1111 1011 0100 xxxx 1111 xxxx 000x xxxx */ |
504 | /* SMMUL{R} 1111 1011 0101 xxxx 1111 xxxx 000x xxxx */ |
505 | /* USAD8 1111 1011 0111 xxxx 1111 xxxx 0000 xxxx */ |
506 | DECODE_EMULATEX (0xff80f0e0, 0xfb00f000, PROBES_T32_MUL_ADD, |
507 | REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)), |
508 | |
509 | /* ??? 1111 1011 0111 xxxx xxxx xxxx 0001 xxxx */ |
510 | DECODE_REJECT (0xfff000f0, 0xfb700010), |
511 | |
512 | /* SMLAxy 1111 1011 0001 xxxx xxxx xxxx 00xx xxxx */ |
513 | DECODE_OR (0xfff000c0, 0xfb100000), |
514 | /* MLA 1111 1011 0000 xxxx xxxx xxxx 0000 xxxx */ |
515 | /* MLS 1111 1011 0000 xxxx xxxx xxxx 0001 xxxx */ |
516 | /* SMLAD{X} 1111 1011 0010 xxxx xxxx xxxx 000x xxxx */ |
517 | /* SMLAWy 1111 1011 0011 xxxx xxxx xxxx 000x xxxx */ |
518 | /* SMLSD{X} 1111 1011 0100 xxxx xxxx xxxx 000x xxxx */ |
519 | /* SMMLA{R} 1111 1011 0101 xxxx xxxx xxxx 000x xxxx */ |
520 | /* SMMLS{R} 1111 1011 0110 xxxx xxxx xxxx 000x xxxx */ |
521 | /* USADA8 1111 1011 0111 xxxx xxxx xxxx 0000 xxxx */ |
522 | DECODE_EMULATEX (0xff8000c0, 0xfb000000, PROBES_T32_MUL_ADD2, |
523 | REGS(NOSPPC, NOSPPCX, NOSPPC, 0, NOSPPC)), |
524 | |
525 | /* Other unallocated instructions... */ |
526 | DECODE_END |
527 | }; |
528 | |
529 | static const union decode_item t32_table_1111_1011_1[] = { |
530 | /* Long multiply, long multiply accumulate, and divide */ |
531 | |
532 | /* UMAAL 1111 1011 1110 xxxx xxxx xxxx 0110 xxxx */ |
533 | DECODE_OR (0xfff000f0, 0xfbe00060), |
534 | /* SMLALxy 1111 1011 1100 xxxx xxxx xxxx 10xx xxxx */ |
535 | DECODE_OR (0xfff000c0, 0xfbc00080), |
536 | /* SMLALD{X} 1111 1011 1100 xxxx xxxx xxxx 110x xxxx */ |
537 | /* SMLSLD{X} 1111 1011 1101 xxxx xxxx xxxx 110x xxxx */ |
538 | DECODE_OR (0xffe000e0, 0xfbc000c0), |
539 | /* SMULL 1111 1011 1000 xxxx xxxx xxxx 0000 xxxx */ |
540 | /* UMULL 1111 1011 1010 xxxx xxxx xxxx 0000 xxxx */ |
541 | /* SMLAL 1111 1011 1100 xxxx xxxx xxxx 0000 xxxx */ |
542 | /* UMLAL 1111 1011 1110 xxxx xxxx xxxx 0000 xxxx */ |
543 | DECODE_EMULATEX (0xff9000f0, 0xfb800000, PROBES_T32_MUL_ADD_LONG, |
544 | REGS(NOSPPC, NOSPPC, NOSPPC, 0, NOSPPC)), |
545 | |
546 | /* SDIV 1111 1011 1001 xxxx xxxx xxxx 1111 xxxx */ |
547 | /* UDIV 1111 1011 1011 xxxx xxxx xxxx 1111 xxxx */ |
548 | /* Other unallocated instructions... */ |
549 | DECODE_END |
550 | }; |
551 | |
552 | const union decode_item probes_decode_thumb32_table[] = { |
553 | |
554 | /* |
555 | * Load/store multiple instructions |
556 | * 1110 100x x0xx xxxx xxxx xxxx xxxx xxxx |
557 | */ |
558 | DECODE_TABLE (0xfe400000, 0xe8000000, t32_table_1110_100x_x0xx), |
559 | |
560 | /* |
561 | * Load/store dual, load/store exclusive, table branch |
562 | * 1110 100x x1xx xxxx xxxx xxxx xxxx xxxx |
563 | */ |
564 | DECODE_TABLE (0xfe400000, 0xe8400000, t32_table_1110_100x_x1xx), |
565 | |
566 | /* |
567 | * Data-processing (shifted register) |
568 | * 1110 101x xxxx xxxx xxxx xxxx xxxx xxxx |
569 | */ |
570 | DECODE_TABLE (0xfe000000, 0xea000000, t32_table_1110_101x), |
571 | |
572 | /* |
573 | * Coprocessor instructions |
574 | * 1110 11xx xxxx xxxx xxxx xxxx xxxx xxxx |
575 | */ |
576 | DECODE_REJECT (0xfc000000, 0xec000000), |
577 | |
578 | /* |
579 | * Data-processing (modified immediate) |
580 | * 1111 0x0x xxxx xxxx 0xxx xxxx xxxx xxxx |
581 | */ |
582 | DECODE_TABLE (0xfa008000, 0xf0000000, t32_table_1111_0x0x___0), |
583 | |
584 | /* |
585 | * Data-processing (plain binary immediate) |
586 | * 1111 0x1x xxxx xxxx 0xxx xxxx xxxx xxxx |
587 | */ |
588 | DECODE_TABLE (0xfa008000, 0xf2000000, t32_table_1111_0x1x___0), |
589 | |
590 | /* |
591 | * Branches and miscellaneous control |
592 | * 1111 0xxx xxxx xxxx 1xxx xxxx xxxx xxxx |
593 | */ |
594 | DECODE_TABLE (0xf8008000, 0xf0008000, t32_table_1111_0xxx___1), |
595 | |
596 | /* |
597 | * Advanced SIMD element or structure load/store instructions |
598 | * 1111 1001 xxx0 xxxx xxxx xxxx xxxx xxxx |
599 | */ |
600 | DECODE_REJECT (0xff100000, 0xf9000000), |
601 | |
602 | /* |
603 | * Memory hints |
604 | * 1111 100x x0x1 xxxx 1111 xxxx xxxx xxxx |
605 | */ |
606 | DECODE_TABLE (0xfe50f000, 0xf810f000, t32_table_1111_100x_x0x1__1111), |
607 | |
608 | /* |
609 | * Store single data item |
610 | * 1111 1000 xxx0 xxxx xxxx xxxx xxxx xxxx |
611 | * Load single data items |
612 | * 1111 100x xxx1 xxxx xxxx xxxx xxxx xxxx |
613 | */ |
614 | DECODE_TABLE (0xfe000000, 0xf8000000, t32_table_1111_100x), |
615 | |
616 | /* |
617 | * Data-processing (register) |
618 | * 1111 1010 xxxx xxxx 1111 xxxx xxxx xxxx |
619 | */ |
620 | DECODE_TABLE (0xff00f000, 0xfa00f000, t32_table_1111_1010___1111), |
621 | |
622 | /* |
623 | * Multiply, multiply accumulate, and absolute difference |
624 | * 1111 1011 0xxx xxxx xxxx xxxx xxxx xxxx |
625 | */ |
626 | DECODE_TABLE (0xff800000, 0xfb000000, t32_table_1111_1011_0), |
627 | |
628 | /* |
629 | * Long multiply, long multiply accumulate, and divide |
630 | * 1111 1011 1xxx xxxx xxxx xxxx xxxx xxxx |
631 | */ |
632 | DECODE_TABLE (0xff800000, 0xfb800000, t32_table_1111_1011_1), |
633 | |
634 | /* |
635 | * Coprocessor instructions |
636 | * 1111 11xx xxxx xxxx xxxx xxxx xxxx xxxx |
637 | */ |
638 | DECODE_END |
639 | }; |
640 | #ifdef CONFIG_ARM_KPROBES_TEST_MODULE |
641 | EXPORT_SYMBOL_GPL(probes_decode_thumb32_table); |
642 | #endif |
643 | |
644 | static const union decode_item t16_table_1011[] = { |
645 | /* Miscellaneous 16-bit instructions */ |
646 | |
647 | /* ADD (SP plus immediate) 1011 0000 0xxx xxxx */ |
648 | /* SUB (SP minus immediate) 1011 0000 1xxx xxxx */ |
649 | DECODE_SIMULATE (0xff00, 0xb000, PROBES_T16_ADD_SP), |
650 | |
651 | /* CBZ 1011 00x1 xxxx xxxx */ |
652 | /* CBNZ 1011 10x1 xxxx xxxx */ |
653 | DECODE_SIMULATE (0xf500, 0xb100, PROBES_T16_CBZ), |
654 | |
655 | /* SXTH 1011 0010 00xx xxxx */ |
656 | /* SXTB 1011 0010 01xx xxxx */ |
657 | /* UXTH 1011 0010 10xx xxxx */ |
658 | /* UXTB 1011 0010 11xx xxxx */ |
659 | /* REV 1011 1010 00xx xxxx */ |
660 | /* REV16 1011 1010 01xx xxxx */ |
661 | /* ??? 1011 1010 10xx xxxx */ |
662 | /* REVSH 1011 1010 11xx xxxx */ |
663 | DECODE_REJECT (0xffc0, 0xba80), |
664 | DECODE_EMULATE (0xf500, 0xb000, PROBES_T16_SIGN_EXTEND), |
665 | |
666 | /* PUSH 1011 010x xxxx xxxx */ |
667 | DECODE_CUSTOM (0xfe00, 0xb400, PROBES_T16_PUSH), |
668 | /* POP 1011 110x xxxx xxxx */ |
669 | DECODE_CUSTOM (0xfe00, 0xbc00, PROBES_T16_POP), |
670 | |
671 | /* |
672 | * If-Then, and hints |
673 | * 1011 1111 xxxx xxxx |
674 | */ |
675 | |
676 | /* YIELD 1011 1111 0001 0000 */ |
677 | DECODE_OR (0xffff, 0xbf10), |
678 | /* SEV 1011 1111 0100 0000 */ |
679 | DECODE_EMULATE (0xffff, 0xbf40, PROBES_T16_SEV), |
680 | /* NOP 1011 1111 0000 0000 */ |
681 | /* WFE 1011 1111 0010 0000 */ |
682 | /* WFI 1011 1111 0011 0000 */ |
683 | DECODE_SIMULATE (0xffcf, 0xbf00, PROBES_T16_WFE), |
684 | /* Unassigned hints 1011 1111 xxxx 0000 */ |
685 | DECODE_REJECT (0xff0f, 0xbf00), |
686 | /* IT 1011 1111 xxxx xxxx */ |
687 | DECODE_CUSTOM (0xff00, 0xbf00, PROBES_T16_IT), |
688 | |
689 | /* SETEND 1011 0110 010x xxxx */ |
690 | /* CPS 1011 0110 011x xxxx */ |
691 | /* BKPT 1011 1110 xxxx xxxx */ |
692 | /* And unallocated instructions... */ |
693 | DECODE_END |
694 | }; |
695 | |
696 | const union decode_item probes_decode_thumb16_table[] = { |
697 | |
698 | /* |
699 | * Shift (immediate), add, subtract, move, and compare |
700 | * 00xx xxxx xxxx xxxx |
701 | */ |
702 | |
703 | /* CMP (immediate) 0010 1xxx xxxx xxxx */ |
704 | DECODE_EMULATE (0xf800, 0x2800, PROBES_T16_CMP), |
705 | |
706 | /* ADD (register) 0001 100x xxxx xxxx */ |
707 | /* SUB (register) 0001 101x xxxx xxxx */ |
708 | /* LSL (immediate) 0000 0xxx xxxx xxxx */ |
709 | /* LSR (immediate) 0000 1xxx xxxx xxxx */ |
710 | /* ASR (immediate) 0001 0xxx xxxx xxxx */ |
711 | /* ADD (immediate, Thumb) 0001 110x xxxx xxxx */ |
712 | /* SUB (immediate, Thumb) 0001 111x xxxx xxxx */ |
713 | /* MOV (immediate) 0010 0xxx xxxx xxxx */ |
714 | /* ADD (immediate, Thumb) 0011 0xxx xxxx xxxx */ |
715 | /* SUB (immediate, Thumb) 0011 1xxx xxxx xxxx */ |
716 | DECODE_EMULATE (0xc000, 0x0000, PROBES_T16_ADDSUB), |
717 | |
718 | /* |
719 | * 16-bit Thumb data-processing instructions |
720 | * 0100 00xx xxxx xxxx |
721 | */ |
722 | |
723 | /* TST (register) 0100 0010 00xx xxxx */ |
724 | DECODE_EMULATE (0xffc0, 0x4200, PROBES_T16_CMP), |
725 | /* CMP (register) 0100 0010 10xx xxxx */ |
726 | /* CMN (register) 0100 0010 11xx xxxx */ |
727 | DECODE_EMULATE (0xff80, 0x4280, PROBES_T16_CMP), |
728 | /* AND (register) 0100 0000 00xx xxxx */ |
729 | /* EOR (register) 0100 0000 01xx xxxx */ |
730 | /* LSL (register) 0100 0000 10xx xxxx */ |
731 | /* LSR (register) 0100 0000 11xx xxxx */ |
732 | /* ASR (register) 0100 0001 00xx xxxx */ |
733 | /* ADC (register) 0100 0001 01xx xxxx */ |
734 | /* SBC (register) 0100 0001 10xx xxxx */ |
735 | /* ROR (register) 0100 0001 11xx xxxx */ |
736 | /* RSB (immediate) 0100 0010 01xx xxxx */ |
737 | /* ORR (register) 0100 0011 00xx xxxx */ |
738 | /* MUL 0100 0011 00xx xxxx */ |
739 | /* BIC (register) 0100 0011 10xx xxxx */ |
740 | /* MVN (register) 0100 0011 10xx xxxx */ |
741 | DECODE_EMULATE (0xfc00, 0x4000, PROBES_T16_LOGICAL), |
742 | |
743 | /* |
744 | * Special data instructions and branch and exchange |
745 | * 0100 01xx xxxx xxxx |
746 | */ |
747 | |
748 | /* BLX pc 0100 0111 1111 1xxx */ |
749 | DECODE_REJECT (0xfff8, 0x47f8), |
750 | |
751 | /* BX (register) 0100 0111 0xxx xxxx */ |
752 | /* BLX (register) 0100 0111 1xxx xxxx */ |
753 | DECODE_SIMULATE (0xff00, 0x4700, PROBES_T16_BLX), |
754 | |
755 | /* ADD pc, pc 0100 0100 1111 1111 */ |
756 | DECODE_REJECT (0xffff, 0x44ff), |
757 | |
758 | /* ADD (register) 0100 0100 xxxx xxxx */ |
759 | /* CMP (register) 0100 0101 xxxx xxxx */ |
760 | /* MOV (register) 0100 0110 xxxx xxxx */ |
761 | DECODE_CUSTOM (0xfc00, 0x4400, PROBES_T16_HIREGOPS), |
762 | |
763 | /* |
764 | * Load from Literal Pool |
765 | * LDR (literal) 0100 1xxx xxxx xxxx |
766 | */ |
767 | DECODE_SIMULATE (0xf800, 0x4800, PROBES_T16_LDR_LIT), |
768 | |
769 | /* |
770 | * 16-bit Thumb Load/store instructions |
771 | * 0101 xxxx xxxx xxxx |
772 | * 011x xxxx xxxx xxxx |
773 | * 100x xxxx xxxx xxxx |
774 | */ |
775 | |
776 | /* STR (register) 0101 000x xxxx xxxx */ |
777 | /* STRH (register) 0101 001x xxxx xxxx */ |
778 | /* STRB (register) 0101 010x xxxx xxxx */ |
779 | /* LDRSB (register) 0101 011x xxxx xxxx */ |
780 | /* LDR (register) 0101 100x xxxx xxxx */ |
781 | /* LDRH (register) 0101 101x xxxx xxxx */ |
782 | /* LDRB (register) 0101 110x xxxx xxxx */ |
783 | /* LDRSH (register) 0101 111x xxxx xxxx */ |
784 | /* STR (immediate, Thumb) 0110 0xxx xxxx xxxx */ |
785 | /* LDR (immediate, Thumb) 0110 1xxx xxxx xxxx */ |
786 | /* STRB (immediate, Thumb) 0111 0xxx xxxx xxxx */ |
787 | /* LDRB (immediate, Thumb) 0111 1xxx xxxx xxxx */ |
788 | DECODE_EMULATE (0xc000, 0x4000, PROBES_T16_LDRHSTRH), |
789 | /* STRH (immediate, Thumb) 1000 0xxx xxxx xxxx */ |
790 | /* LDRH (immediate, Thumb) 1000 1xxx xxxx xxxx */ |
791 | DECODE_EMULATE (0xf000, 0x8000, PROBES_T16_LDRHSTRH), |
792 | /* STR (immediate, Thumb) 1001 0xxx xxxx xxxx */ |
793 | /* LDR (immediate, Thumb) 1001 1xxx xxxx xxxx */ |
794 | DECODE_SIMULATE (0xf000, 0x9000, PROBES_T16_LDRSTR), |
795 | |
796 | /* |
797 | * Generate PC-/SP-relative address |
798 | * ADR (literal) 1010 0xxx xxxx xxxx |
799 | * ADD (SP plus immediate) 1010 1xxx xxxx xxxx |
800 | */ |
801 | DECODE_SIMULATE (0xf000, 0xa000, PROBES_T16_ADR), |
802 | |
803 | /* |
804 | * Miscellaneous 16-bit instructions |
805 | * 1011 xxxx xxxx xxxx |
806 | */ |
807 | DECODE_TABLE (0xf000, 0xb000, t16_table_1011), |
808 | |
809 | /* STM 1100 0xxx xxxx xxxx */ |
810 | /* LDM 1100 1xxx xxxx xxxx */ |
811 | DECODE_EMULATE (0xf000, 0xc000, PROBES_T16_LDMSTM), |
812 | |
813 | /* |
814 | * Conditional branch, and Supervisor Call |
815 | */ |
816 | |
817 | /* Permanently UNDEFINED 1101 1110 xxxx xxxx */ |
818 | /* SVC 1101 1111 xxxx xxxx */ |
819 | DECODE_REJECT (0xfe00, 0xde00), |
820 | |
821 | /* Conditional branch 1101 xxxx xxxx xxxx */ |
822 | DECODE_CUSTOM (0xf000, 0xd000, PROBES_T16_BRANCH_COND), |
823 | |
824 | /* |
825 | * Unconditional branch |
826 | * B 1110 0xxx xxxx xxxx |
827 | */ |
828 | DECODE_SIMULATE (0xf800, 0xe000, PROBES_T16_BRANCH), |
829 | |
830 | DECODE_END |
831 | }; |
832 | #ifdef CONFIG_ARM_KPROBES_TEST_MODULE |
833 | EXPORT_SYMBOL_GPL(probes_decode_thumb16_table); |
834 | #endif |
835 | |
836 | static unsigned long __kprobes thumb_check_cc(unsigned long cpsr) |
837 | { |
838 | if (unlikely(in_it_block(cpsr))) |
839 | return probes_condition_checks[current_cond(cpsr)](cpsr); |
840 | return true; |
841 | } |
842 | |
843 | static void __kprobes thumb16_singlestep(probes_opcode_t opcode, |
844 | struct arch_probes_insn *asi, |
845 | struct pt_regs *regs) |
846 | { |
847 | regs->ARM_pc += 2; |
848 | asi->insn_handler(opcode, asi, regs); |
849 | regs->ARM_cpsr = it_advance(regs->ARM_cpsr); |
850 | } |
851 | |
852 | static void __kprobes thumb32_singlestep(probes_opcode_t opcode, |
853 | struct arch_probes_insn *asi, |
854 | struct pt_regs *regs) |
855 | { |
856 | regs->ARM_pc += 4; |
857 | asi->insn_handler(opcode, asi, regs); |
858 | regs->ARM_cpsr = it_advance(regs->ARM_cpsr); |
859 | } |
860 | |
861 | enum probes_insn __kprobes |
862 | thumb16_probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi, |
863 | bool emulate, const union decode_action *actions, |
864 | const struct decode_checker *checkers[]) |
865 | { |
866 | asi->insn_singlestep = thumb16_singlestep; |
867 | asi->insn_check_cc = thumb_check_cc; |
868 | return probes_decode_insn(insn, asi, probes_decode_thumb16_table, true, |
869 | emulate, actions, checkers); |
870 | } |
871 | |
872 | enum probes_insn __kprobes |
873 | thumb32_probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi, |
874 | bool emulate, const union decode_action *actions, |
875 | const struct decode_checker *checkers[]) |
876 | { |
877 | asi->insn_singlestep = thumb32_singlestep; |
878 | asi->insn_check_cc = thumb_check_cc; |
879 | return probes_decode_insn(insn, asi, probes_decode_thumb32_table, true, |
880 | emulate, actions, checkers); |
881 | } |
882 | |