1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public |
3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. |
5 | * |
6 | * Copyright (C) 1995, 1996, 1997, 2000, 2001, 05 by Ralf Baechle |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
8 | * Copyright (C) 2001 MIPS Technologies, Inc. |
9 | */ |
10 | #include <linux/capability.h> |
11 | #include <linux/errno.h> |
12 | #include <linux/linkage.h> |
13 | #include <linux/fs.h> |
14 | #include <linux/smp.h> |
15 | #include <linux/ptrace.h> |
16 | #include <linux/string.h> |
17 | #include <linux/syscalls.h> |
18 | #include <linux/file.h> |
19 | #include <linux/utsname.h> |
20 | #include <linux/unistd.h> |
21 | #include <linux/sem.h> |
22 | #include <linux/msg.h> |
23 | #include <linux/shm.h> |
24 | #include <linux/compiler.h> |
25 | #include <linux/ipc.h> |
26 | #include <linux/uaccess.h> |
27 | #include <linux/slab.h> |
28 | #include <linux/elf.h> |
29 | #include <linux/sched/task_stack.h> |
30 | |
31 | #include <asm/asm.h> |
32 | #include <asm/asm-eva.h> |
33 | #include <asm/branch.h> |
34 | #include <asm/cachectl.h> |
35 | #include <asm/cacheflush.h> |
36 | #include <asm/asm-offsets.h> |
37 | #include <asm/signal.h> |
38 | #include <asm/sim.h> |
39 | #include <asm/shmparam.h> |
40 | #include <asm/sync.h> |
41 | #include <asm/sysmips.h> |
42 | #include <asm/syscalls.h> |
43 | #include <asm/switch_to.h> |
44 | |
45 | /* |
46 | * For historic reasons the pipe(2) syscall on MIPS has an unusual calling |
47 | * convention. It returns results in registers $v0 / $v1 which means there |
48 | * is no need for it to do verify the validity of a userspace pointer |
49 | * argument. Historically that used to be expensive in Linux. These days |
50 | * the performance advantage is negligible. |
51 | */ |
52 | asmlinkage int sysm_pipe(void) |
53 | { |
54 | int fd[2]; |
55 | int error = do_pipe_flags(fd, 0); |
56 | if (error) |
57 | return error; |
58 | current_pt_regs()->regs[3] = fd[1]; |
59 | return fd[0]; |
60 | } |
61 | |
62 | SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len, |
63 | unsigned long, prot, unsigned long, flags, unsigned long, |
64 | fd, off_t, offset) |
65 | { |
66 | if (offset & ~PAGE_MASK) |
67 | return -EINVAL; |
68 | return ksys_mmap_pgoff(addr, len, prot, flags, fd, |
69 | pgoff: offset >> PAGE_SHIFT); |
70 | } |
71 | |
72 | SYSCALL_DEFINE6(mips_mmap2, unsigned long, addr, unsigned long, len, |
73 | unsigned long, prot, unsigned long, flags, unsigned long, fd, |
74 | unsigned long, pgoff) |
75 | { |
76 | if (pgoff & (~PAGE_MASK >> 12)) |
77 | return -EINVAL; |
78 | |
79 | return ksys_mmap_pgoff(addr, len, prot, flags, fd, |
80 | pgoff: pgoff >> (PAGE_SHIFT - 12)); |
81 | } |
82 | |
83 | save_static_function(sys_fork); |
84 | save_static_function(sys_clone); |
85 | save_static_function(sys_clone3); |
86 | |
87 | SYSCALL_DEFINE1(set_thread_area, unsigned long, addr) |
88 | { |
89 | struct thread_info *ti = task_thread_info(current); |
90 | |
91 | ti->tp_value = addr; |
92 | if (cpu_has_userlocal) |
93 | write_c0_userlocal(addr); |
94 | |
95 | return 0; |
96 | } |
97 | |
98 | static inline int mips_atomic_set(unsigned long addr, unsigned long new) |
99 | { |
100 | unsigned long old, tmp; |
101 | struct pt_regs *regs; |
102 | unsigned int err; |
103 | |
104 | if (unlikely(addr & 3)) |
105 | return -EINVAL; |
106 | |
107 | if (unlikely(!access_ok((const void __user *)addr, 4))) |
108 | return -EINVAL; |
109 | |
110 | if (cpu_has_llsc && IS_ENABLED(CONFIG_WAR_R10000_LLSC)) { |
111 | __asm__ __volatile__ ( |
112 | " .set push \n" |
113 | " .set arch=r4000 \n" |
114 | " li %[err], 0 \n" |
115 | "1: ll %[old], (%[addr]) \n" |
116 | " move %[tmp], %[new] \n" |
117 | "2: sc %[tmp], (%[addr]) \n" |
118 | " beqzl %[tmp], 1b \n" |
119 | "3: \n" |
120 | " .insn \n" |
121 | " .section .fixup,\"ax\" \n" |
122 | "4: li %[err], %[efault] \n" |
123 | " j 3b \n" |
124 | " .previous \n" |
125 | " .section __ex_table,\"a\" \n" |
126 | " " STR(PTR_WD)" 1b, 4b \n" |
127 | " " STR(PTR_WD)" 2b, 4b \n" |
128 | " .previous \n" |
129 | " .set pop \n" |
130 | : [old] "=&r" (old), |
131 | [err] "=&r" (err), |
132 | [tmp] "=&r" (tmp) |
133 | : [addr] "r" (addr), |
134 | [new] "r" (new), |
135 | [efault] "i" (-EFAULT) |
136 | : "memory" ); |
137 | } else if (cpu_has_llsc) { |
138 | __asm__ __volatile__ ( |
139 | " .set push \n" |
140 | " .set " MIPS_ISA_ARCH_LEVEL" \n" |
141 | " li %[err], 0 \n" |
142 | "1: \n" |
143 | " " __SYNC(full, loongson3_war) " \n" |
144 | user_ll("%[old]" , "(%[addr])" ) |
145 | " move %[tmp], %[new] \n" |
146 | "2: \n" |
147 | user_sc("%[tmp]" , "(%[addr])" ) |
148 | " beqz %[tmp], 1b \n" |
149 | "3: \n" |
150 | " .insn \n" |
151 | " .section .fixup,\"ax\" \n" |
152 | "5: li %[err], %[efault] \n" |
153 | " j 3b \n" |
154 | " .previous \n" |
155 | " .section __ex_table,\"a\" \n" |
156 | " " STR(PTR_WD)" 1b, 5b \n" |
157 | " " STR(PTR_WD)" 2b, 5b \n" |
158 | " .previous \n" |
159 | " .set pop \n" |
160 | : [old] "=&r" (old), |
161 | [err] "=&r" (err), |
162 | [tmp] "=&r" (tmp) |
163 | : [addr] "r" (addr), |
164 | [new] "r" (new), |
165 | [efault] "i" (-EFAULT) |
166 | : "memory" ); |
167 | } else { |
168 | do { |
169 | preempt_disable(); |
170 | ll_bit = 1; |
171 | ll_task = current; |
172 | preempt_enable(); |
173 | |
174 | err = __get_user(old, (unsigned int *) addr); |
175 | err |= __put_user(new, (unsigned int *) addr); |
176 | if (err) |
177 | break; |
178 | rmb(); |
179 | } while (!ll_bit); |
180 | } |
181 | |
182 | if (unlikely(err)) |
183 | return err; |
184 | |
185 | regs = current_pt_regs(); |
186 | regs->regs[2] = old; |
187 | regs->regs[7] = 0; /* No error */ |
188 | |
189 | /* |
190 | * Don't let your children do this ... |
191 | */ |
192 | __asm__ __volatile__( |
193 | " move $29, %0 \n" |
194 | " j syscall_exit \n" |
195 | : /* no outputs */ |
196 | : "r" (regs)); |
197 | |
198 | /* unreached. Honestly. */ |
199 | unreachable(); |
200 | } |
201 | |
202 | /* |
203 | * mips_atomic_set() normally returns directly via syscall_exit potentially |
204 | * clobbering static registers, so be sure to preserve them. |
205 | */ |
206 | save_static_function(sys_sysmips); |
207 | |
208 | SYSCALL_DEFINE3(sysmips, long, cmd, long, arg1, long, arg2) |
209 | { |
210 | switch (cmd) { |
211 | case MIPS_ATOMIC_SET: |
212 | return mips_atomic_set(addr: arg1, new: arg2); |
213 | |
214 | case MIPS_FIXADE: |
215 | if (arg1 & ~3) |
216 | return -EINVAL; |
217 | |
218 | if (arg1 & 1) |
219 | set_thread_flag(TIF_FIXADE); |
220 | else |
221 | clear_thread_flag(TIF_FIXADE); |
222 | if (arg1 & 2) |
223 | set_thread_flag(TIF_LOGADE); |
224 | else |
225 | clear_thread_flag(TIF_LOGADE); |
226 | |
227 | return 0; |
228 | |
229 | case FLUSH_CACHE: |
230 | __flush_cache_all(); |
231 | return 0; |
232 | } |
233 | |
234 | return -EINVAL; |
235 | } |
236 | |
237 | /* |
238 | * No implemented yet ... |
239 | */ |
240 | SYSCALL_DEFINE3(cachectl, char *, addr, int, nbytes, int, op) |
241 | { |
242 | return -ENOSYS; |
243 | } |
244 | |