1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Old U-boot compatibility for Acadia |
4 | * |
5 | * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com> |
6 | * |
7 | * Copyright 2008 IBM Corporation |
8 | */ |
9 | |
10 | #include "ops.h" |
11 | #include "io.h" |
12 | #include "dcr.h" |
13 | #include "stdio.h" |
14 | #include "4xx.h" |
15 | #include "44x.h" |
16 | #include "cuboot.h" |
17 | |
18 | #define TARGET_4xx |
19 | #include "ppcboot.h" |
20 | |
21 | static bd_t bd; |
22 | |
23 | #define CPR_PERD0_SPIDV_MASK 0x000F0000 /* SPI Clock Divider */ |
24 | |
25 | #define PLLC_SRC_MASK 0x20000000 /* PLL feedback source */ |
26 | |
27 | #define PLLD_FBDV_MASK 0x1F000000 /* PLL feedback divider value */ |
28 | #define PLLD_FWDVA_MASK 0x000F0000 /* PLL forward divider A value */ |
29 | #define PLLD_FWDVB_MASK 0x00000700 /* PLL forward divider B value */ |
30 | |
31 | #define PRIMAD_CPUDV_MASK 0x0F000000 /* CPU Clock Divisor Mask */ |
32 | #define PRIMAD_PLBDV_MASK 0x000F0000 /* PLB Clock Divisor Mask */ |
33 | #define PRIMAD_OPBDV_MASK 0x00000F00 /* OPB Clock Divisor Mask */ |
34 | #define PRIMAD_EBCDV_MASK 0x0000000F /* EBC Clock Divisor Mask */ |
35 | |
36 | #define PERD0_PWMDV_MASK 0xFF000000 /* PWM Divider Mask */ |
37 | #define PERD0_SPIDV_MASK 0x000F0000 /* SPI Divider Mask */ |
38 | #define PERD0_U0DV_MASK 0x0000FF00 /* UART 0 Divider Mask */ |
39 | #define PERD0_U1DV_MASK 0x000000FF /* UART 1 Divider Mask */ |
40 | |
41 | static void get_clocks(void) |
42 | { |
43 | unsigned long sysclk, cpr_plld, cpr_pllc, cpr_primad, plloutb, i; |
44 | unsigned long pllFwdDiv, pllFwdDivB, pllFbkDiv, pllPlbDiv, pllExtBusDiv; |
45 | unsigned long pllOpbDiv, freqEBC, freqUART, freqOPB; |
46 | unsigned long div; /* total divisor udiv * bdiv */ |
47 | unsigned long umin; /* minimum udiv */ |
48 | unsigned short diff; /* smallest diff */ |
49 | unsigned long udiv; /* best udiv */ |
50 | unsigned short idiff; /* current diff */ |
51 | unsigned short ibdiv; /* current bdiv */ |
52 | unsigned long est; /* current estimate */ |
53 | unsigned long baud; |
54 | void *np; |
55 | |
56 | /* read the sysclk value from the CPLD */ |
57 | sysclk = (in_8(addr: (unsigned char *)0x80000000) == 0xc) ? 66666666 : 33333000; |
58 | |
59 | /* |
60 | * Read PLL Mode registers |
61 | */ |
62 | cpr_plld = CPR0_READ(DCRN_CPR0_PLLD); |
63 | cpr_pllc = CPR0_READ(DCRN_CPR0_PLLC); |
64 | |
65 | /* |
66 | * Determine forward divider A |
67 | */ |
68 | pllFwdDiv = ((cpr_plld & PLLD_FWDVA_MASK) >> 16); |
69 | |
70 | /* |
71 | * Determine forward divider B |
72 | */ |
73 | pllFwdDivB = ((cpr_plld & PLLD_FWDVB_MASK) >> 8); |
74 | if (pllFwdDivB == 0) |
75 | pllFwdDivB = 8; |
76 | |
77 | /* |
78 | * Determine FBK_DIV. |
79 | */ |
80 | pllFbkDiv = ((cpr_plld & PLLD_FBDV_MASK) >> 24); |
81 | if (pllFbkDiv == 0) |
82 | pllFbkDiv = 256; |
83 | |
84 | /* |
85 | * Read CPR_PRIMAD register |
86 | */ |
87 | cpr_primad = CPR0_READ(DCRN_CPR0_PRIMAD); |
88 | |
89 | /* |
90 | * Determine PLB_DIV. |
91 | */ |
92 | pllPlbDiv = ((cpr_primad & PRIMAD_PLBDV_MASK) >> 16); |
93 | if (pllPlbDiv == 0) |
94 | pllPlbDiv = 16; |
95 | |
96 | /* |
97 | * Determine EXTBUS_DIV. |
98 | */ |
99 | pllExtBusDiv = (cpr_primad & PRIMAD_EBCDV_MASK); |
100 | if (pllExtBusDiv == 0) |
101 | pllExtBusDiv = 16; |
102 | |
103 | /* |
104 | * Determine OPB_DIV. |
105 | */ |
106 | pllOpbDiv = ((cpr_primad & PRIMAD_OPBDV_MASK) >> 8); |
107 | if (pllOpbDiv == 0) |
108 | pllOpbDiv = 16; |
109 | |
110 | /* There is a bug in U-Boot that prevents us from using |
111 | * bd.bi_opbfreq because U-Boot doesn't populate it for |
112 | * 405EZ. We get to calculate it, yay! |
113 | */ |
114 | freqOPB = (sysclk *pllFbkDiv) /pllOpbDiv; |
115 | |
116 | freqEBC = (sysclk * pllFbkDiv) / pllExtBusDiv; |
117 | |
118 | plloutb = ((sysclk * ((cpr_pllc & PLLC_SRC_MASK) ? |
119 | pllFwdDivB : pllFwdDiv) * |
120 | pllFbkDiv) / pllFwdDivB); |
121 | |
122 | np = find_node_by_alias(alias: "serial0" ); |
123 | if (getprop(devp: np, name: "current-speed" , buf: &baud, buflen: sizeof(baud)) != sizeof(baud)) |
124 | fatal("no current-speed property\n\r" ); |
125 | |
126 | udiv = 256; /* Assume lowest possible serial clk */ |
127 | div = plloutb / (16 * baud); /* total divisor */ |
128 | umin = (plloutb / freqOPB) << 1; /* 2 x OPB divisor */ |
129 | diff = 256; /* highest possible */ |
130 | |
131 | /* i is the test udiv value -- start with the largest |
132 | * possible (256) to minimize serial clock and constrain |
133 | * search to umin. |
134 | */ |
135 | for (i = 256; i > umin; i--) { |
136 | ibdiv = div / i; |
137 | est = i * ibdiv; |
138 | idiff = (est > div) ? (est-div) : (div-est); |
139 | if (idiff == 0) { |
140 | udiv = i; |
141 | break; /* can't do better */ |
142 | } else if (idiff < diff) { |
143 | udiv = i; /* best so far */ |
144 | diff = idiff; /* update lowest diff*/ |
145 | } |
146 | } |
147 | freqUART = plloutb / udiv; |
148 | |
149 | dt_fixup_cpu_clocks(cpufreq: bd.bi_procfreq, tbfreq: bd.bi_intfreq, busfreq: bd.bi_plb_busfreq); |
150 | dt_fixup_clock(path: "/plb/ebc" , freq: freqEBC); |
151 | dt_fixup_clock(path: "/plb/opb" , freq: freqOPB); |
152 | dt_fixup_clock(path: "/plb/opb/serial@ef600300" , freq: freqUART); |
153 | dt_fixup_clock(path: "/plb/opb/serial@ef600400" , freq: freqUART); |
154 | } |
155 | |
156 | static void acadia_fixups(void) |
157 | { |
158 | dt_fixup_memory(start: bd.bi_memstart, size: bd.bi_memsize); |
159 | get_clocks(); |
160 | dt_fixup_mac_address_by_alias(alias: "ethernet0" , addr: bd.bi_enetaddr); |
161 | } |
162 | |
163 | void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, |
164 | unsigned long r6, unsigned long r7) |
165 | { |
166 | CUBOOT_INIT(); |
167 | platform_ops.fixups = acadia_fixups; |
168 | platform_ops.exit = ibm40x_dbcr_reset; |
169 | fdt_init(blob: _dtb_start); |
170 | serial_console_init(); |
171 | } |
172 | |