1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Renesas Technology Corp. SH7786 Urquell Support. |
4 | * |
5 | * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> |
6 | * Copyright (C) 2009, 2010 Paul Mundt |
7 | * |
8 | * Based on board-sh7785lcr.c |
9 | * Copyright (C) 2008 Yoshihiro Shimoda |
10 | */ |
11 | #include <linux/init.h> |
12 | #include <linux/platform_device.h> |
13 | #include <linux/fb.h> |
14 | #include <linux/smc91x.h> |
15 | #include <linux/mtd/physmap.h> |
16 | #include <linux/delay.h> |
17 | #include <linux/gpio.h> |
18 | #include <linux/irq.h> |
19 | #include <linux/clk.h> |
20 | #include <linux/sh_intc.h> |
21 | #include <mach/urquell.h> |
22 | #include <cpu/sh7786.h> |
23 | #include <asm/heartbeat.h> |
24 | #include <linux/sizes.h> |
25 | #include <asm/smp-ops.h> |
26 | |
27 | /* |
28 | * bit 1234 5678 |
29 | *---------------------------- |
30 | * SW1 0101 0010 -> Pck 33MHz version |
31 | * (1101 0010) Pck 66MHz version |
32 | * SW2 0x1x xxxx -> little endian |
33 | * 29bit mode |
34 | * SW47 0001 1000 -> CS0 : on-board flash |
35 | * CS1 : SRAM, registers, LAN, PCMCIA |
36 | * 38400 bps for SCIF1 |
37 | * |
38 | * Address |
39 | * 0x00000000 - 0x04000000 (CS0) Nor Flash |
40 | * 0x04000000 - 0x04200000 (CS1) SRAM |
41 | * 0x05000000 - 0x05800000 (CS1) on board register |
42 | * 0x05800000 - 0x06000000 (CS1) LAN91C111 |
43 | * 0x06000000 - 0x06400000 (CS1) PCMCIA |
44 | * 0x08000000 - 0x10000000 (CS2-CS3) DDR3 |
45 | * 0x10000000 - 0x14000000 (CS4) PCIe |
46 | * 0x14000000 - 0x14800000 (CS5) Core0 LRAM/URAM |
47 | * 0x14800000 - 0x15000000 (CS5) Core1 LRAM/URAM |
48 | * 0x18000000 - 0x1C000000 (CS6) ATA/NAND-Flash |
49 | * 0x1C000000 - (CS7) SH7786 Control register |
50 | */ |
51 | |
52 | /* HeartBeat */ |
53 | static struct resource heartbeat_resource = { |
54 | .start = BOARDREG(SLEDR), |
55 | .end = BOARDREG(SLEDR), |
56 | .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT, |
57 | }; |
58 | |
59 | static struct platform_device heartbeat_device = { |
60 | .name = "heartbeat" , |
61 | .id = -1, |
62 | .num_resources = 1, |
63 | .resource = &heartbeat_resource, |
64 | }; |
65 | |
66 | /* LAN91C111 */ |
67 | static struct smc91x_platdata smc91x_info = { |
68 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, |
69 | }; |
70 | |
71 | static struct resource smc91x_eth_resources[] = { |
72 | [0] = { |
73 | .name = "SMC91C111" , |
74 | .start = 0x05800300, |
75 | .end = 0x0580030f, |
76 | .flags = IORESOURCE_MEM, |
77 | }, |
78 | [1] = { |
79 | .start = evt2irq(0x360), |
80 | .flags = IORESOURCE_IRQ, |
81 | }, |
82 | }; |
83 | |
84 | static struct platform_device smc91x_eth_device = { |
85 | .name = "smc91x" , |
86 | .num_resources = ARRAY_SIZE(smc91x_eth_resources), |
87 | .resource = smc91x_eth_resources, |
88 | .dev = { |
89 | .platform_data = &smc91x_info, |
90 | }, |
91 | }; |
92 | |
93 | /* Nor Flash */ |
94 | static struct mtd_partition nor_flash_partitions[] = { |
95 | { |
96 | .name = "loader" , |
97 | .offset = 0x00000000, |
98 | .size = SZ_512K, |
99 | .mask_flags = MTD_WRITEABLE, /* Read-only */ |
100 | }, |
101 | { |
102 | .name = "bootenv" , |
103 | .offset = MTDPART_OFS_APPEND, |
104 | .size = SZ_512K, |
105 | .mask_flags = MTD_WRITEABLE, /* Read-only */ |
106 | }, |
107 | { |
108 | .name = "kernel" , |
109 | .offset = MTDPART_OFS_APPEND, |
110 | .size = SZ_4M, |
111 | }, |
112 | { |
113 | .name = "data" , |
114 | .offset = MTDPART_OFS_APPEND, |
115 | .size = MTDPART_SIZ_FULL, |
116 | }, |
117 | }; |
118 | |
119 | static struct physmap_flash_data nor_flash_data = { |
120 | .width = 2, |
121 | .parts = nor_flash_partitions, |
122 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), |
123 | }; |
124 | |
125 | static struct resource nor_flash_resources[] = { |
126 | [0] = { |
127 | .start = NOR_FLASH_ADDR, |
128 | .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1, |
129 | .flags = IORESOURCE_MEM, |
130 | } |
131 | }; |
132 | |
133 | static struct platform_device nor_flash_device = { |
134 | .name = "physmap-flash" , |
135 | .dev = { |
136 | .platform_data = &nor_flash_data, |
137 | }, |
138 | .num_resources = ARRAY_SIZE(nor_flash_resources), |
139 | .resource = nor_flash_resources, |
140 | }; |
141 | |
142 | static struct platform_device *urquell_devices[] __initdata = { |
143 | &heartbeat_device, |
144 | &smc91x_eth_device, |
145 | &nor_flash_device, |
146 | }; |
147 | |
148 | static int __init urquell_devices_setup(void) |
149 | { |
150 | /* USB */ |
151 | gpio_request(gpio: GPIO_FN_USB_OVC0, NULL); |
152 | gpio_request(gpio: GPIO_FN_USB_PENC0, NULL); |
153 | |
154 | /* enable LAN */ |
155 | __raw_writew(__raw_readw(addr: UBOARDREG(IRL2MSKR)) & ~0x00000001, |
156 | addr: UBOARDREG(IRL2MSKR)); |
157 | |
158 | return platform_add_devices(urquell_devices, |
159 | ARRAY_SIZE(urquell_devices)); |
160 | } |
161 | device_initcall(urquell_devices_setup); |
162 | |
163 | static void urquell_power_off(void) |
164 | { |
165 | __raw_writew(val: 0xa5a5, addr: UBOARDREG(SRSTR)); |
166 | } |
167 | |
168 | static void __init urquell_init_irq(void) |
169 | { |
170 | plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK); |
171 | } |
172 | |
173 | static int urquell_mode_pins(void) |
174 | { |
175 | return __raw_readw(addr: UBOARDREG(MDSWMR)); |
176 | } |
177 | |
178 | static int urquell_clk_init(void) |
179 | { |
180 | struct clk *clk; |
181 | int ret; |
182 | |
183 | /* |
184 | * Only handle the EXTAL case, anyone interfacing a crystal |
185 | * resonator will need to provide their own input clock. |
186 | */ |
187 | if (test_mode_pin(MODE_PIN9)) |
188 | return -EINVAL; |
189 | |
190 | clk = clk_get(NULL, id: "extal" ); |
191 | if (IS_ERR(ptr: clk)) |
192 | return PTR_ERR(ptr: clk); |
193 | ret = clk_set_rate(clk, rate: 33333333); |
194 | clk_put(clk); |
195 | |
196 | return ret; |
197 | } |
198 | |
199 | /* Initialize the board */ |
200 | static void __init urquell_setup(char **cmdline_p) |
201 | { |
202 | printk(KERN_INFO "Renesas Technology Corp. Urquell support.\n" ); |
203 | |
204 | pm_power_off = urquell_power_off; |
205 | |
206 | register_smp_ops(&shx3_smp_ops); |
207 | } |
208 | |
209 | /* |
210 | * The Machine Vector |
211 | */ |
212 | static struct sh_machine_vector mv_urquell __initmv = { |
213 | .mv_name = "Urquell" , |
214 | .mv_setup = urquell_setup, |
215 | .mv_init_irq = urquell_init_irq, |
216 | .mv_mode_pins = urquell_mode_pins, |
217 | .mv_clk_init = urquell_clk_init, |
218 | }; |
219 | |