| 1 | // SPDX-License-Identifier: GPL-2.0 |
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| 2 | /* |
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| 3 | * SDK7786 FPGA IRQ Controller Support. |
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| 4 | * |
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| 5 | * Copyright (C) 2010 Matt Fleming |
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| 6 | * Copyright (C) 2010 Paul Mundt |
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| 7 | */ |
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| 8 | #include <linux/irq.h> |
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| 9 | #include <mach/fpga.h> |
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| 10 | #include <mach/irq.h> |
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| 11 | |
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| 12 | enum { |
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| 13 | ATA_IRQ_BIT = 1, |
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| 14 | SPI_BUSY_BIT = 2, |
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| 15 | LIRQ5_BIT = 3, |
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| 16 | LIRQ6_BIT = 4, |
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| 17 | LIRQ7_BIT = 5, |
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| 18 | LIRQ8_BIT = 6, |
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| 19 | KEY_IRQ_BIT = 7, |
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| 20 | PEN_IRQ_BIT = 8, |
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| 21 | ETH_IRQ_BIT = 9, |
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| 22 | RTC_ALARM_BIT = 10, |
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| 23 | CRYSTAL_FAIL_BIT = 12, |
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| 24 | ETH_PME_BIT = 14, |
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| 25 | }; |
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| 26 | |
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| 27 | void __init sdk7786_init_irq(void) |
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| 28 | { |
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| 29 | unsigned int tmp; |
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| 30 | |
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| 31 | /* Enable priority encoding for all IRLs */ |
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| 32 | fpga_write_reg(fpga_read_reg(INTMSR) | 0x0303, INTMSR); |
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| 33 | |
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| 34 | /* Clear FPGA interrupt status registers */ |
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| 35 | fpga_write_reg(0x0000, INTASR); |
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| 36 | fpga_write_reg(0x0000, INTBSR); |
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| 37 | |
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| 38 | /* Unmask FPGA interrupts */ |
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| 39 | tmp = fpga_read_reg(INTAMR); |
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| 40 | tmp &= ~(1 << ETH_IRQ_BIT); |
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| 41 | fpga_write_reg(tmp, INTAMR); |
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| 42 | |
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| 43 | plat_irq_setup_pins(IRQ_MODE_IRL7654_MASK); |
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| 44 | plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK); |
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| 45 | } |
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| 46 | |
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