1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * linux/arch/sh/boards/se/7780/irq.c |
4 | * |
5 | * Copyright (C) 2006,2007 Nobuhiro Iwamatsu |
6 | * |
7 | * Hitachi UL SolutionEngine 7780 Support. |
8 | */ |
9 | #include <linux/init.h> |
10 | #include <linux/irq.h> |
11 | #include <linux/interrupt.h> |
12 | #include <linux/io.h> |
13 | #include <mach-se/mach/se7780.h> |
14 | |
15 | #define INTC_BASE 0xffd00000 |
16 | #define INTC_ICR1 (INTC_BASE+0x1c) |
17 | |
18 | /* |
19 | * Initialize IRQ setting |
20 | */ |
21 | void __init init_se7780_IRQ(void) |
22 | { |
23 | /* enable all interrupt at FPGA */ |
24 | __raw_writew(0, FPGA_INTMSK1); |
25 | /* mask SM501 interrupt */ |
26 | __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); |
27 | /* enable all interrupt at FPGA */ |
28 | __raw_writew(0, FPGA_INTMSK2); |
29 | |
30 | /* set FPGA INTSEL register */ |
31 | /* FPGA + 0x06 */ |
32 | __raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) | |
33 | (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1); |
34 | |
35 | /* FPGA + 0x08 */ |
36 | __raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) | |
37 | (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) | |
38 | (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) | |
39 | (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2); |
40 | |
41 | /* FPGA + 0x0A */ |
42 | __raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); |
43 | |
44 | plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */ |
45 | |
46 | /* ICR1: detect low level(for 2ndcut) */ |
47 | __raw_writel(val: 0xAAAA0000, INTC_ICR1); |
48 | |
49 | /* |
50 | * FPGA PCISEL register initialize |
51 | * |
52 | * CPU || SLOT1 | SLOT2 | S-ATA | USB |
53 | * ------------------------------------- |
54 | * INTA || INTA | INTD | -- | INTB |
55 | * ------------------------------------- |
56 | * INTB || INTB | INTA | -- | INTC |
57 | * ------------------------------------- |
58 | * INTC || INTC | INTB | INTA | -- |
59 | * ------------------------------------- |
60 | * INTD || INTD | INTC | -- | INTA |
61 | * ------------------------------------- |
62 | */ |
63 | __raw_writew(0x0013, FPGA_PCI_INTSEL1); |
64 | __raw_writew(0xE402, FPGA_PCI_INTSEL2); |
65 | } |
66 | |