| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /*---------------------------------------------------------------------------+ |
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| 3 | | status_w.h | |
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| 4 | | | |
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| 5 | | Copyright (C) 1992,1993 | |
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| 6 | | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, | |
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| 7 | | Australia. E-mail billm@vaxc.cc.monash.edu.au | |
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| 8 | | | |
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| 9 | +---------------------------------------------------------------------------*/ |
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| 10 | |
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| 11 | #ifndef _STATUS_H_ |
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| 12 | #define _STATUS_H_ |
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| 13 | |
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| 14 | #include "fpu_emu.h" /* for definition of PECULIAR_486 */ |
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| 15 | |
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| 16 | #ifdef __ASSEMBLY__ |
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| 17 | #define Const__(x) $##x |
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| 18 | #else |
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| 19 | #define Const__(x) x |
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| 20 | #endif |
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| 21 | |
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| 22 | #define SW_Backward Const__(0x8000) /* backward compatibility */ |
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| 23 | #define SW_C3 Const__(0x4000) /* condition bit 3 */ |
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| 24 | #define SW_Top Const__(0x3800) /* top of stack */ |
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| 25 | #define SW_Top_Shift Const__(11) /* shift for top of stack bits */ |
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| 26 | #define SW_C2 Const__(0x0400) /* condition bit 2 */ |
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| 27 | #define SW_C1 Const__(0x0200) /* condition bit 1 */ |
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| 28 | #define SW_C0 Const__(0x0100) /* condition bit 0 */ |
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| 29 | #define SW_Summary Const__(0x0080) /* exception summary */ |
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| 30 | #define SW_Stack_Fault Const__(0x0040) /* stack fault */ |
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| 31 | #define SW_Precision Const__(0x0020) /* loss of precision */ |
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| 32 | #define SW_Underflow Const__(0x0010) /* underflow */ |
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| 33 | #define SW_Overflow Const__(0x0008) /* overflow */ |
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| 34 | #define SW_Zero_Div Const__(0x0004) /* divide by zero */ |
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| 35 | #define SW_Denorm_Op Const__(0x0002) /* denormalized operand */ |
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| 36 | #define SW_Invalid Const__(0x0001) /* invalid operation */ |
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| 37 | |
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| 38 | #define SW_Exc_Mask Const__(0x27f) /* Status word exception bit mask */ |
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| 39 | |
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| 40 | #ifndef __ASSEMBLY__ |
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| 41 | |
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| 42 | #define COMP_A_gt_B 1 |
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| 43 | #define COMP_A_eq_B 2 |
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| 44 | #define COMP_A_lt_B 3 |
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| 45 | #define COMP_No_Comp 4 |
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| 46 | #define COMP_Denormal 0x20 |
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| 47 | #define COMP_NaN 0x40 |
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| 48 | #define COMP_SNaN 0x80 |
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| 49 | |
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| 50 | #define status_word() \ |
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| 51 | ((partial_status & ~SW_Top & 0xffff) | ((top << SW_Top_Shift) & SW_Top)) |
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| 52 | static inline void setcc(int cc) |
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| 53 | { |
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| 54 | partial_status &= ~(SW_C0 | SW_C1 | SW_C2 | SW_C3); |
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| 55 | partial_status |= (cc) & (SW_C0 | SW_C1 | SW_C2 | SW_C3); |
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| 56 | } |
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| 57 | |
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| 58 | #ifdef PECULIAR_486 |
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| 59 | /* Default, this conveys no information, but an 80486 does it. */ |
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| 60 | /* Clear the SW_C1 bit, "other bits undefined". */ |
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| 61 | # define clear_C1() { partial_status &= ~SW_C1; } |
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| 62 | # else |
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| 63 | # define clear_C1() |
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| 64 | #endif /* PECULIAR_486 */ |
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| 65 | |
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| 66 | #endif /* __ASSEMBLY__ */ |
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| 67 | |
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| 68 | #endif /* _STATUS_H_ */ |
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| 69 | |
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