1/*
2 * Copyright (c) 2012, Intel Corporation
3 * Copyright (c) 2015, Red Hat, Inc.
4 * Copyright (c) 2015, 2016 Linaro Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#define pr_fmt(fmt) "ACPI: SPCR: " fmt
13
14#include <linux/acpi.h>
15#include <linux/console.h>
16#include <linux/kernel.h>
17#include <linux/serial_core.h>
18
19/*
20 * Erratum 44 for QDF2432v1 and QDF2400v1 SoCs describes the BUSY bit as
21 * occasionally getting stuck as 1. To avoid the potential for a hang, check
22 * TXFE == 0 instead of BUSY == 1. This may not be suitable for all UART
23 * implementations, so only do so if an affected platform is detected in
24 * acpi_parse_spcr().
25 */
26bool qdf2400_e44_present;
27EXPORT_SYMBOL(qdf2400_e44_present);
28
29/*
30 * Some Qualcomm Datacenter Technologies SoCs have a defective UART BUSY bit.
31 * Detect them by examining the OEM fields in the SPCR header, similiar to PCI
32 * quirk detection in pci_mcfg.c.
33 */
34static bool qdf2400_erratum_44_present(struct acpi_table_header *h)
35{
36 if (memcmp(h->oem_id, "QCOM ", ACPI_OEM_ID_SIZE))
37 return false;
38
39 if (!memcmp(h->oem_table_id, "QDF2432 ", ACPI_OEM_TABLE_ID_SIZE))
40 return true;
41
42 if (!memcmp(h->oem_table_id, "QDF2400 ", ACPI_OEM_TABLE_ID_SIZE) &&
43 h->oem_revision == 1)
44 return true;
45
46 return false;
47}
48
49/*
50 * APM X-Gene v1 and v2 UART hardware is an 16550 like device but has its
51 * register aligned to 32-bit. In addition, the BIOS also encoded the
52 * access width to be 8 bits. This function detects this errata condition.
53 */
54static bool xgene_8250_erratum_present(struct acpi_table_spcr *tb)
55{
56 bool xgene_8250 = false;
57
58 if (tb->interface_type != ACPI_DBG2_16550_COMPATIBLE)
59 return false;
60
61 if (memcmp(tb->header.oem_id, "APMC0D", ACPI_OEM_ID_SIZE) &&
62 memcmp(tb->header.oem_id, "HPE ", ACPI_OEM_ID_SIZE))
63 return false;
64
65 if (!memcmp(tb->header.oem_table_id, "XGENESPC",
66 ACPI_OEM_TABLE_ID_SIZE) && tb->header.oem_revision == 0)
67 xgene_8250 = true;
68
69 if (!memcmp(tb->header.oem_table_id, "ProLiant",
70 ACPI_OEM_TABLE_ID_SIZE) && tb->header.oem_revision == 1)
71 xgene_8250 = true;
72
73 return xgene_8250;
74}
75
76/**
77 * acpi_parse_spcr() - parse ACPI SPCR table and add preferred console
78 *
79 * @enable_earlycon: set up earlycon for the console specified by the table
80 * @enable_console: setup the console specified by the table.
81 *
82 * For the architectures with support for ACPI, CONFIG_ACPI_SPCR_TABLE may be
83 * defined to parse ACPI SPCR table. As a result of the parsing preferred
84 * console is registered and if @enable_earlycon is true, earlycon is set up.
85 * If @enable_console is true the system console is also configured.
86 *
87 * When CONFIG_ACPI_SPCR_TABLE is defined, this function should be called
88 * from arch initialization code as soon as the DT/ACPI decision is made.
89 *
90 */
91int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
92{
93 static char opts[64];
94 struct acpi_table_spcr *table;
95 acpi_status status;
96 char *uart;
97 char *iotype;
98 int baud_rate;
99 int err;
100
101 if (acpi_disabled)
102 return -ENODEV;
103
104 status = acpi_get_table(ACPI_SIG_SPCR, 0,
105 (struct acpi_table_header **)&table);
106
107 if (ACPI_FAILURE(status))
108 return -ENOENT;
109
110 if (table->header.revision < 2)
111 pr_info("SPCR table version %d\n", table->header.revision);
112
113 if (table->serial_port.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
114 switch (ACPI_ACCESS_BIT_WIDTH((
115 table->serial_port.access_width))) {
116 default:
117 pr_err("Unexpected SPCR Access Width. Defaulting to byte size\n");
118 /* fall through */
119 case 8:
120 iotype = "mmio";
121 break;
122 case 16:
123 iotype = "mmio16";
124 break;
125 case 32:
126 iotype = "mmio32";
127 break;
128 }
129 } else
130 iotype = "io";
131
132 switch (table->interface_type) {
133 case ACPI_DBG2_ARM_SBSA_32BIT:
134 iotype = "mmio32";
135 /* fall through */
136 case ACPI_DBG2_ARM_PL011:
137 case ACPI_DBG2_ARM_SBSA_GENERIC:
138 case ACPI_DBG2_BCM2835:
139 uart = "pl011";
140 break;
141 case ACPI_DBG2_16550_COMPATIBLE:
142 case ACPI_DBG2_16550_SUBSET:
143 uart = "uart";
144 break;
145 default:
146 err = -ENOENT;
147 goto done;
148 }
149
150 switch (table->baud_rate) {
151 case 0:
152 /*
153 * SPCR 1.04 defines 0 as a preconfigured state of UART.
154 * Assume firmware or bootloader configures console correctly.
155 */
156 baud_rate = 0;
157 break;
158 case 3:
159 baud_rate = 9600;
160 break;
161 case 4:
162 baud_rate = 19200;
163 break;
164 case 6:
165 baud_rate = 57600;
166 break;
167 case 7:
168 baud_rate = 115200;
169 break;
170 default:
171 err = -ENOENT;
172 goto done;
173 }
174
175 /*
176 * If the E44 erratum is required, then we need to tell the pl011
177 * driver to implement the work-around.
178 *
179 * The global variable is used by the probe function when it
180 * creates the UARTs, whether or not they're used as a console.
181 *
182 * If the user specifies "traditional" earlycon, the qdf2400_e44
183 * console name matches the EARLYCON_DECLARE() statement, and
184 * SPCR is not used. Parameter "earlycon" is false.
185 *
186 * If the user specifies "SPCR" earlycon, then we need to update
187 * the console name so that it also says "qdf2400_e44". Parameter
188 * "earlycon" is true.
189 *
190 * For consistency, if we change the console name, then we do it
191 * for everyone, not just earlycon.
192 */
193 if (qdf2400_erratum_44_present(&table->header)) {
194 qdf2400_e44_present = true;
195 if (enable_earlycon)
196 uart = "qdf2400_e44";
197 }
198
199 if (xgene_8250_erratum_present(table)) {
200 iotype = "mmio32";
201
202 /* for xgene v1 and v2 we don't know the clock rate of the
203 * UART so don't attempt to change to the baud rate state
204 * in the table because driver cannot calculate the dividers
205 */
206 baud_rate = 0;
207 }
208
209 if (!baud_rate) {
210 snprintf(opts, sizeof(opts), "%s,%s,0x%llx", uart, iotype,
211 table->serial_port.address);
212 } else {
213 snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
214 table->serial_port.address, baud_rate);
215 }
216
217 pr_info("console: %s\n", opts);
218
219 if (enable_earlycon)
220 setup_earlycon(opts);
221
222 if (enable_console)
223 err = add_preferred_console(uart, 0, opts + strlen(uart) + 1);
224 else
225 err = 0;
226done:
227 acpi_put_table((struct acpi_table_header *)table);
228 return err;
229}
230