1 | /* SPDX-License-Identifier: ISC */ |
2 | /* Copyright (C) 2021 MediaTek Inc. */ |
3 | |
4 | #define FIRMWARE_MT7622 "mediatek/mt7622pr2h.bin" |
5 | #define FIRMWARE_MT7663 "mediatek/mt7663pr2h.bin" |
6 | #define FIRMWARE_MT7668 "mediatek/mt7668pr2h.bin" |
7 | #define FIRMWARE_MT7922 "mediatek/BT_RAM_CODE_MT7922_1_1_hdr.bin" |
8 | #define FIRMWARE_MT7961 "mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin" |
9 | #define FIRMWARE_MT7925 "mediatek/mt7925/BT_RAM_CODE_MT7925_1_1_hdr.bin" |
10 | |
11 | #define HCI_EV_WMT 0xe4 |
12 | #define HCI_WMT_MAX_EVENT_SIZE 64 |
13 | |
14 | #define BTMTK_WMT_REG_WRITE 0x1 |
15 | #define BTMTK_WMT_REG_READ 0x2 |
16 | |
17 | #define MT7921_BTSYS_RST 0x70002610 |
18 | #define MT7921_BTSYS_RST_WITH_GPIO BIT(7) |
19 | |
20 | #define MT7921_PINMUX_0 0x70005050 |
21 | #define MT7921_PINMUX_1 0x70005054 |
22 | |
23 | #define MT7921_DLSTATUS 0x7c053c10 |
24 | #define BT_DL_STATE BIT(1) |
25 | |
26 | #define MTK_COREDUMP_SIZE (1024 * 1000) |
27 | #define MTK_COREDUMP_END "coredump end" |
28 | #define MTK_COREDUMP_END_LEN (sizeof(MTK_COREDUMP_END)) |
29 | #define MTK_COREDUMP_NUM 255 |
30 | |
31 | enum { |
32 | BTMTK_WMT_PATCH_DWNLD = 0x1, |
33 | BTMTK_WMT_TEST = 0x2, |
34 | BTMTK_WMT_WAKEUP = 0x3, |
35 | BTMTK_WMT_HIF = 0x4, |
36 | BTMTK_WMT_FUNC_CTRL = 0x6, |
37 | BTMTK_WMT_RST = 0x7, |
38 | BTMTK_WMT_REGISTER = 0x8, |
39 | BTMTK_WMT_SEMAPHORE = 0x17, |
40 | }; |
41 | |
42 | enum { |
43 | BTMTK_WMT_INVALID, |
44 | BTMTK_WMT_PATCH_UNDONE, |
45 | BTMTK_WMT_PATCH_PROGRESS, |
46 | BTMTK_WMT_PATCH_DONE, |
47 | BTMTK_WMT_ON_UNDONE, |
48 | BTMTK_WMT_ON_DONE, |
49 | BTMTK_WMT_ON_PROGRESS, |
50 | }; |
51 | |
52 | struct btmtk_wmt_hdr { |
53 | u8 dir; |
54 | u8 op; |
55 | __le16 dlen; |
56 | u8 flag; |
57 | } __packed; |
58 | |
59 | struct btmtk_hci_wmt_cmd { |
60 | struct btmtk_wmt_hdr hdr; |
61 | u8 data[]; |
62 | } __packed; |
63 | |
64 | struct btmtk_hci_wmt_evt { |
65 | struct hci_event_hdr hhdr; |
66 | struct btmtk_wmt_hdr whdr; |
67 | } __packed; |
68 | |
69 | struct btmtk_hci_wmt_evt_funcc { |
70 | struct btmtk_hci_wmt_evt hwhdr; |
71 | __be16 status; |
72 | } __packed; |
73 | |
74 | struct btmtk_hci_wmt_evt_reg { |
75 | struct btmtk_hci_wmt_evt hwhdr; |
76 | u8 rsv[2]; |
77 | u8 num; |
78 | __le32 addr; |
79 | __le32 val; |
80 | } __packed; |
81 | |
82 | struct btmtk_tci_sleep { |
83 | u8 mode; |
84 | __le16 duration; |
85 | __le16 host_duration; |
86 | u8 host_wakeup_pin; |
87 | u8 time_compensation; |
88 | } __packed; |
89 | |
90 | struct btmtk_wakeon { |
91 | u8 mode; |
92 | u8 gpo; |
93 | u8 active_high; |
94 | __le16 enable_delay; |
95 | __le16 wakeup_delay; |
96 | } __packed; |
97 | |
98 | struct btmtk_sco { |
99 | u8 clock_config; |
100 | u8 transmit_format_config; |
101 | u8 channel_format_config; |
102 | u8 channel_select_config; |
103 | } __packed; |
104 | |
105 | struct reg_read_cmd { |
106 | u8 type; |
107 | u8 rsv; |
108 | u8 num; |
109 | __le32 addr; |
110 | } __packed; |
111 | |
112 | struct reg_write_cmd { |
113 | u8 type; |
114 | u8 rsv; |
115 | u8 num; |
116 | __le32 addr; |
117 | __le32 data; |
118 | __le32 mask; |
119 | } __packed; |
120 | |
121 | struct btmtk_hci_wmt_params { |
122 | u8 op; |
123 | u8 flag; |
124 | u16 dlen; |
125 | const void *data; |
126 | u32 *status; |
127 | }; |
128 | |
129 | typedef int (*btmtk_reset_sync_func_t)(struct hci_dev *, void *); |
130 | |
131 | struct btmtk_coredump_info { |
132 | const char *driver_name; |
133 | u32 fw_version; |
134 | u16 cnt; |
135 | int state; |
136 | }; |
137 | |
138 | struct btmediatek_data { |
139 | u32 dev_id; |
140 | btmtk_reset_sync_func_t reset_sync; |
141 | struct btmtk_coredump_info cd_info; |
142 | }; |
143 | |
144 | typedef int (*wmt_cmd_sync_func_t)(struct hci_dev *, |
145 | struct btmtk_hci_wmt_params *); |
146 | |
147 | #if IS_ENABLED(CONFIG_BT_MTK) |
148 | |
149 | int btmtk_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); |
150 | |
151 | int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname, |
152 | wmt_cmd_sync_func_t wmt_cmd_sync); |
153 | |
154 | int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname, |
155 | wmt_cmd_sync_func_t wmt_cmd_sync); |
156 | |
157 | void btmtk_reset_sync(struct hci_dev *hdev); |
158 | |
159 | int btmtk_register_coredump(struct hci_dev *hdev, const char *name, |
160 | u32 fw_version); |
161 | |
162 | int btmtk_process_coredump(struct hci_dev *hdev, struct sk_buff *skb); |
163 | #else |
164 | |
165 | static inline int btmtk_set_bdaddr(struct hci_dev *hdev, |
166 | const bdaddr_t *bdaddr) |
167 | { |
168 | return -EOPNOTSUPP; |
169 | } |
170 | |
171 | static int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname, |
172 | wmt_cmd_sync_func_t wmt_cmd_sync) |
173 | { |
174 | return -EOPNOTSUPP; |
175 | } |
176 | |
177 | static int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname, |
178 | wmt_cmd_sync_func_t wmt_cmd_sync) |
179 | { |
180 | return -EOPNOTSUPP; |
181 | } |
182 | |
183 | static void btmtk_reset_sync(struct hci_dev *hdev) |
184 | { |
185 | } |
186 | |
187 | static int btmtk_register_coredump(struct hci_dev *hdev, const char *name, |
188 | u32 fw_version) |
189 | { |
190 | return -EOPNOTSUPP; |
191 | } |
192 | |
193 | static int btmtk_process_coredump(struct hci_dev *hdev, struct sk_buff *skb) |
194 | { |
195 | return -EOPNOTSUPP; |
196 | } |
197 | #endif |
198 | |