| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | #ifndef __CLK_PXA2XX_H |
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| 3 | #define __CLK_PXA2XX_H |
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| 4 | |
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| 5 | #define CCCR (0x0000) /* Core Clock Configuration Register */ |
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| 6 | #define CCSR (0x000C) /* Core Clock Status Register */ |
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| 7 | #define CKEN (0x0004) /* Clock Enable Register */ |
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| 8 | #define OSCC (0x0008) /* Oscillator Configuration Register */ |
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| 9 | |
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| 10 | #define CCCR_N_MASK 0x0380 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */ |
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| 11 | #define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */ |
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| 12 | #define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */ |
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| 13 | |
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| 14 | #define CCCR_CPDIS_BIT (31) |
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| 15 | #define CCCR_PPDIS_BIT (30) |
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| 16 | #define CCCR_LCD_26_BIT (27) |
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| 17 | #define CCCR_A_BIT (25) |
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| 18 | |
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| 19 | #define CCSR_N2_MASK CCCR_N_MASK |
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| 20 | #define CCSR_M_MASK CCCR_M_MASK |
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| 21 | #define CCSR_L_MASK CCCR_L_MASK |
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| 22 | #define CCSR_N2_SHIFT 7 |
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| 23 | |
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| 24 | #define CKEN_AC97CONF (31) /* AC97 Controller Configuration */ |
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| 25 | #define CKEN_CAMERA (24) /* Camera Interface Clock Enable */ |
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| 26 | #define CKEN_SSP1 (23) /* SSP1 Unit Clock Enable */ |
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| 27 | #define CKEN_MEMC (22) /* Memory Controller Clock Enable */ |
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| 28 | #define CKEN_MEMSTK (21) /* Memory Stick Host Controller */ |
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| 29 | #define CKEN_IM (20) /* Internal Memory Clock Enable */ |
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| 30 | #define CKEN_KEYPAD (19) /* Keypad Interface Clock Enable */ |
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| 31 | #define CKEN_USIM (18) /* USIM Unit Clock Enable */ |
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| 32 | #define CKEN_MSL (17) /* MSL Unit Clock Enable */ |
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| 33 | #define CKEN_LCD (16) /* LCD Unit Clock Enable */ |
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| 34 | #define CKEN_PWRI2C (15) /* PWR I2C Unit Clock Enable */ |
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| 35 | #define CKEN_I2C (14) /* I2C Unit Clock Enable */ |
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| 36 | #define CKEN_FICP (13) /* FICP Unit Clock Enable */ |
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| 37 | #define CKEN_MMC (12) /* MMC Unit Clock Enable */ |
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| 38 | #define CKEN_USB (11) /* USB Unit Clock Enable */ |
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| 39 | #define CKEN_ASSP (10) /* ASSP (SSP3) Clock Enable */ |
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| 40 | #define CKEN_USBHOST (10) /* USB Host Unit Clock Enable */ |
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| 41 | #define CKEN_OSTIMER (9) /* OS Timer Unit Clock Enable */ |
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| 42 | #define CKEN_NSSP (9) /* NSSP (SSP2) Clock Enable */ |
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| 43 | #define CKEN_I2S (8) /* I2S Unit Clock Enable */ |
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| 44 | #define CKEN_BTUART (7) /* BTUART Unit Clock Enable */ |
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| 45 | #define CKEN_FFUART (6) /* FFUART Unit Clock Enable */ |
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| 46 | #define CKEN_STUART (5) /* STUART Unit Clock Enable */ |
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| 47 | #define CKEN_HWUART (4) /* HWUART Unit Clock Enable */ |
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| 48 | #define CKEN_SSP3 (4) /* SSP3 Unit Clock Enable */ |
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| 49 | #define CKEN_SSP (3) /* SSP Unit Clock Enable */ |
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| 50 | #define CKEN_SSP2 (3) /* SSP2 Unit Clock Enable */ |
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| 51 | #define CKEN_AC97 (2) /* AC97 Unit Clock Enable */ |
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| 52 | #define CKEN_PWM1 (1) /* PWM1 Clock Enable */ |
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| 53 | #define CKEN_PWM0 (0) /* PWM0 Clock Enable */ |
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| 54 | |
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| 55 | #define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */ |
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| 56 | #define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */ |
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| 57 | |
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| 58 | #endif |
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| 59 | |
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