Warning: That file was not part of the compilation database. It may have many parsing errors.

1/*
2 * Support for the GPIO/IRQ expander chips present on several HTC phones.
3 * These are implemented in CPLD chips present on the board.
4 *
5 * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
6 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
7 *
8 * This file may be distributed under the terms of the GNU GPL license.
9 */
10
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/spinlock.h>
17#include <linux/platform_data/gpio-htc-egpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/init.h>
21#include <linux/gpio/driver.h>
22
23struct egpio_chip {
24 int reg_start;
25 int cached_values;
26 unsigned long is_out;
27 struct device *dev;
28 struct gpio_chip chip;
29};
30
31struct egpio_info {
32 spinlock_t lock;
33
34 /* iomem info */
35 void __iomem *base_addr;
36 int bus_shift; /* byte shift */
37 int reg_shift; /* bit shift */
38 int reg_mask;
39
40 /* irq info */
41 int ack_register;
42 int ack_write;
43 u16 irqs_enabled;
44 uint irq_start;
45 int nirqs;
46 uint chained_irq;
47
48 /* egpio info */
49 struct egpio_chip *chip;
50 int nchips;
51};
52
53static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
54{
55 writew(value, ei->base_addr + (reg << ei->bus_shift));
56}
57
58static inline u16 egpio_readw(struct egpio_info *ei, int reg)
59{
60 return readw(ei->base_addr + (reg << ei->bus_shift));
61}
62
63/*
64 * IRQs
65 */
66
67static inline void ack_irqs(struct egpio_info *ei)
68{
69 egpio_writew(ei->ack_write, ei, ei->ack_register);
70 pr_debug("EGPIO ack - write %x to base+%x\n",
71 ei->ack_write, ei->ack_register << ei->bus_shift);
72}
73
74static void egpio_ack(struct irq_data *data)
75{
76}
77
78/* There does not appear to be a way to proactively mask interrupts
79 * on the egpio chip itself. So, we simply ignore interrupts that
80 * aren't desired. */
81static void egpio_mask(struct irq_data *data)
82{
83 struct egpio_info *ei = irq_data_get_irq_chip_data(data);
84 ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start));
85 pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled);
86}
87
88static void egpio_unmask(struct irq_data *data)
89{
90 struct egpio_info *ei = irq_data_get_irq_chip_data(data);
91 ei->irqs_enabled |= 1 << (data->irq - ei->irq_start);
92 pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled);
93}
94
95static struct irq_chip egpio_muxed_chip = {
96 .name = "htc-egpio",
97 .irq_ack = egpio_ack,
98 .irq_mask = egpio_mask,
99 .irq_unmask = egpio_unmask,
100};
101
102static void egpio_handler(struct irq_desc *desc)
103{
104 struct egpio_info *ei = irq_desc_get_handler_data(desc);
105 int irqpin;
106
107 /* Read current pins. */
108 unsigned long readval = egpio_readw(ei, ei->ack_register);
109 pr_debug("IRQ reg: %x\n", (unsigned int)readval);
110 /* Ack/unmask interrupts. */
111 ack_irqs(ei);
112 /* Process all set pins. */
113 readval &= ei->irqs_enabled;
114 for_each_set_bit(irqpin, &readval, ei->nirqs) {
115 /* Run irq handler */
116 pr_debug("got IRQ %d\n", irqpin);
117 generic_handle_irq(ei->irq_start + irqpin);
118 }
119}
120
121int htc_egpio_get_wakeup_irq(struct device *dev)
122{
123 struct egpio_info *ei = dev_get_drvdata(dev);
124
125 /* Read current pins. */
126 u16 readval = egpio_readw(ei, ei->ack_register);
127 /* Ack/unmask interrupts. */
128 ack_irqs(ei);
129 /* Return first set pin. */
130 readval &= ei->irqs_enabled;
131 return ei->irq_start + ffs(readval) - 1;
132}
133EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
134
135static inline int egpio_pos(struct egpio_info *ei, int bit)
136{
137 return bit >> ei->reg_shift;
138}
139
140static inline int egpio_bit(struct egpio_info *ei, int bit)
141{
142 return 1 << (bit & ((1 << ei->reg_shift)-1));
143}
144
145/*
146 * Input pins
147 */
148
149static int egpio_get(struct gpio_chip *chip, unsigned offset)
150{
151 struct egpio_chip *egpio;
152 struct egpio_info *ei;
153 unsigned bit;
154 int reg;
155 int value;
156
157 pr_debug("egpio_get_value(%d)\n", chip->base + offset);
158
159 egpio = gpiochip_get_data(chip);
160 ei = dev_get_drvdata(egpio->dev);
161 bit = egpio_bit(ei, offset);
162 reg = egpio->reg_start + egpio_pos(ei, offset);
163
164 if (test_bit(offset, &egpio->is_out)) {
165 return !!(egpio->cached_values & (1 << offset));
166 } else {
167 value = egpio_readw(ei, reg);
168 pr_debug("readw(%p + %x) = %x\n",
169 ei->base_addr, reg << ei->bus_shift, value);
170 return !!(value & bit);
171 }
172}
173
174static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
175{
176 struct egpio_chip *egpio;
177
178 egpio = gpiochip_get_data(chip);
179 return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
180}
181
182
183/*
184 * Output pins
185 */
186
187static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
188{
189 unsigned long flag;
190 struct egpio_chip *egpio;
191 struct egpio_info *ei;
192 int pos;
193 int reg;
194 int shift;
195
196 pr_debug("egpio_set(%s, %d(%d), %d)\n",
197 chip->label, offset, offset+chip->base, value);
198
199 egpio = gpiochip_get_data(chip);
200 ei = dev_get_drvdata(egpio->dev);
201 pos = egpio_pos(ei, offset);
202 reg = egpio->reg_start + pos;
203 shift = pos << ei->reg_shift;
204
205 pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
206 reg, (egpio->cached_values >> shift) & ei->reg_mask);
207
208 spin_lock_irqsave(&ei->lock, flag);
209 if (value)
210 egpio->cached_values |= (1 << offset);
211 else
212 egpio->cached_values &= ~(1 << offset);
213 egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
214 spin_unlock_irqrestore(&ei->lock, flag);
215}
216
217static int egpio_direction_output(struct gpio_chip *chip,
218 unsigned offset, int value)
219{
220 struct egpio_chip *egpio;
221
222 egpio = gpiochip_get_data(chip);
223 if (test_bit(offset, &egpio->is_out)) {
224 egpio_set(chip, offset, value);
225 return 0;
226 } else {
227 return -EINVAL;
228 }
229}
230
231static int egpio_get_direction(struct gpio_chip *chip, unsigned offset)
232{
233 struct egpio_chip *egpio;
234
235 egpio = gpiochip_get_data(chip);
236
237 return !test_bit(offset, &egpio->is_out);
238}
239
240static void egpio_write_cache(struct egpio_info *ei)
241{
242 int i;
243 struct egpio_chip *egpio;
244 int shift;
245
246 for (i = 0; i < ei->nchips; i++) {
247 egpio = &(ei->chip[i]);
248 if (!egpio->is_out)
249 continue;
250
251 for (shift = 0; shift < egpio->chip.ngpio;
252 shift += (1<<ei->reg_shift)) {
253
254 int reg = egpio->reg_start + egpio_pos(ei, shift);
255
256 if (!((egpio->is_out >> shift) & ei->reg_mask))
257 continue;
258
259 pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
260 (egpio->cached_values >> shift) & ei->reg_mask,
261 egpio_readw(ei, reg));
262
263 egpio_writew((egpio->cached_values >> shift)
264 & ei->reg_mask, ei, reg);
265 }
266 }
267}
268
269
270/*
271 * Setup
272 */
273
274static int __init egpio_probe(struct platform_device *pdev)
275{
276 struct htc_egpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
277 struct resource *res;
278 struct egpio_info *ei;
279 struct gpio_chip *chip;
280 unsigned int irq, irq_end;
281 int i;
282 int ret;
283
284 /* Initialize ei data structure. */
285 ei = devm_kzalloc(&pdev->dev, sizeof(*ei), GFP_KERNEL);
286 if (!ei)
287 return -ENOMEM;
288
289 spin_lock_init(&ei->lock);
290
291 /* Find chained irq */
292 ret = -EINVAL;
293 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
294 if (res)
295 ei->chained_irq = res->start;
296
297 /* Map egpio chip into virtual address space. */
298 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
299 if (!res)
300 goto fail;
301 ei->base_addr = devm_ioremap_nocache(&pdev->dev, res->start,
302 resource_size(res));
303 if (!ei->base_addr)
304 goto fail;
305 pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
306
307 if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
308 goto fail;
309 ei->bus_shift = fls(pdata->bus_width - 1) - 3;
310 pr_debug("bus_shift = %d\n", ei->bus_shift);
311
312 if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
313 goto fail;
314 ei->reg_shift = fls(pdata->reg_width - 1);
315 pr_debug("reg_shift = %d\n", ei->reg_shift);
316
317 ei->reg_mask = (1 << pdata->reg_width) - 1;
318
319 platform_set_drvdata(pdev, ei);
320
321 ei->nchips = pdata->num_chips;
322 ei->chip = devm_kcalloc(&pdev->dev,
323 ei->nchips, sizeof(struct egpio_chip),
324 GFP_KERNEL);
325 if (!ei->chip) {
326 ret = -ENOMEM;
327 goto fail;
328 }
329 for (i = 0; i < ei->nchips; i++) {
330 ei->chip[i].reg_start = pdata->chip[i].reg_start;
331 ei->chip[i].cached_values = pdata->chip[i].initial_values;
332 ei->chip[i].is_out = pdata->chip[i].direction;
333 ei->chip[i].dev = &(pdev->dev);
334 chip = &(ei->chip[i].chip);
335 chip->label = devm_kasprintf(&pdev->dev, GFP_KERNEL,
336 "htc-egpio-%d",
337 i);
338 if (!chip->label) {
339 ret = -ENOMEM;
340 goto fail;
341 }
342 chip->parent = &pdev->dev;
343 chip->owner = THIS_MODULE;
344 chip->get = egpio_get;
345 chip->set = egpio_set;
346 chip->direction_input = egpio_direction_input;
347 chip->direction_output = egpio_direction_output;
348 chip->get_direction = egpio_get_direction;
349 chip->base = pdata->chip[i].gpio_base;
350 chip->ngpio = pdata->chip[i].num_gpios;
351
352 gpiochip_add_data(chip, &ei->chip[i]);
353 }
354
355 /* Set initial pin values */
356 egpio_write_cache(ei);
357
358 ei->irq_start = pdata->irq_base;
359 ei->nirqs = pdata->num_irqs;
360 ei->ack_register = pdata->ack_register;
361
362 if (ei->chained_irq) {
363 /* Setup irq handlers */
364 ei->ack_write = 0xFFFF;
365 if (pdata->invert_acks)
366 ei->ack_write = 0;
367 irq_end = ei->irq_start + ei->nirqs;
368 for (irq = ei->irq_start; irq < irq_end; irq++) {
369 irq_set_chip_and_handler(irq, &egpio_muxed_chip,
370 handle_simple_irq);
371 irq_set_chip_data(irq, ei);
372 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
373 }
374 irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
375 irq_set_chained_handler_and_data(ei->chained_irq,
376 egpio_handler, ei);
377 ack_irqs(ei);
378
379 device_init_wakeup(&pdev->dev, 1);
380 }
381
382 return 0;
383
384fail:
385 printk(KERN_ERR "EGPIO failed to setup\n");
386 return ret;
387}
388
389#ifdef CONFIG_PM
390static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
391{
392 struct egpio_info *ei = platform_get_drvdata(pdev);
393
394 if (ei->chained_irq && device_may_wakeup(&pdev->dev))
395 enable_irq_wake(ei->chained_irq);
396 return 0;
397}
398
399static int egpio_resume(struct platform_device *pdev)
400{
401 struct egpio_info *ei = platform_get_drvdata(pdev);
402
403 if (ei->chained_irq && device_may_wakeup(&pdev->dev))
404 disable_irq_wake(ei->chained_irq);
405
406 /* Update registers from the cache, in case
407 the CPLD was powered off during suspend */
408 egpio_write_cache(ei);
409 return 0;
410}
411#else
412#define egpio_suspend NULL
413#define egpio_resume NULL
414#endif
415
416
417static struct platform_driver egpio_driver = {
418 .driver = {
419 .name = "htc-egpio",
420 .suppress_bind_attrs = true,
421 },
422 .suspend = egpio_suspend,
423 .resume = egpio_resume,
424};
425
426static int __init egpio_init(void)
427{
428 return platform_driver_probe(&egpio_driver, egpio_probe);
429}
430/* start early for dependencies */
431subsys_initcall(egpio_init);
432

Warning: That file was not part of the compilation database. It may have many parsing errors.