1/*
2 * Copyright (C) 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20 */
21
22#ifndef _mp_11_0_2_OFFSET_HEADER
23#define _mp_11_0_2_OFFSET_HEADER
24
25
26// addressBlock: mp_SmuMp0_SmnDec
27// base address: 0x0
28#define mmMP0_SMN_C2PMSG_32 0x0060
29#define mmMP0_SMN_C2PMSG_32_BASE_IDX 0
30#define mmMP0_SMN_C2PMSG_33 0x0061
31#define mmMP0_SMN_C2PMSG_33_BASE_IDX 0
32#define mmMP0_SMN_C2PMSG_34 0x0062
33#define mmMP0_SMN_C2PMSG_34_BASE_IDX 0
34#define mmMP0_SMN_C2PMSG_35 0x0063
35#define mmMP0_SMN_C2PMSG_35_BASE_IDX 0
36#define mmMP0_SMN_C2PMSG_36 0x0064
37#define mmMP0_SMN_C2PMSG_36_BASE_IDX 0
38#define mmMP0_SMN_C2PMSG_37 0x0065
39#define mmMP0_SMN_C2PMSG_37_BASE_IDX 0
40#define mmMP0_SMN_C2PMSG_38 0x0066
41#define mmMP0_SMN_C2PMSG_38_BASE_IDX 0
42#define mmMP0_SMN_C2PMSG_39 0x0067
43#define mmMP0_SMN_C2PMSG_39_BASE_IDX 0
44#define mmMP0_SMN_C2PMSG_40 0x0068
45#define mmMP0_SMN_C2PMSG_40_BASE_IDX 0
46#define mmMP0_SMN_C2PMSG_41 0x0069
47#define mmMP0_SMN_C2PMSG_41_BASE_IDX 0
48#define mmMP0_SMN_C2PMSG_42 0x006a
49#define mmMP0_SMN_C2PMSG_42_BASE_IDX 0
50#define mmMP0_SMN_C2PMSG_43 0x006b
51#define mmMP0_SMN_C2PMSG_43_BASE_IDX 0
52#define mmMP0_SMN_C2PMSG_44 0x006c
53#define mmMP0_SMN_C2PMSG_44_BASE_IDX 0
54#define mmMP0_SMN_C2PMSG_45 0x006d
55#define mmMP0_SMN_C2PMSG_45_BASE_IDX 0
56#define mmMP0_SMN_C2PMSG_46 0x006e
57#define mmMP0_SMN_C2PMSG_46_BASE_IDX 0
58#define mmMP0_SMN_C2PMSG_47 0x006f
59#define mmMP0_SMN_C2PMSG_47_BASE_IDX 0
60#define mmMP0_SMN_C2PMSG_48 0x0070
61#define mmMP0_SMN_C2PMSG_48_BASE_IDX 0
62#define mmMP0_SMN_C2PMSG_49 0x0071
63#define mmMP0_SMN_C2PMSG_49_BASE_IDX 0
64#define mmMP0_SMN_C2PMSG_50 0x0072
65#define mmMP0_SMN_C2PMSG_50_BASE_IDX 0
66#define mmMP0_SMN_C2PMSG_51 0x0073
67#define mmMP0_SMN_C2PMSG_51_BASE_IDX 0
68#define mmMP0_SMN_C2PMSG_52 0x0074
69#define mmMP0_SMN_C2PMSG_52_BASE_IDX 0
70#define mmMP0_SMN_C2PMSG_53 0x0075
71#define mmMP0_SMN_C2PMSG_53_BASE_IDX 0
72#define mmMP0_SMN_C2PMSG_54 0x0076
73#define mmMP0_SMN_C2PMSG_54_BASE_IDX 0
74#define mmMP0_SMN_C2PMSG_55 0x0077
75#define mmMP0_SMN_C2PMSG_55_BASE_IDX 0
76#define mmMP0_SMN_C2PMSG_56 0x0078
77#define mmMP0_SMN_C2PMSG_56_BASE_IDX 0
78#define mmMP0_SMN_C2PMSG_57 0x0079
79#define mmMP0_SMN_C2PMSG_57_BASE_IDX 0
80#define mmMP0_SMN_C2PMSG_58 0x007a
81#define mmMP0_SMN_C2PMSG_58_BASE_IDX 0
82#define mmMP0_SMN_C2PMSG_59 0x007b
83#define mmMP0_SMN_C2PMSG_59_BASE_IDX 0
84#define mmMP0_SMN_C2PMSG_60 0x007c
85#define mmMP0_SMN_C2PMSG_60_BASE_IDX 0
86#define mmMP0_SMN_C2PMSG_61 0x007d
87#define mmMP0_SMN_C2PMSG_61_BASE_IDX 0
88#define mmMP0_SMN_C2PMSG_62 0x007e
89#define mmMP0_SMN_C2PMSG_62_BASE_IDX 0
90#define mmMP0_SMN_C2PMSG_63 0x007f
91#define mmMP0_SMN_C2PMSG_63_BASE_IDX 0
92#define mmMP0_SMN_C2PMSG_64 0x0080
93#define mmMP0_SMN_C2PMSG_64_BASE_IDX 0
94#define mmMP0_SMN_C2PMSG_65 0x0081
95#define mmMP0_SMN_C2PMSG_65_BASE_IDX 0
96#define mmMP0_SMN_C2PMSG_66 0x0082
97#define mmMP0_SMN_C2PMSG_66_BASE_IDX 0
98#define mmMP0_SMN_C2PMSG_67 0x0083
99#define mmMP0_SMN_C2PMSG_67_BASE_IDX 0
100#define mmMP0_SMN_C2PMSG_68 0x0084
101#define mmMP0_SMN_C2PMSG_68_BASE_IDX 0
102#define mmMP0_SMN_C2PMSG_69 0x0085
103#define mmMP0_SMN_C2PMSG_69_BASE_IDX 0
104#define mmMP0_SMN_C2PMSG_70 0x0086
105#define mmMP0_SMN_C2PMSG_70_BASE_IDX 0
106#define mmMP0_SMN_C2PMSG_71 0x0087
107#define mmMP0_SMN_C2PMSG_71_BASE_IDX 0
108#define mmMP0_SMN_C2PMSG_72 0x0088
109#define mmMP0_SMN_C2PMSG_72_BASE_IDX 0
110#define mmMP0_SMN_C2PMSG_73 0x0089
111#define mmMP0_SMN_C2PMSG_73_BASE_IDX 0
112#define mmMP0_SMN_C2PMSG_74 0x008a
113#define mmMP0_SMN_C2PMSG_74_BASE_IDX 0
114#define mmMP0_SMN_C2PMSG_75 0x008b
115#define mmMP0_SMN_C2PMSG_75_BASE_IDX 0
116#define mmMP0_SMN_C2PMSG_76 0x008c
117#define mmMP0_SMN_C2PMSG_76_BASE_IDX 0
118#define mmMP0_SMN_C2PMSG_77 0x008d
119#define mmMP0_SMN_C2PMSG_77_BASE_IDX 0
120#define mmMP0_SMN_C2PMSG_78 0x008e
121#define mmMP0_SMN_C2PMSG_78_BASE_IDX 0
122#define mmMP0_SMN_C2PMSG_79 0x008f
123#define mmMP0_SMN_C2PMSG_79_BASE_IDX 0
124#define mmMP0_SMN_C2PMSG_80 0x0090
125#define mmMP0_SMN_C2PMSG_80_BASE_IDX 0
126#define mmMP0_SMN_C2PMSG_81 0x0091
127#define mmMP0_SMN_C2PMSG_81_BASE_IDX 0
128#define mmMP0_SMN_C2PMSG_82 0x0092
129#define mmMP0_SMN_C2PMSG_82_BASE_IDX 0
130#define mmMP0_SMN_C2PMSG_83 0x0093
131#define mmMP0_SMN_C2PMSG_83_BASE_IDX 0
132#define mmMP0_SMN_C2PMSG_84 0x0094
133#define mmMP0_SMN_C2PMSG_84_BASE_IDX 0
134#define mmMP0_SMN_C2PMSG_85 0x0095
135#define mmMP0_SMN_C2PMSG_85_BASE_IDX 0
136#define mmMP0_SMN_C2PMSG_86 0x0096
137#define mmMP0_SMN_C2PMSG_86_BASE_IDX 0
138#define mmMP0_SMN_C2PMSG_87 0x0097
139#define mmMP0_SMN_C2PMSG_87_BASE_IDX 0
140#define mmMP0_SMN_C2PMSG_88 0x0098
141#define mmMP0_SMN_C2PMSG_88_BASE_IDX 0
142#define mmMP0_SMN_C2PMSG_89 0x0099
143#define mmMP0_SMN_C2PMSG_89_BASE_IDX 0
144#define mmMP0_SMN_C2PMSG_90 0x009a
145#define mmMP0_SMN_C2PMSG_90_BASE_IDX 0
146#define mmMP0_SMN_C2PMSG_91 0x009b
147#define mmMP0_SMN_C2PMSG_91_BASE_IDX 0
148#define mmMP0_SMN_C2PMSG_92 0x009c
149#define mmMP0_SMN_C2PMSG_92_BASE_IDX 0
150#define mmMP0_SMN_C2PMSG_93 0x009d
151#define mmMP0_SMN_C2PMSG_93_BASE_IDX 0
152#define mmMP0_SMN_C2PMSG_94 0x009e
153#define mmMP0_SMN_C2PMSG_94_BASE_IDX 0
154#define mmMP0_SMN_C2PMSG_95 0x009f
155#define mmMP0_SMN_C2PMSG_95_BASE_IDX 0
156#define mmMP0_SMN_C2PMSG_96 0x00a0
157#define mmMP0_SMN_C2PMSG_96_BASE_IDX 0
158#define mmMP0_SMN_C2PMSG_97 0x00a1
159#define mmMP0_SMN_C2PMSG_97_BASE_IDX 0
160#define mmMP0_SMN_C2PMSG_98 0x00a2
161#define mmMP0_SMN_C2PMSG_98_BASE_IDX 0
162#define mmMP0_SMN_C2PMSG_99 0x00a3
163#define mmMP0_SMN_C2PMSG_99_BASE_IDX 0
164#define mmMP0_SMN_C2PMSG_100 0x00a4
165#define mmMP0_SMN_C2PMSG_100_BASE_IDX 0
166#define mmMP0_SMN_C2PMSG_101 0x00a5
167#define mmMP0_SMN_C2PMSG_101_BASE_IDX 0
168#define mmMP0_SMN_C2PMSG_102 0x00a6
169#define mmMP0_SMN_C2PMSG_102_BASE_IDX 0
170#define mmMP0_SMN_C2PMSG_103 0x00a7
171#define mmMP0_SMN_C2PMSG_103_BASE_IDX 0
172#define mmMP0_SMN_ACTIVE_FCN_ID 0x00c0
173#define mmMP0_SMN_ACTIVE_FCN_ID_BASE_IDX 0
174#define mmMP0_SMN_IH_CREDIT 0x00c1
175#define mmMP0_SMN_IH_CREDIT_BASE_IDX 0
176#define mmMP0_SMN_IH_SW_INT 0x00c2
177#define mmMP0_SMN_IH_SW_INT_BASE_IDX 0
178#define mmMP0_SMN_IH_SW_INT_CTRL 0x00c3
179#define mmMP0_SMN_IH_SW_INT_CTRL_BASE_IDX 0
180
181
182// addressBlock: mp_SmuMp1_SmnDec
183// base address: 0x0
184#define mmMP1_SMN_C2PMSG_32 0x0260
185#define mmMP1_SMN_C2PMSG_32_BASE_IDX 0
186#define mmMP1_SMN_C2PMSG_33 0x0261
187#define mmMP1_SMN_C2PMSG_33_BASE_IDX 0
188#define mmMP1_SMN_C2PMSG_34 0x0262
189#define mmMP1_SMN_C2PMSG_34_BASE_IDX 0
190#define mmMP1_SMN_C2PMSG_35 0x0263
191#define mmMP1_SMN_C2PMSG_35_BASE_IDX 0
192#define mmMP1_SMN_C2PMSG_36 0x0264
193#define mmMP1_SMN_C2PMSG_36_BASE_IDX 0
194#define mmMP1_SMN_C2PMSG_37 0x0265
195#define mmMP1_SMN_C2PMSG_37_BASE_IDX 0
196#define mmMP1_SMN_C2PMSG_38 0x0266
197#define mmMP1_SMN_C2PMSG_38_BASE_IDX 0
198#define mmMP1_SMN_C2PMSG_39 0x0267
199#define mmMP1_SMN_C2PMSG_39_BASE_IDX 0
200#define mmMP1_SMN_C2PMSG_40 0x0268
201#define mmMP1_SMN_C2PMSG_40_BASE_IDX 0
202#define mmMP1_SMN_C2PMSG_41 0x0269
203#define mmMP1_SMN_C2PMSG_41_BASE_IDX 0
204#define mmMP1_SMN_C2PMSG_42 0x026a
205#define mmMP1_SMN_C2PMSG_42_BASE_IDX 0
206#define mmMP1_SMN_C2PMSG_43 0x026b
207#define mmMP1_SMN_C2PMSG_43_BASE_IDX 0
208#define mmMP1_SMN_C2PMSG_44 0x026c
209#define mmMP1_SMN_C2PMSG_44_BASE_IDX 0
210#define mmMP1_SMN_C2PMSG_45 0x026d
211#define mmMP1_SMN_C2PMSG_45_BASE_IDX 0
212#define mmMP1_SMN_C2PMSG_46 0x026e
213#define mmMP1_SMN_C2PMSG_46_BASE_IDX 0
214#define mmMP1_SMN_C2PMSG_47 0x026f
215#define mmMP1_SMN_C2PMSG_47_BASE_IDX 0
216#define mmMP1_SMN_C2PMSG_48 0x0270
217#define mmMP1_SMN_C2PMSG_48_BASE_IDX 0
218#define mmMP1_SMN_C2PMSG_49 0x0271
219#define mmMP1_SMN_C2PMSG_49_BASE_IDX 0
220#define mmMP1_SMN_C2PMSG_50 0x0272
221#define mmMP1_SMN_C2PMSG_50_BASE_IDX 0
222#define mmMP1_SMN_C2PMSG_51 0x0273
223#define mmMP1_SMN_C2PMSG_51_BASE_IDX 0
224#define mmMP1_SMN_C2PMSG_52 0x0274
225#define mmMP1_SMN_C2PMSG_52_BASE_IDX 0
226#define mmMP1_SMN_C2PMSG_53 0x0275
227#define mmMP1_SMN_C2PMSG_53_BASE_IDX 0
228#define mmMP1_SMN_C2PMSG_54 0x0276
229#define mmMP1_SMN_C2PMSG_54_BASE_IDX 0
230#define mmMP1_SMN_C2PMSG_55 0x0277
231#define mmMP1_SMN_C2PMSG_55_BASE_IDX 0
232#define mmMP1_SMN_C2PMSG_56 0x0278
233#define mmMP1_SMN_C2PMSG_56_BASE_IDX 0
234#define mmMP1_SMN_C2PMSG_57 0x0279
235#define mmMP1_SMN_C2PMSG_57_BASE_IDX 0
236#define mmMP1_SMN_C2PMSG_58 0x027a
237#define mmMP1_SMN_C2PMSG_58_BASE_IDX 0
238#define mmMP1_SMN_C2PMSG_59 0x027b
239#define mmMP1_SMN_C2PMSG_59_BASE_IDX 0
240#define mmMP1_SMN_C2PMSG_60 0x027c
241#define mmMP1_SMN_C2PMSG_60_BASE_IDX 0
242#define mmMP1_SMN_C2PMSG_61 0x027d
243#define mmMP1_SMN_C2PMSG_61_BASE_IDX 0
244#define mmMP1_SMN_C2PMSG_62 0x027e
245#define mmMP1_SMN_C2PMSG_62_BASE_IDX 0
246#define mmMP1_SMN_C2PMSG_63 0x027f
247#define mmMP1_SMN_C2PMSG_63_BASE_IDX 0
248#define mmMP1_SMN_C2PMSG_64 0x0280
249#define mmMP1_SMN_C2PMSG_64_BASE_IDX 0
250#define mmMP1_SMN_C2PMSG_65 0x0281
251#define mmMP1_SMN_C2PMSG_65_BASE_IDX 0
252#define mmMP1_SMN_C2PMSG_66 0x0282
253#define mmMP1_SMN_C2PMSG_66_BASE_IDX 0
254#define mmMP1_SMN_C2PMSG_67 0x0283
255#define mmMP1_SMN_C2PMSG_67_BASE_IDX 0
256#define mmMP1_SMN_C2PMSG_68 0x0284
257#define mmMP1_SMN_C2PMSG_68_BASE_IDX 0
258#define mmMP1_SMN_C2PMSG_69 0x0285
259#define mmMP1_SMN_C2PMSG_69_BASE_IDX 0
260#define mmMP1_SMN_C2PMSG_70 0x0286
261#define mmMP1_SMN_C2PMSG_70_BASE_IDX 0
262#define mmMP1_SMN_C2PMSG_71 0x0287
263#define mmMP1_SMN_C2PMSG_71_BASE_IDX 0
264#define mmMP1_SMN_C2PMSG_72 0x0288
265#define mmMP1_SMN_C2PMSG_72_BASE_IDX 0
266#define mmMP1_SMN_C2PMSG_73 0x0289
267#define mmMP1_SMN_C2PMSG_73_BASE_IDX 0
268#define mmMP1_SMN_C2PMSG_74 0x028a
269#define mmMP1_SMN_C2PMSG_74_BASE_IDX 0
270#define mmMP1_SMN_C2PMSG_75 0x028b
271#define mmMP1_SMN_C2PMSG_75_BASE_IDX 0
272#define mmMP1_SMN_C2PMSG_76 0x028c
273#define mmMP1_SMN_C2PMSG_76_BASE_IDX 0
274#define mmMP1_SMN_C2PMSG_77 0x028d
275#define mmMP1_SMN_C2PMSG_77_BASE_IDX 0
276#define mmMP1_SMN_C2PMSG_78 0x028e
277#define mmMP1_SMN_C2PMSG_78_BASE_IDX 0
278#define mmMP1_SMN_C2PMSG_79 0x028f
279#define mmMP1_SMN_C2PMSG_79_BASE_IDX 0
280#define mmMP1_SMN_C2PMSG_80 0x0290
281#define mmMP1_SMN_C2PMSG_80_BASE_IDX 0
282#define mmMP1_SMN_C2PMSG_81 0x0291
283#define mmMP1_SMN_C2PMSG_81_BASE_IDX 0
284#define mmMP1_SMN_C2PMSG_82 0x0292
285#define mmMP1_SMN_C2PMSG_82_BASE_IDX 0
286#define mmMP1_SMN_C2PMSG_83 0x0293
287#define mmMP1_SMN_C2PMSG_83_BASE_IDX 0
288#define mmMP1_SMN_C2PMSG_84 0x0294
289#define mmMP1_SMN_C2PMSG_84_BASE_IDX 0
290#define mmMP1_SMN_C2PMSG_85 0x0295
291#define mmMP1_SMN_C2PMSG_85_BASE_IDX 0
292#define mmMP1_SMN_C2PMSG_86 0x0296
293#define mmMP1_SMN_C2PMSG_86_BASE_IDX 0
294#define mmMP1_SMN_C2PMSG_87 0x0297
295#define mmMP1_SMN_C2PMSG_87_BASE_IDX 0
296#define mmMP1_SMN_C2PMSG_88 0x0298
297#define mmMP1_SMN_C2PMSG_88_BASE_IDX 0
298#define mmMP1_SMN_C2PMSG_89 0x0299
299#define mmMP1_SMN_C2PMSG_89_BASE_IDX 0
300#define mmMP1_SMN_C2PMSG_90 0x029a
301#define mmMP1_SMN_C2PMSG_90_BASE_IDX 0
302#define mmMP1_SMN_C2PMSG_91 0x029b
303#define mmMP1_SMN_C2PMSG_91_BASE_IDX 0
304#define mmMP1_SMN_C2PMSG_92 0x029c
305#define mmMP1_SMN_C2PMSG_92_BASE_IDX 0
306#define mmMP1_SMN_C2PMSG_93 0x029d
307#define mmMP1_SMN_C2PMSG_93_BASE_IDX 0
308#define mmMP1_SMN_C2PMSG_94 0x029e
309#define mmMP1_SMN_C2PMSG_94_BASE_IDX 0
310#define mmMP1_SMN_C2PMSG_95 0x029f
311#define mmMP1_SMN_C2PMSG_95_BASE_IDX 0
312#define mmMP1_SMN_C2PMSG_96 0x02a0
313#define mmMP1_SMN_C2PMSG_96_BASE_IDX 0
314#define mmMP1_SMN_C2PMSG_97 0x02a1
315#define mmMP1_SMN_C2PMSG_97_BASE_IDX 0
316#define mmMP1_SMN_C2PMSG_98 0x02a2
317#define mmMP1_SMN_C2PMSG_98_BASE_IDX 0
318#define mmMP1_SMN_C2PMSG_99 0x02a3
319#define mmMP1_SMN_C2PMSG_99_BASE_IDX 0
320#define mmMP1_SMN_C2PMSG_100 0x02a4
321#define mmMP1_SMN_C2PMSG_100_BASE_IDX 0
322#define mmMP1_SMN_C2PMSG_101 0x02a5
323#define mmMP1_SMN_C2PMSG_101_BASE_IDX 0
324#define mmMP1_SMN_C2PMSG_102 0x02a6
325#define mmMP1_SMN_C2PMSG_102_BASE_IDX 0
326#define mmMP1_SMN_C2PMSG_103 0x02a7
327#define mmMP1_SMN_C2PMSG_103_BASE_IDX 0
328#define mmMP1_SMN_ACTIVE_FCN_ID 0x02c0
329#define mmMP1_SMN_ACTIVE_FCN_ID_BASE_IDX 0
330#define mmMP1_SMN_IH_CREDIT 0x02c1
331#define mmMP1_SMN_IH_CREDIT_BASE_IDX 0
332#define mmMP1_SMN_IH_SW_INT 0x02c2
333#define mmMP1_SMN_IH_SW_INT_BASE_IDX 0
334#define mmMP1_SMN_IH_SW_INT_CTRL 0x02c3
335#define mmMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 0
336#define mmMP1_SMN_FPS_CNT 0x02c4
337#define mmMP1_SMN_FPS_CNT_BASE_IDX 0
338#define mmMP1_SMN_PUB_CTRL 0x02c5
339#define mmMP1_SMN_PUB_CTRL_BASE_IDX 0
340#define mmMP1_SMN_EXT_SCRATCH0 0x03c0
341#define mmMP1_SMN_EXT_SCRATCH0_BASE_IDX 0
342#define mmMP1_SMN_EXT_SCRATCH1 0x03c1
343#define mmMP1_SMN_EXT_SCRATCH1_BASE_IDX 0
344#define mmMP1_SMN_EXT_SCRATCH2 0x03c2
345#define mmMP1_SMN_EXT_SCRATCH2_BASE_IDX 0
346#define mmMP1_SMN_EXT_SCRATCH3 0x03c3
347#define mmMP1_SMN_EXT_SCRATCH3_BASE_IDX 0
348#define mmMP1_SMN_EXT_SCRATCH4 0x03c4
349#define mmMP1_SMN_EXT_SCRATCH4_BASE_IDX 0
350#define mmMP1_SMN_EXT_SCRATCH5 0x03c5
351#define mmMP1_SMN_EXT_SCRATCH5_BASE_IDX 0
352#define mmMP1_SMN_EXT_SCRATCH6 0x03c6
353#define mmMP1_SMN_EXT_SCRATCH6_BASE_IDX 0
354#define mmMP1_SMN_EXT_SCRATCH7 0x03c7
355#define mmMP1_SMN_EXT_SCRATCH7_BASE_IDX 0
356
357/*
358 * addressBlock: mp_SmuMp1Pub_MmuDec
359 * base address: 0x0
360 */
361#define smnMP1_PMI_3_START 0x3030204
362#define smnMP1_PMI_3_FIFO 0x3030208
363#define smnMP1_PMI_3 0x3030600
364
365#endif
366

source code of linux/drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h