1 | /* |
2 | * Copyright (C) 2018 Advanced Micro Devices, Inc. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included |
12 | * in all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN |
18 | * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
19 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
20 | */ |
21 | #ifndef _soc15_hw_ip_HEADER |
22 | #define |
23 | |
24 | // HW ID |
25 | #define MP1_HWID 1 |
26 | #define MP2_HWID 2 |
27 | #define THM_HWID 3 |
28 | #define SMUIO_HWID 4 |
29 | #define FUSE_HWID 5 |
30 | #define CLKA_HWID 6 |
31 | #define PWR_HWID 10 |
32 | #define GC_HWID 11 |
33 | #define UVD_HWID 12 |
34 | #define VCN_HWID UVD_HWID |
35 | #define AUDIO_AZ_HWID 13 |
36 | #define ACP_HWID 14 |
37 | #define DCI_HWID 15 |
38 | #define DMU_HWID 271 |
39 | #define DCO_HWID 16 |
40 | #define DIO_HWID 272 |
41 | #define XDMA_HWID 17 |
42 | #define DCEAZ_HWID 18 |
43 | #define DAZ_HWID 274 |
44 | #define SDPMUX_HWID 19 |
45 | #define NTB_HWID 20 |
46 | #define VPE_HWID 21 |
47 | #define IOHC_HWID 24 |
48 | #define L2IMU_HWID 28 |
49 | #define VCE_HWID 32 |
50 | #define MMHUB_HWID 34 |
51 | #define ATHUB_HWID 35 |
52 | #define DBGU_NBIO_HWID 36 |
53 | #define DFX_HWID 37 |
54 | #define DBGU0_HWID 38 |
55 | #define DBGU1_HWID 39 |
56 | #define OSSSYS_HWID 40 |
57 | #define HDP_HWID 41 |
58 | #define SDMA0_HWID 42 |
59 | #define SDMA1_HWID 43 |
60 | #define ISP_HWID 44 |
61 | #define DBGU_IO_HWID 45 |
62 | #define DF_HWID 46 |
63 | #define CLKB_HWID 47 |
64 | #define FCH_HWID 48 |
65 | #define DFX_DAP_HWID 49 |
66 | #define L1IMU_PCIE_HWID 50 |
67 | #define L1IMU_NBIF_HWID 51 |
68 | #define L1IMU_IOAGR_HWID 52 |
69 | #define L1IMU3_HWID 53 |
70 | #define L1IMU4_HWID 54 |
71 | #define L1IMU5_HWID 55 |
72 | #define L1IMU6_HWID 56 |
73 | #define L1IMU7_HWID 57 |
74 | #define L1IMU8_HWID 58 |
75 | #define L1IMU9_HWID 59 |
76 | #define L1IMU10_HWID 60 |
77 | #define L1IMU11_HWID 61 |
78 | #define L1IMU12_HWID 62 |
79 | #define L1IMU13_HWID 63 |
80 | #define L1IMU14_HWID 64 |
81 | #define L1IMU15_HWID 65 |
82 | #define WAFLC_HWID 66 |
83 | #define FCH_USB_PD_HWID 67 |
84 | #define SDMA2_HWID 68 |
85 | #define SDMA3_HWID 69 |
86 | #define PCIE_HWID 70 |
87 | #define PCS_HWID 80 |
88 | #define DDCL_HWID 89 |
89 | #define SST_HWID 90 |
90 | #define LSDMA_HWID 91 |
91 | #define IOAGR_HWID 100 |
92 | #define NBIF_HWID 108 |
93 | #define IOAPIC_HWID 124 |
94 | #define SYSTEMHUB_HWID 128 |
95 | #define NTBCCP_HWID 144 |
96 | #define UMC_HWID 150 |
97 | #define SATA_HWID 168 |
98 | #define USB_HWID 170 |
99 | #define CCXSEC_HWID 176 |
100 | #define XGMI_HWID 200 |
101 | #define XGBE_HWID 216 |
102 | #define MP0_HWID 255 |
103 | |
104 | #endif |
105 | |