1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * Copyright (C) 2015-2018 Etnaviv Project |
4 | */ |
5 | |
6 | #ifndef __ETNAVIV_GEM_H__ |
7 | #define __ETNAVIV_GEM_H__ |
8 | |
9 | #include <linux/dma-resv.h> |
10 | #include "etnaviv_cmdbuf.h" |
11 | #include "etnaviv_drv.h" |
12 | |
13 | struct dma_fence; |
14 | struct etnaviv_gem_ops; |
15 | struct etnaviv_gem_object; |
16 | |
17 | struct etnaviv_gem_userptr { |
18 | uintptr_t ptr; |
19 | struct mm_struct *mm; |
20 | bool ro; |
21 | }; |
22 | |
23 | struct etnaviv_vram_mapping { |
24 | struct list_head obj_node; |
25 | struct list_head scan_node; |
26 | struct list_head mmu_node; |
27 | struct etnaviv_gem_object *object; |
28 | struct etnaviv_iommu_context *context; |
29 | struct drm_mm_node vram_node; |
30 | unsigned int use; |
31 | u32 iova; |
32 | }; |
33 | |
34 | struct etnaviv_gem_object { |
35 | struct drm_gem_object base; |
36 | const struct etnaviv_gem_ops *ops; |
37 | struct mutex lock; |
38 | |
39 | u32 flags; |
40 | |
41 | struct list_head gem_node; |
42 | struct etnaviv_gpu *gpu; /* non-null if active */ |
43 | atomic_t gpu_active; |
44 | u32 access; |
45 | |
46 | struct page **pages; |
47 | struct sg_table *sgt; |
48 | void *vaddr; |
49 | |
50 | struct list_head vram_list; |
51 | |
52 | /* cache maintenance */ |
53 | u32 last_cpu_prep_op; |
54 | |
55 | struct etnaviv_gem_userptr userptr; |
56 | }; |
57 | |
58 | static inline |
59 | struct etnaviv_gem_object *to_etnaviv_bo(struct drm_gem_object *obj) |
60 | { |
61 | return container_of(obj, struct etnaviv_gem_object, base); |
62 | } |
63 | |
64 | struct etnaviv_gem_ops { |
65 | int (*get_pages)(struct etnaviv_gem_object *); |
66 | void (*release)(struct etnaviv_gem_object *); |
67 | void *(*vmap)(struct etnaviv_gem_object *); |
68 | int (*mmap)(struct etnaviv_gem_object *, struct vm_area_struct *); |
69 | }; |
70 | |
71 | static inline bool is_active(struct etnaviv_gem_object *etnaviv_obj) |
72 | { |
73 | return atomic_read(v: &etnaviv_obj->gpu_active) != 0; |
74 | } |
75 | |
76 | #define MAX_CMDS 4 |
77 | |
78 | struct etnaviv_gem_submit_bo { |
79 | u32 flags; |
80 | u64 va; |
81 | struct etnaviv_gem_object *obj; |
82 | struct etnaviv_vram_mapping *mapping; |
83 | }; |
84 | |
85 | /* Created per submit-ioctl, to track bo's and cmdstream bufs, etc, |
86 | * associated with the cmdstream submission for synchronization (and |
87 | * make it easier to unwind when things go wrong, etc). |
88 | */ |
89 | struct etnaviv_gem_submit { |
90 | struct drm_sched_job sched_job; |
91 | struct kref refcount; |
92 | struct etnaviv_file_private *ctx; |
93 | struct etnaviv_gpu *gpu; |
94 | struct etnaviv_iommu_context *mmu_context, *prev_mmu_context; |
95 | struct dma_fence *out_fence; |
96 | int out_fence_id; |
97 | struct list_head node; /* GPU active submit list */ |
98 | struct etnaviv_cmdbuf cmdbuf; |
99 | struct pid *pid; /* submitting process */ |
100 | u32 exec_state; |
101 | u32 flags; |
102 | unsigned int nr_pmrs; |
103 | struct etnaviv_perfmon_request *pmrs; |
104 | unsigned int nr_bos; |
105 | struct etnaviv_gem_submit_bo bos[]; |
106 | /* No new members here, the previous one is variable-length! */ |
107 | }; |
108 | |
109 | void etnaviv_submit_put(struct etnaviv_gem_submit * submit); |
110 | |
111 | int etnaviv_gem_wait_bo(struct etnaviv_gpu *gpu, struct drm_gem_object *obj, |
112 | struct drm_etnaviv_timespec *timeout); |
113 | int etnaviv_gem_new_private(struct drm_device *dev, size_t size, u32 flags, |
114 | const struct etnaviv_gem_ops *ops, struct etnaviv_gem_object **res); |
115 | void etnaviv_gem_obj_add(struct drm_device *dev, struct drm_gem_object *obj); |
116 | struct page **etnaviv_gem_get_pages(struct etnaviv_gem_object *obj); |
117 | void etnaviv_gem_put_pages(struct etnaviv_gem_object *obj); |
118 | |
119 | struct etnaviv_vram_mapping *etnaviv_gem_mapping_get( |
120 | struct drm_gem_object *obj, struct etnaviv_iommu_context *mmu_context, |
121 | u64 va); |
122 | void etnaviv_gem_mapping_unreference(struct etnaviv_vram_mapping *mapping); |
123 | |
124 | #endif /* __ETNAVIV_GEM_H__ */ |
125 | |