1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
4 */
5
6#ifndef _DP_CATALOG_H_
7#define _DP_CATALOG_H_
8
9#include <drm/drm_modes.h>
10
11#include "dp_utils.h"
12#include "disp/msm_disp_snapshot.h"
13
14/* interrupts */
15#define DP_INTR_HPD BIT(0)
16#define DP_INTR_AUX_XFER_DONE BIT(3)
17#define DP_INTR_WRONG_ADDR BIT(6)
18#define DP_INTR_TIMEOUT BIT(9)
19#define DP_INTR_NACK_DEFER BIT(12)
20#define DP_INTR_WRONG_DATA_CNT BIT(15)
21#define DP_INTR_I2C_NACK BIT(18)
22#define DP_INTR_I2C_DEFER BIT(21)
23#define DP_INTR_PLL_UNLOCKED BIT(24)
24#define DP_INTR_AUX_ERROR BIT(27)
25
26#define DP_INTR_READY_FOR_VIDEO BIT(0)
27#define DP_INTR_IDLE_PATTERN_SENT BIT(3)
28#define DP_INTR_FRAME_END BIT(6)
29#define DP_INTR_CRC_UPDATED BIT(9)
30
31#define DP_AUX_CFG_MAX_VALUE_CNT 3
32
33#define DP_HW_VERSION_1_0 0x10000000
34#define DP_HW_VERSION_1_2 0x10020000
35
36/* PHY AUX config registers */
37enum dp_phy_aux_config_type {
38 PHY_AUX_CFG0,
39 PHY_AUX_CFG1,
40 PHY_AUX_CFG2,
41 PHY_AUX_CFG3,
42 PHY_AUX_CFG4,
43 PHY_AUX_CFG5,
44 PHY_AUX_CFG6,
45 PHY_AUX_CFG7,
46 PHY_AUX_CFG8,
47 PHY_AUX_CFG9,
48 PHY_AUX_CFG_MAX,
49};
50
51enum dp_catalog_audio_sdp_type {
52 DP_AUDIO_SDP_STREAM,
53 DP_AUDIO_SDP_TIMESTAMP,
54 DP_AUDIO_SDP_INFOFRAME,
55 DP_AUDIO_SDP_COPYMANAGEMENT,
56 DP_AUDIO_SDP_ISRC,
57 DP_AUDIO_SDP_MAX,
58};
59
60enum dp_catalog_audio_header_type {
61 DP_AUDIO_SDP_HEADER_1,
62 DP_AUDIO_SDP_HEADER_2,
63 DP_AUDIO_SDP_HEADER_3,
64 DP_AUDIO_SDP_HEADER_MAX,
65};
66
67struct dp_catalog {
68 u32 aux_data;
69 u32 total;
70 u32 sync_start;
71 u32 width_blanking;
72 u32 dp_active;
73 enum dp_catalog_audio_sdp_type sdp_type;
74 enum dp_catalog_audio_header_type sdp_header;
75 u32 audio_data;
76 bool wide_bus_en;
77};
78
79/* Debug module */
80void dp_catalog_snapshot(struct dp_catalog *dp_catalog, struct msm_disp_state *disp_state);
81
82/* AUX APIs */
83u32 dp_catalog_aux_read_data(struct dp_catalog *dp_catalog);
84int dp_catalog_aux_write_data(struct dp_catalog *dp_catalog);
85int dp_catalog_aux_write_trans(struct dp_catalog *dp_catalog);
86int dp_catalog_aux_clear_trans(struct dp_catalog *dp_catalog, bool read);
87int dp_catalog_aux_clear_hw_interrupts(struct dp_catalog *dp_catalog);
88void dp_catalog_aux_reset(struct dp_catalog *dp_catalog);
89void dp_catalog_aux_enable(struct dp_catalog *dp_catalog, bool enable);
90int dp_catalog_aux_wait_for_hpd_connect_state(struct dp_catalog *dp_catalog);
91u32 dp_catalog_aux_get_irq(struct dp_catalog *dp_catalog);
92
93/* DP Controller APIs */
94void dp_catalog_ctrl_state_ctrl(struct dp_catalog *dp_catalog, u32 state);
95void dp_catalog_ctrl_config_ctrl(struct dp_catalog *dp_catalog, u32 config);
96void dp_catalog_ctrl_lane_mapping(struct dp_catalog *dp_catalog);
97void dp_catalog_ctrl_mainlink_ctrl(struct dp_catalog *dp_catalog, bool enable);
98void dp_catalog_ctrl_psr_mainlink_enable(struct dp_catalog *dp_catalog, bool enable);
99void dp_catalog_setup_peripheral_flush(struct dp_catalog *dp_catalog);
100void dp_catalog_ctrl_config_misc(struct dp_catalog *dp_catalog, u32 cc, u32 tb);
101void dp_catalog_ctrl_config_msa(struct dp_catalog *dp_catalog, u32 rate,
102 u32 stream_rate_khz, bool fixed_nvid, bool is_ycbcr_420);
103int dp_catalog_ctrl_set_pattern_state_bit(struct dp_catalog *dp_catalog, u32 pattern);
104u32 dp_catalog_hw_revision(const struct dp_catalog *dp_catalog);
105void dp_catalog_ctrl_reset(struct dp_catalog *dp_catalog);
106bool dp_catalog_ctrl_mainlink_ready(struct dp_catalog *dp_catalog);
107void dp_catalog_ctrl_enable_irq(struct dp_catalog *dp_catalog, bool enable);
108void dp_catalog_hpd_config_intr(struct dp_catalog *dp_catalog,
109 u32 intr_mask, bool en);
110void dp_catalog_ctrl_hpd_enable(struct dp_catalog *dp_catalog);
111void dp_catalog_ctrl_hpd_disable(struct dp_catalog *dp_catalog);
112void dp_catalog_ctrl_config_psr(struct dp_catalog *dp_catalog);
113void dp_catalog_ctrl_set_psr(struct dp_catalog *dp_catalog, bool enter);
114u32 dp_catalog_link_is_connected(struct dp_catalog *dp_catalog);
115u32 dp_catalog_hpd_get_intr_status(struct dp_catalog *dp_catalog);
116void dp_catalog_ctrl_phy_reset(struct dp_catalog *dp_catalog);
117int dp_catalog_ctrl_get_interrupt(struct dp_catalog *dp_catalog);
118u32 dp_catalog_ctrl_read_psr_interrupt_status(struct dp_catalog *dp_catalog);
119void dp_catalog_ctrl_update_transfer_unit(struct dp_catalog *dp_catalog,
120 u32 dp_tu, u32 valid_boundary,
121 u32 valid_boundary2);
122void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog *dp_catalog,
123 u32 pattern);
124u32 dp_catalog_ctrl_read_phy_pattern(struct dp_catalog *dp_catalog);
125
126/* DP Panel APIs */
127int dp_catalog_panel_timing_cfg(struct dp_catalog *dp_catalog);
128void dp_catalog_panel_enable_vsc_sdp(struct dp_catalog *dp_catalog, struct dp_sdp *vsc_sdp);
129void dp_catalog_panel_disable_vsc_sdp(struct dp_catalog *dp_catalog);
130void dp_catalog_dump_regs(struct dp_catalog *dp_catalog);
131void dp_catalog_panel_tpg_enable(struct dp_catalog *dp_catalog,
132 struct drm_display_mode *drm_mode);
133void dp_catalog_panel_tpg_disable(struct dp_catalog *dp_catalog);
134
135struct dp_catalog *dp_catalog_get(struct device *dev);
136
137/* DP Audio APIs */
138void dp_catalog_audio_get_header(struct dp_catalog *catalog);
139void dp_catalog_audio_set_header(struct dp_catalog *catalog);
140void dp_catalog_audio_config_acr(struct dp_catalog *catalog);
141void dp_catalog_audio_enable(struct dp_catalog *catalog);
142void dp_catalog_audio_config_sdp(struct dp_catalog *catalog);
143void dp_catalog_audio_init(struct dp_catalog *catalog);
144void dp_catalog_audio_sfe_level(struct dp_catalog *catalog);
145
146#endif /* _DP_CATALOG_H_ */
147

source code of linux/drivers/gpu/drm/msm/dp/dp_catalog.h