| 1 | // SPDX-License-Identifier: GPL-2.0-only |
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| 2 | /* |
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| 3 | * Copyright (C) 2013 Red Hat |
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| 4 | * Author: Rob Clark <robdclark@gmail.com> |
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| 5 | */ |
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| 6 | |
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| 7 | #include "hdmi.h" |
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| 8 | |
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| 9 | static void hdmi_phy_8960_powerup(struct hdmi_phy *phy, |
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| 10 | unsigned long int pixclock) |
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| 11 | { |
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| 12 | DBG("pixclock: %lu" , pixclock); |
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| 13 | |
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| 14 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, data: 0x00); |
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| 15 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG0, data: 0x1b); |
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| 16 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG1, data: 0xf2); |
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| 17 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG4, data: 0x00); |
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| 18 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG5, data: 0x00); |
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| 19 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG6, data: 0x00); |
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| 20 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG7, data: 0x00); |
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| 21 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG8, data: 0x00); |
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| 22 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG9, data: 0x00); |
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| 23 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG10, data: 0x00); |
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| 24 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG11, data: 0x00); |
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| 25 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG3, data: 0x20); |
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| 26 | } |
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| 27 | |
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| 28 | static void hdmi_phy_8960_powerdown(struct hdmi_phy *phy) |
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| 29 | { |
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| 30 | DBG("" ); |
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| 31 | |
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| 32 | hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, data: 0x7f); |
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| 33 | } |
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| 34 | |
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| 35 | static const char * const hdmi_phy_8960_reg_names[] = { |
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| 36 | "core-vdda" , |
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| 37 | }; |
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| 38 | |
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| 39 | static const char * const hdmi_phy_8960_clk_names[] = { |
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| 40 | "slave_iface" , |
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| 41 | }; |
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| 42 | |
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| 43 | const struct hdmi_phy_cfg msm_hdmi_phy_8960_cfg = { |
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| 44 | .type = MSM_HDMI_PHY_8960, |
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| 45 | .powerup = hdmi_phy_8960_powerup, |
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| 46 | .powerdown = hdmi_phy_8960_powerdown, |
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| 47 | .reg_names = hdmi_phy_8960_reg_names, |
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| 48 | .num_regs = ARRAY_SIZE(hdmi_phy_8960_reg_names), |
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| 49 | .clk_names = hdmi_phy_8960_clk_names, |
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| 50 | .num_clks = ARRAY_SIZE(hdmi_phy_8960_clk_names), |
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| 51 | }; |
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| 52 | |
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