1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2017 Free Electrons
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 */
6
7#ifndef _SUN4I_FRONTEND_H_
8#define _SUN4I_FRONTEND_H_
9
10#include <linux/list.h>
11#include <linux/mod_devicetable.h>
12
13#define SUN4I_FRONTEND_EN_REG 0x000
14#define SUN4I_FRONTEND_EN_EN BIT(0)
15
16#define SUN4I_FRONTEND_FRM_CTRL_REG 0x004
17#define SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL BIT(23)
18#define SUN4I_FRONTEND_FRM_CTRL_FRM_START BIT(16)
19#define SUN4I_FRONTEND_FRM_CTRL_COEF_RDY BIT(1)
20#define SUN4I_FRONTEND_FRM_CTRL_REG_RDY BIT(0)
21
22#define SUN4I_FRONTEND_BYPASS_REG 0x008
23#define SUN4I_FRONTEND_BYPASS_CSC_EN BIT(1)
24
25#define SUN4I_FRONTEND_BUF_ADDR0_REG 0x020
26#define SUN4I_FRONTEND_BUF_ADDR1_REG 0x024
27#define SUN4I_FRONTEND_BUF_ADDR2_REG 0x028
28
29#define SUN4I_FRONTEND_TB_OFF0_REG 0x030
30#define SUN4I_FRONTEND_TB_OFF1_REG 0x034
31#define SUN4I_FRONTEND_TB_OFF2_REG 0x038
32#define SUN4I_FRONTEND_TB_OFF_X1(x1) ((x1) << 16)
33#define SUN4I_FRONTEND_TB_OFF_Y0(y0) ((y0) << 8)
34#define SUN4I_FRONTEND_TB_OFF_X0(x0) (x0)
35
36#define SUN4I_FRONTEND_LINESTRD0_REG 0x040
37#define SUN4I_FRONTEND_LINESTRD1_REG 0x044
38#define SUN4I_FRONTEND_LINESTRD2_REG 0x048
39
40/*
41 * In tiled mode, the stride is defined as the distance between the start of the
42 * end line of the current tile and the start of the first line in the next
43 * vertical tile.
44 *
45 * Tiles are represented in row-major order, thus the end line of current tile
46 * starts at: 31 * 32 (31 lines of 32 cols), the next vertical tile starts at:
47 * 32-bit-aligned-width * 32 and the distance is:
48 * 32 * (32-bit-aligned-width - 31).
49 */
50#define SUN4I_FRONTEND_LINESTRD_TILED(stride) (((stride) - 31) * 32)
51
52#define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c
53#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR (0 << 8)
54#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED (1 << 8)
55#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR (2 << 8)
56#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_MB32_PLANAR (4 << 8)
57#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_MB32_SEMIPLANAR (6 << 8)
58#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV444 (0 << 4)
59#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422 (1 << 4)
60#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420 (2 << 4)
61#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV411 (3 << 4)
62#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB (5 << 4)
63#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UYVY 0
64#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YUYV 1
65#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VYUY 2
66#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YVYU 3
67#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UV 0
68#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VU 1
69#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX 0
70#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_XRGB 1
71
72#define SUN4I_FRONTEND_OUTPUT_FMT_REG 0x05c
73#define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT_BGRX8888 1
74#define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT_XRGB8888 2
75
76#define SUN4I_FRONTEND_CSC_COEF_REG(c) (0x070 + (0x4 * (c)))
77
78#define SUN4I_FRONTEND_CH0_INSIZE_REG 0x100
79#define SUN4I_FRONTEND_INSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1)))
80
81#define SUN4I_FRONTEND_CH0_OUTSIZE_REG 0x104
82#define SUN4I_FRONTEND_OUTSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1)))
83
84#define SUN4I_FRONTEND_CH0_HORZFACT_REG 0x108
85#define SUN4I_FRONTEND_HORZFACT(i, f) (((i) << 16) | (f))
86
87#define SUN4I_FRONTEND_CH0_VERTFACT_REG 0x10c
88#define SUN4I_FRONTEND_VERTFACT(i, f) (((i) << 16) | (f))
89
90#define SUN4I_FRONTEND_CH0_HORZPHASE_REG 0x110
91#define SUN4I_FRONTEND_CH0_VERTPHASE0_REG 0x114
92#define SUN4I_FRONTEND_CH0_VERTPHASE1_REG 0x118
93
94#define SUN4I_FRONTEND_CH1_INSIZE_REG 0x200
95#define SUN4I_FRONTEND_CH1_OUTSIZE_REG 0x204
96#define SUN4I_FRONTEND_CH1_HORZFACT_REG 0x208
97#define SUN4I_FRONTEND_CH1_VERTFACT_REG 0x20c
98
99#define SUN4I_FRONTEND_CH1_HORZPHASE_REG 0x210
100#define SUN4I_FRONTEND_CH1_VERTPHASE0_REG 0x214
101#define SUN4I_FRONTEND_CH1_VERTPHASE1_REG 0x218
102
103#define SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i) (0x400 + i * 4)
104#define SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i) (0x480 + i * 4)
105#define SUN4I_FRONTEND_CH0_VERTCOEF_REG(i) (0x500 + i * 4)
106#define SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i) (0x600 + i * 4)
107#define SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i) (0x680 + i * 4)
108#define SUN4I_FRONTEND_CH1_VERTCOEF_REG(i) (0x700 + i * 4)
109
110struct clk;
111struct device_node;
112struct drm_plane;
113struct regmap;
114struct reset_control;
115
116struct sun4i_frontend_data {
117 bool has_coef_access_ctrl;
118 bool has_coef_rdy;
119 u32 ch_phase[2];
120};
121
122struct sun4i_frontend {
123 struct list_head list;
124 struct device *dev;
125 struct device_node *node;
126
127 struct clk *bus_clk;
128 struct clk *mod_clk;
129 struct clk *ram_clk;
130 struct regmap *regs;
131 struct reset_control *reset;
132
133 const struct sun4i_frontend_data *data;
134};
135
136extern const struct of_device_id sun4i_frontend_of_table[];
137extern const u32 sunxi_bt601_yuv2rgb_coef[12];
138
139int sun4i_frontend_init(struct sun4i_frontend *frontend);
140void sun4i_frontend_exit(struct sun4i_frontend *frontend);
141int sun4i_frontend_enable(struct sun4i_frontend *frontend);
142
143void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend,
144 struct drm_plane *plane);
145void sun4i_frontend_update_coord(struct sun4i_frontend *frontend,
146 struct drm_plane *plane);
147int sun4i_frontend_update_formats(struct sun4i_frontend *frontend,
148 struct drm_plane *plane, uint32_t out_fmt);
149bool sun4i_frontend_format_is_supported(uint32_t fmt, uint64_t modifier);
150
151#endif /* _SUN4I_FRONTEND_H_ */
152

source code of linux/drivers/gpu/drm/sun4i/sun4i_frontend.h