1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Tegra host1x Command DMA
4 *
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
6 */
7
8#ifndef __HOST1X_CDMA_H
9#define __HOST1X_CDMA_H
10
11#include <linux/sched.h>
12#include <linux/completion.h>
13#include <linux/list.h>
14#include <linux/workqueue.h>
15
16struct host1x_syncpt;
17struct host1x_userctx_timeout;
18struct host1x_job;
19
20/*
21 * cdma
22 *
23 * This is in charge of a host command DMA channel.
24 * Sends ops to a push buffer, and takes responsibility for unpinning
25 * (& possibly freeing) of memory after those ops have completed.
26 * Producer:
27 * begin
28 * push - send ops to the push buffer
29 * end - start command DMA and enqueue handles to be unpinned
30 * Consumer:
31 * update - call to update sync queue and push buffer, unpin memory
32 */
33
34struct push_buffer {
35 void *mapped; /* mapped pushbuffer memory */
36 dma_addr_t dma; /* device address of pushbuffer */
37 dma_addr_t phys; /* physical address of pushbuffer */
38 u32 fence; /* index we've written */
39 u32 pos; /* index to write to */
40 u32 size;
41 u32 alloc_size;
42};
43
44struct buffer_timeout {
45 struct delayed_work wq; /* work queue */
46 bool initialized; /* timer one-time setup flag */
47 struct host1x_syncpt *syncpt; /* buffer completion syncpt */
48 u32 syncpt_val; /* syncpt value when completed */
49 ktime_t start_ktime; /* starting time */
50 /* context timeout information */
51 struct host1x_client *client;
52};
53
54enum cdma_event {
55 CDMA_EVENT_NONE, /* not waiting for any event */
56 CDMA_EVENT_SYNC_QUEUE_EMPTY, /* wait for empty sync queue */
57 CDMA_EVENT_PUSH_BUFFER_SPACE /* wait for space in push buffer */
58};
59
60struct host1x_cdma {
61 struct mutex lock; /* controls access to shared state */
62 struct completion complete; /* signalled when event occurs */
63 enum cdma_event event; /* event that complete is waiting for */
64 unsigned int slots_used; /* pb slots used in current submit */
65 unsigned int slots_free; /* pb slots free in current submit */
66 unsigned int first_get; /* DMAGET value, where submit begins */
67 unsigned int last_pos; /* last value written to DMAPUT */
68 struct push_buffer push_buffer; /* channel's push buffer */
69 struct list_head sync_queue; /* job queue */
70 struct buffer_timeout timeout; /* channel's timeout state/wq */
71 bool running;
72 bool torndown;
73 struct work_struct update_work;
74};
75
76#define cdma_to_channel(cdma) container_of(cdma, struct host1x_channel, cdma)
77#define cdma_to_host1x(cdma) dev_get_drvdata(cdma_to_channel(cdma)->dev->parent)
78#define pb_to_cdma(pb) container_of(pb, struct host1x_cdma, push_buffer)
79
80int host1x_cdma_init(struct host1x_cdma *cdma);
81int host1x_cdma_deinit(struct host1x_cdma *cdma);
82int host1x_cdma_begin(struct host1x_cdma *cdma, struct host1x_job *job);
83void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2);
84void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2,
85 u32 op3, u32 op4);
86void host1x_cdma_end(struct host1x_cdma *cdma, struct host1x_job *job);
87void host1x_cdma_update(struct host1x_cdma *cdma);
88void host1x_cdma_peek(struct host1x_cdma *cdma, u32 dmaget, int slot,
89 u32 *out);
90unsigned int host1x_cdma_wait_locked(struct host1x_cdma *cdma,
91 enum cdma_event event);
92void host1x_cdma_update_sync_queue(struct host1x_cdma *cdma,
93 struct device *dev);
94#endif
95

source code of linux/drivers/gpu/host1x/cdma.h