| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Arm v8 Self-Hosted trace support. |
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| 4 | * |
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| 5 | * Copyright (C) 2021 ARM Ltd. |
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| 6 | */ |
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| 7 | |
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| 8 | #ifndef __CORESIGHT_SELF_HOSTED_TRACE_H |
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| 9 | #define __CORESIGHT_SELF_HOSTED_TRACE_H |
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| 10 | |
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| 11 | #include <asm/sysreg.h> |
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| 12 | |
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| 13 | static inline u64 read_trfcr(void) |
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| 14 | { |
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| 15 | return read_sysreg_s(SYS_TRFCR_EL1); |
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| 16 | } |
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| 17 | |
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| 18 | static inline void write_trfcr(u64 val) |
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| 19 | { |
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| 20 | write_sysreg_s(val, SYS_TRFCR_EL1); |
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| 21 | isb(); |
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| 22 | } |
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| 23 | |
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| 24 | static inline u64 cpu_prohibit_trace(void) |
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| 25 | { |
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| 26 | u64 trfcr = read_trfcr(); |
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| 27 | |
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| 28 | /* Prohibit tracing at EL0 & the kernel EL */ |
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| 29 | write_trfcr(trfcr & ~(TRFCR_ELx_ExTRE | TRFCR_ELx_E0TRE)); |
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| 30 | /* Return the original value of the TRFCR */ |
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| 31 | return trfcr; |
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| 32 | } |
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| 33 | #endif /* __CORESIGHT_SELF_HOSTED_TRACE_H */ |
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| 34 | |
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