1 | /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ |
2 | /* |
3 | * Copyright(c) 2015, 2016 Intel Corporation. |
4 | */ |
5 | /* QSFP support common definitions, for hfi driver */ |
6 | |
7 | #define QSFP_DEV 0xA0 |
8 | #define QSFP_PWR_LAG_MSEC 2000 |
9 | #define QSFP_MODPRS_LAG_MSEC 20 |
10 | /* 128 byte pages, per SFF 8636 rev 2.4 */ |
11 | #define QSFP_MAX_NUM_PAGES 5 |
12 | |
13 | /* |
14 | * Below are masks for QSFP pins. Pins are the same for HFI0 and HFI1. |
15 | * _N means asserted low |
16 | */ |
17 | #define QSFP_HFI0_I2CCLK BIT(0) |
18 | #define QSFP_HFI0_I2CDAT BIT(1) |
19 | #define QSFP_HFI0_RESET_N BIT(2) |
20 | #define QSFP_HFI0_INT_N BIT(3) |
21 | #define QSFP_HFI0_MODPRST_N BIT(4) |
22 | |
23 | /* QSFP is paged at 256 bytes */ |
24 | #define QSFP_PAGESIZE 256 |
25 | /* Reads/writes cannot cross 128 byte boundaries */ |
26 | #define QSFP_RW_BOUNDARY 128 |
27 | |
28 | /* number of bytes in i2c offset for QSFP devices */ |
29 | #define __QSFP_OFFSET_SIZE 1 /* num address bytes */ |
30 | #define QSFP_OFFSET_SIZE (__QSFP_OFFSET_SIZE << 8) /* shifted value */ |
31 | |
32 | /* Defined fields that Intel requires of qualified cables */ |
33 | /* Byte 0 is Identifier, not checked */ |
34 | /* Byte 1 is reserved "status MSB" */ |
35 | #define QSFP_MONITOR_VAL_START 22 |
36 | #define QSFP_MONITOR_VAL_END 81 |
37 | #define QSFP_MONITOR_RANGE (QSFP_MONITOR_VAL_END - QSFP_MONITOR_VAL_START + 1) |
38 | #define QSFP_TX_CTRL_BYTE_OFFS 86 |
39 | #define QSFP_PWR_CTRL_BYTE_OFFS 93 |
40 | #define QSFP_CDR_CTRL_BYTE_OFFS 98 |
41 | |
42 | #define QSFP_PAGE_SELECT_BYTE_OFFS 127 |
43 | /* Byte 128 is Identifier: must be 0x0c for QSFP, or 0x0d for QSFP+ */ |
44 | #define QSFP_MOD_ID_OFFS 128 |
45 | /* |
46 | * Byte 129 is "Extended Identifier". |
47 | * For bits [7:6]: 0:1.5W, 1:2.0W, 2:2.5W, 3:3.5W |
48 | * For bits [1:0]: 0:Unused, 1:4W, 2:4.5W, 3:5W |
49 | */ |
50 | #define QSFP_MOD_PWR_OFFS 129 |
51 | /* Byte 130 is Connector type. Not Intel req'd */ |
52 | /* Bytes 131..138 are Transceiver types, bit maps for various tech, none IB */ |
53 | /* Byte 139 is encoding. code 0x01 is 8b10b. Not Intel req'd */ |
54 | /* byte 140 is nominal bit-rate, in units of 100Mbits/sec */ |
55 | #define QSFP_NOM_BIT_RATE_100_OFFS 140 |
56 | /* Byte 141 is Extended Rate Select. Not Intel req'd */ |
57 | /* Bytes 142..145 are lengths for various fiber types. Not Intel req'd */ |
58 | /* Byte 146 is length for Copper. Units of 1 meter */ |
59 | #define QSFP_MOD_LEN_OFFS 146 |
60 | /* |
61 | * Byte 147 is Device technology. D0..3 not Intel req'd |
62 | * D4..7 select from 15 choices, translated by table: |
63 | */ |
64 | #define QSFP_MOD_TECH_OFFS 147 |
65 | extern const char *const hfi1_qsfp_devtech[16]; |
66 | /* Active Equalization includes fiber, copper full EQ, and copper near Eq */ |
67 | #define QSFP_IS_ACTIVE(tech) ((0xA2FF >> ((tech) >> 4)) & 1) |
68 | /* Active Equalization includes fiber, copper full EQ, and copper far Eq */ |
69 | #define QSFP_IS_ACTIVE_FAR(tech) ((0x32FF >> ((tech) >> 4)) & 1) |
70 | /* Attenuation should be valid for copper other than full/near Eq */ |
71 | #define QSFP_HAS_ATTEN(tech) ((0x4D00 >> ((tech) >> 4)) & 1) |
72 | /* Length is only valid if technology is "copper" */ |
73 | #define QSFP_IS_CU(tech) ((0xED00 >> ((tech) >> 4)) & 1) |
74 | #define QSFP_TECH_1490 9 |
75 | |
76 | #define QSFP_OUI(oui) (((unsigned)oui[0] << 16) | ((unsigned)oui[1] << 8) | \ |
77 | oui[2]) |
78 | #define QSFP_OUI_AMPHENOL 0x415048 |
79 | #define QSFP_OUI_FINISAR 0x009065 |
80 | #define QSFP_OUI_GORE 0x002177 |
81 | |
82 | /* Bytes 148..163 are Vendor Name, Left-justified Blank-filled */ |
83 | #define QSFP_VEND_OFFS 148 |
84 | #define QSFP_VEND_LEN 16 |
85 | /* Byte 164 is IB Extended transceiver codes Bits D0..3 are SDR,DDR,QDR,EDR */ |
86 | #define QSFP_IBXCV_OFFS 164 |
87 | /* Bytes 165..167 are Vendor OUI number */ |
88 | #define QSFP_VOUI_OFFS 165 |
89 | #define QSFP_VOUI_LEN 3 |
90 | /* Bytes 168..183 are Vendor Part Number, string */ |
91 | #define QSFP_PN_OFFS 168 |
92 | #define QSFP_PN_LEN 16 |
93 | /* Bytes 184,185 are Vendor Rev. Left Justified, Blank-filled */ |
94 | #define QSFP_REV_OFFS 184 |
95 | #define QSFP_REV_LEN 2 |
96 | /* |
97 | * Bytes 186,187 are Wavelength, if Optical. Not Intel req'd |
98 | * If copper, they are attenuation in dB: |
99 | * Byte 186 is at 2.5Gb/sec (SDR), Byte 187 at 5.0Gb/sec (DDR) |
100 | */ |
101 | #define QSFP_ATTEN_OFFS 186 |
102 | #define QSFP_ATTEN_LEN 2 |
103 | /* |
104 | * Bytes 188,189 are Wavelength tolerance, if optical |
105 | * If copper, they are attenuation in dB: |
106 | * Byte 188 is at 12.5 Gb/s, Byte 189 at 25 Gb/s |
107 | */ |
108 | #define QSFP_CU_ATTEN_7G_OFFS 188 |
109 | #define QSFP_CU_ATTEN_12G_OFFS 189 |
110 | /* Byte 190 is Max Case Temp. Not Intel req'd */ |
111 | /* Byte 191 is LSB of sum of bytes 128..190. Not Intel req'd */ |
112 | #define QSFP_CC_OFFS 191 |
113 | #define QSFP_EQ_INFO_OFFS 193 |
114 | #define QSFP_CDR_INFO_OFFS 194 |
115 | /* Bytes 196..211 are Serial Number, String */ |
116 | #define QSFP_SN_OFFS 196 |
117 | #define QSFP_SN_LEN 16 |
118 | /* Bytes 212..219 are date-code YYMMDD (MM==1 for Jan) */ |
119 | #define QSFP_DATE_OFFS 212 |
120 | #define QSFP_DATE_LEN 6 |
121 | /* Bytes 218,219 are optional lot-code, string */ |
122 | #define QSFP_LOT_OFFS 218 |
123 | #define QSFP_LOT_LEN 2 |
124 | /* Bytes 220, 221 indicate monitoring options, Not Intel req'd */ |
125 | /* Byte 222 indicates nominal bitrate in units of 250Mbits/sec */ |
126 | #define QSFP_NOM_BIT_RATE_250_OFFS 222 |
127 | /* Byte 223 is LSB of sum of bytes 192..222 */ |
128 | #define QSFP_CC_EXT_OFFS 223 |
129 | |
130 | /* |
131 | * Interrupt flag masks |
132 | */ |
133 | #define QSFP_DATA_NOT_READY 0x01 |
134 | |
135 | #define QSFP_HIGH_TEMP_ALARM 0x80 |
136 | #define QSFP_LOW_TEMP_ALARM 0x40 |
137 | #define QSFP_HIGH_TEMP_WARNING 0x20 |
138 | #define QSFP_LOW_TEMP_WARNING 0x10 |
139 | |
140 | #define QSFP_HIGH_VCC_ALARM 0x80 |
141 | #define QSFP_LOW_VCC_ALARM 0x40 |
142 | #define QSFP_HIGH_VCC_WARNING 0x20 |
143 | #define QSFP_LOW_VCC_WARNING 0x10 |
144 | |
145 | #define QSFP_HIGH_POWER_ALARM 0x88 |
146 | #define QSFP_LOW_POWER_ALARM 0x44 |
147 | #define QSFP_HIGH_POWER_WARNING 0x22 |
148 | #define QSFP_LOW_POWER_WARNING 0x11 |
149 | |
150 | #define QSFP_HIGH_BIAS_ALARM 0x88 |
151 | #define QSFP_LOW_BIAS_ALARM 0x44 |
152 | #define QSFP_HIGH_BIAS_WARNING 0x22 |
153 | #define QSFP_LOW_BIAS_WARNING 0x11 |
154 | |
155 | #define QSFP_ATTEN_SDR(attenarray) (attenarray[0]) |
156 | #define QSFP_ATTEN_DDR(attenarray) (attenarray[1]) |
157 | |
158 | /* |
159 | * struct qsfp_data encapsulates state of QSFP device for one port. |
160 | * it will be part of port-specific data if a board supports QSFP. |
161 | * |
162 | * Since multiple board-types use QSFP, and their pport_data structs |
163 | * differ (in the chip-specific section), we need a pointer to its head. |
164 | * |
165 | * Avoiding premature optimization, we will have one work_struct per port, |
166 | * and let the qsfp_lock arbitrate access to common resources. |
167 | * |
168 | */ |
169 | struct qsfp_data { |
170 | /* Helps to find our way */ |
171 | struct hfi1_pportdata *ppd; |
172 | struct work_struct qsfp_work; |
173 | u8 cache[QSFP_MAX_NUM_PAGES * 128]; |
174 | /* protect qsfp data */ |
175 | spinlock_t qsfp_lock; |
176 | u8 check_interrupt_flags; |
177 | u8 reset_needed; |
178 | u8 limiting_active; |
179 | u8 cache_valid; |
180 | u8 cache_refresh_required; |
181 | }; |
182 | |
183 | int refresh_qsfp_cache(struct hfi1_pportdata *ppd, |
184 | struct qsfp_data *cp); |
185 | int get_qsfp_power_class(u8 power_byte); |
186 | int qsfp_mod_present(struct hfi1_pportdata *ppd); |
187 | int get_cable_info(struct hfi1_devdata *dd, u32 port_num, u32 addr, |
188 | u32 len, u8 *data); |
189 | |
190 | int i2c_write(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, |
191 | int offset, void *bp, int len); |
192 | int i2c_read(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, |
193 | int offset, void *bp, int len); |
194 | int qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, |
195 | int len); |
196 | int qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, |
197 | int len); |
198 | int one_qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, |
199 | int len); |
200 | int one_qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, |
201 | int len); |
202 | struct hfi1_asic_data; |
203 | int set_up_i2c(struct hfi1_devdata *dd, struct hfi1_asic_data *ad); |
204 | void clean_up_i2c(struct hfi1_devdata *dd, struct hfi1_asic_data *ad); |
205 | |