1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * Copyright (c) 2021, Linaro Ltd. |
4 | */ |
5 | |
6 | #ifndef __DRIVERS_INTERCONNECT_QCOM_SDX55_H |
7 | #define __DRIVERS_INTERCONNECT_QCOM_SDX55_H |
8 | |
9 | /* 0 was used by MASTER_IPA_CORE, now represented as RPMh clock */ |
10 | #define SDX55_MASTER_LLCC 1 |
11 | #define SDX55_MASTER_TCU_0 2 |
12 | #define SDX55_MASTER_SNOC_GC_MEM_NOC 3 |
13 | #define SDX55_MASTER_AMPSS_M0 4 |
14 | #define SDX55_MASTER_AUDIO 5 |
15 | #define SDX55_MASTER_BLSP_1 6 |
16 | #define SDX55_MASTER_QDSS_BAM 7 |
17 | #define SDX55_MASTER_QPIC 8 |
18 | #define SDX55_MASTER_SNOC_CFG 9 |
19 | #define SDX55_MASTER_SPMI_FETCHER 10 |
20 | #define SDX55_MASTER_ANOC_SNOC 11 |
21 | #define SDX55_MASTER_IPA 12 |
22 | #define SDX55_MASTER_MEM_NOC_SNOC 13 |
23 | #define SDX55_MASTER_MEM_NOC_PCIE_SNOC 14 |
24 | #define SDX55_MASTER_CRYPTO_CORE_0 15 |
25 | #define SDX55_MASTER_EMAC 16 |
26 | #define SDX55_MASTER_IPA_PCIE 17 |
27 | #define SDX55_MASTER_PCIE 18 |
28 | #define SDX55_MASTER_QDSS_ETR 19 |
29 | #define SDX55_MASTER_SDCC_1 20 |
30 | #define SDX55_MASTER_USB3 21 |
31 | /* 22 was used by SLAVE_IPA_CORE, now represented as RPMh clock */ |
32 | #define SDX55_SLAVE_EBI_CH0 23 |
33 | #define SDX55_SLAVE_LLCC 24 |
34 | #define SDX55_SLAVE_MEM_NOC_SNOC 25 |
35 | #define SDX55_SLAVE_MEM_NOC_PCIE_SNOC 26 |
36 | #define SDX55_SLAVE_ANOC_SNOC 27 |
37 | #define SDX55_SLAVE_SNOC_CFG 28 |
38 | #define SDX55_SLAVE_EMAC_CFG 29 |
39 | #define SDX55_SLAVE_USB3 30 |
40 | #define SDX55_SLAVE_TLMM 31 |
41 | #define SDX55_SLAVE_SPMI_FETCHER 32 |
42 | #define SDX55_SLAVE_QDSS_CFG 33 |
43 | #define SDX55_SLAVE_PDM 34 |
44 | #define SDX55_SLAVE_SNOC_MEM_NOC_GC 35 |
45 | #define SDX55_SLAVE_TCSR 36 |
46 | #define 37 |
47 | #define SDX55_SLAVE_SPMI_VGI_COEX 38 |
48 | #define SDX55_SLAVE_QPIC 39 |
49 | #define SDX55_SLAVE_OCIMEM 40 |
50 | #define SDX55_SLAVE_IPA_CFG 41 |
51 | #define SDX55_SLAVE_USB3_PHY_CFG 42 |
52 | #define SDX55_SLAVE_AOP 43 |
53 | #define SDX55_SLAVE_BLSP_1 44 |
54 | #define SDX55_SLAVE_SDCC_1 45 |
55 | #define SDX55_SLAVE_CNOC_MSS 46 |
56 | #define SDX55_SLAVE_PCIE_PARF 47 |
57 | #define SDX55_SLAVE_ECC_CFG 48 |
58 | #define SDX55_SLAVE_AUDIO 49 |
59 | #define SDX55_SLAVE_AOSS 51 |
60 | #define SDX55_SLAVE_PRNG 52 |
61 | #define SDX55_SLAVE_CRYPTO_0_CFG 53 |
62 | #define SDX55_SLAVE_TCU 54 |
63 | #define SDX55_SLAVE_CLK_CTL 55 |
64 | #define SDX55_SLAVE_IMEM_CFG 56 |
65 | #define SDX55_SLAVE_SERVICE_SNOC 57 |
66 | #define SDX55_SLAVE_PCIE_0 58 |
67 | #define SDX55_SLAVE_QDSS_STM 59 |
68 | #define SDX55_SLAVE_APPSS 60 |
69 | |
70 | #endif |
71 | |