1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // Copyright (c) 2019 Intel Corporation. |
3 | |
4 | #include <asm/unaligned.h> |
5 | #include <linux/acpi.h> |
6 | #include <linux/delay.h> |
7 | #include <linux/i2c.h> |
8 | #include <linux/module.h> |
9 | #include <linux/pm_runtime.h> |
10 | #include <media/v4l2-ctrls.h> |
11 | #include <media/v4l2-device.h> |
12 | #include <media/v4l2-fwnode.h> |
13 | |
14 | #define HI556_REG_VALUE_08BIT 1 |
15 | #define HI556_REG_VALUE_16BIT 2 |
16 | #define HI556_REG_VALUE_24BIT 3 |
17 | |
18 | #define HI556_LINK_FREQ_437MHZ 437000000ULL |
19 | #define HI556_MCLK 19200000 |
20 | #define HI556_DATA_LANES 2 |
21 | #define HI556_RGB_DEPTH 10 |
22 | |
23 | #define HI556_REG_CHIP_ID 0x0f16 |
24 | #define HI556_CHIP_ID 0x0556 |
25 | |
26 | #define HI556_REG_MODE_SELECT 0x0a00 |
27 | #define HI556_MODE_STANDBY 0x0000 |
28 | #define HI556_MODE_STREAMING 0x0100 |
29 | |
30 | /* vertical-timings from sensor */ |
31 | #define HI556_REG_FLL 0x0006 |
32 | #define HI556_FLL_30FPS 0x0814 |
33 | #define HI556_FLL_30FPS_MIN 0x0814 |
34 | #define HI556_FLL_MAX 0x7fff |
35 | |
36 | /* horizontal-timings from sensor */ |
37 | #define HI556_REG_LLP 0x0008 |
38 | |
39 | /* Exposure controls from sensor */ |
40 | #define HI556_REG_EXPOSURE 0x0074 |
41 | #define HI556_EXPOSURE_MIN 6 |
42 | #define HI556_EXPOSURE_MAX_MARGIN 2 |
43 | #define HI556_EXPOSURE_STEP 1 |
44 | |
45 | /* Analog gain controls from sensor */ |
46 | #define HI556_REG_ANALOG_GAIN 0x0077 |
47 | #define HI556_ANAL_GAIN_MIN 0 |
48 | #define HI556_ANAL_GAIN_MAX 240 |
49 | #define HI556_ANAL_GAIN_STEP 1 |
50 | |
51 | /* Digital gain controls from sensor */ |
52 | #define HI556_REG_MWB_GR_GAIN 0x0078 |
53 | #define HI556_REG_MWB_GB_GAIN 0x007a |
54 | #define HI556_REG_MWB_R_GAIN 0x007c |
55 | #define HI556_REG_MWB_B_GAIN 0x007e |
56 | #define HI556_DGTL_GAIN_MIN 0 |
57 | #define HI556_DGTL_GAIN_MAX 2048 |
58 | #define HI556_DGTL_GAIN_STEP 1 |
59 | #define HI556_DGTL_GAIN_DEFAULT 256 |
60 | |
61 | /* Test Pattern Control */ |
62 | #define HI556_REG_ISP 0X0a05 |
63 | #define HI556_REG_ISP_TPG_EN 0x01 |
64 | #define HI556_REG_TEST_PATTERN 0x0201 |
65 | |
66 | /* HI556 native and active pixel array size. */ |
67 | #define HI556_NATIVE_WIDTH 2592U |
68 | #define HI556_NATIVE_HEIGHT 1944U |
69 | #define HI556_PIXEL_ARRAY_LEFT 0U |
70 | #define HI556_PIXEL_ARRAY_TOP 0U |
71 | #define HI556_PIXEL_ARRAY_WIDTH 2592U |
72 | #define HI556_PIXEL_ARRAY_HEIGHT 1944U |
73 | |
74 | enum { |
75 | HI556_LINK_FREQ_437MHZ_INDEX, |
76 | }; |
77 | |
78 | struct hi556_reg { |
79 | u16 address; |
80 | u16 val; |
81 | }; |
82 | |
83 | struct hi556_reg_list { |
84 | u32 num_of_regs; |
85 | const struct hi556_reg *regs; |
86 | }; |
87 | |
88 | struct hi556_link_freq_config { |
89 | const struct hi556_reg_list reg_list; |
90 | }; |
91 | |
92 | struct hi556_mode { |
93 | /* Frame width in pixels */ |
94 | u32 width; |
95 | |
96 | /* Frame height in pixels */ |
97 | u32 height; |
98 | |
99 | /* Analog crop rectangle. */ |
100 | struct v4l2_rect crop; |
101 | |
102 | /* Horizontal timining size */ |
103 | u32 llp; |
104 | |
105 | /* Default vertical timining size */ |
106 | u32 fll_def; |
107 | |
108 | /* Min vertical timining size */ |
109 | u32 fll_min; |
110 | |
111 | /* Link frequency needed for this resolution */ |
112 | u32 link_freq_index; |
113 | |
114 | /* Sensor register settings for this resolution */ |
115 | const struct hi556_reg_list reg_list; |
116 | }; |
117 | |
118 | #define to_hi556(_sd) container_of(_sd, struct hi556, sd) |
119 | |
120 | //SENSOR_INITIALIZATION |
121 | static const struct hi556_reg mipi_data_rate_874mbps[] = { |
122 | {0x0e00, 0x0102}, |
123 | {0x0e02, 0x0102}, |
124 | {0x0e0c, 0x0100}, |
125 | {0x2000, 0x7400}, |
126 | {0x2002, 0x001c}, |
127 | {0x2004, 0x0242}, |
128 | {0x2006, 0x0942}, |
129 | {0x2008, 0x7007}, |
130 | {0x200a, 0x0fd9}, |
131 | {0x200c, 0x0259}, |
132 | {0x200e, 0x7008}, |
133 | {0x2010, 0x160e}, |
134 | {0x2012, 0x0047}, |
135 | {0x2014, 0x2118}, |
136 | {0x2016, 0x0041}, |
137 | {0x2018, 0x00d8}, |
138 | {0x201a, 0x0145}, |
139 | {0x201c, 0x0006}, |
140 | {0x201e, 0x0181}, |
141 | {0x2020, 0x13cc}, |
142 | {0x2022, 0x2057}, |
143 | {0x2024, 0x7001}, |
144 | {0x2026, 0x0fca}, |
145 | {0x2028, 0x00cb}, |
146 | {0x202a, 0x009f}, |
147 | {0x202c, 0x7002}, |
148 | {0x202e, 0x13cc}, |
149 | {0x2030, 0x019b}, |
150 | {0x2032, 0x014d}, |
151 | {0x2034, 0x2987}, |
152 | {0x2036, 0x2766}, |
153 | {0x2038, 0x0020}, |
154 | {0x203a, 0x2060}, |
155 | {0x203c, 0x0e5d}, |
156 | {0x203e, 0x181d}, |
157 | {0x2040, 0x2066}, |
158 | {0x2042, 0x20c4}, |
159 | {0x2044, 0x5000}, |
160 | {0x2046, 0x0005}, |
161 | {0x2048, 0x0000}, |
162 | {0x204a, 0x01db}, |
163 | {0x204c, 0x025a}, |
164 | {0x204e, 0x00c0}, |
165 | {0x2050, 0x0005}, |
166 | {0x2052, 0x0006}, |
167 | {0x2054, 0x0ad9}, |
168 | {0x2056, 0x0259}, |
169 | {0x2058, 0x0618}, |
170 | {0x205a, 0x0258}, |
171 | {0x205c, 0x2266}, |
172 | {0x205e, 0x20c8}, |
173 | {0x2060, 0x2060}, |
174 | {0x2062, 0x707b}, |
175 | {0x2064, 0x0fdd}, |
176 | {0x2066, 0x81b8}, |
177 | {0x2068, 0x5040}, |
178 | {0x206a, 0x0020}, |
179 | {0x206c, 0x5060}, |
180 | {0x206e, 0x3143}, |
181 | {0x2070, 0x5081}, |
182 | {0x2072, 0x025c}, |
183 | {0x2074, 0x7800}, |
184 | {0x2076, 0x7400}, |
185 | {0x2078, 0x001c}, |
186 | {0x207a, 0x0242}, |
187 | {0x207c, 0x0942}, |
188 | {0x207e, 0x0bd9}, |
189 | {0x2080, 0x0259}, |
190 | {0x2082, 0x7008}, |
191 | {0x2084, 0x160e}, |
192 | {0x2086, 0x0047}, |
193 | {0x2088, 0x2118}, |
194 | {0x208a, 0x0041}, |
195 | {0x208c, 0x00d8}, |
196 | {0x208e, 0x0145}, |
197 | {0x2090, 0x0006}, |
198 | {0x2092, 0x0181}, |
199 | {0x2094, 0x13cc}, |
200 | {0x2096, 0x2057}, |
201 | {0x2098, 0x7001}, |
202 | {0x209a, 0x0fca}, |
203 | {0x209c, 0x00cb}, |
204 | {0x209e, 0x009f}, |
205 | {0x20a0, 0x7002}, |
206 | {0x20a2, 0x13cc}, |
207 | {0x20a4, 0x019b}, |
208 | {0x20a6, 0x014d}, |
209 | {0x20a8, 0x2987}, |
210 | {0x20aa, 0x2766}, |
211 | {0x20ac, 0x0020}, |
212 | {0x20ae, 0x2060}, |
213 | {0x20b0, 0x0e5d}, |
214 | {0x20b2, 0x181d}, |
215 | {0x20b4, 0x2066}, |
216 | {0x20b6, 0x20c4}, |
217 | {0x20b8, 0x50a0}, |
218 | {0x20ba, 0x0005}, |
219 | {0x20bc, 0x0000}, |
220 | {0x20be, 0x01db}, |
221 | {0x20c0, 0x025a}, |
222 | {0x20c2, 0x00c0}, |
223 | {0x20c4, 0x0005}, |
224 | {0x20c6, 0x0006}, |
225 | {0x20c8, 0x0ad9}, |
226 | {0x20ca, 0x0259}, |
227 | {0x20cc, 0x0618}, |
228 | {0x20ce, 0x0258}, |
229 | {0x20d0, 0x2266}, |
230 | {0x20d2, 0x20c8}, |
231 | {0x20d4, 0x2060}, |
232 | {0x20d6, 0x707b}, |
233 | {0x20d8, 0x0fdd}, |
234 | {0x20da, 0x86b8}, |
235 | {0x20dc, 0x50e0}, |
236 | {0x20de, 0x0020}, |
237 | {0x20e0, 0x5100}, |
238 | {0x20e2, 0x3143}, |
239 | {0x20e4, 0x5121}, |
240 | {0x20e6, 0x7800}, |
241 | {0x20e8, 0x3140}, |
242 | {0x20ea, 0x01c4}, |
243 | {0x20ec, 0x01c1}, |
244 | {0x20ee, 0x01c0}, |
245 | {0x20f0, 0x01c4}, |
246 | {0x20f2, 0x2700}, |
247 | {0x20f4, 0x3d40}, |
248 | {0x20f6, 0x7800}, |
249 | {0x20f8, 0xffff}, |
250 | {0x27fe, 0xe000}, |
251 | {0x3000, 0x60f8}, |
252 | {0x3002, 0x187f}, |
253 | {0x3004, 0x7060}, |
254 | {0x3006, 0x0114}, |
255 | {0x3008, 0x60b0}, |
256 | {0x300a, 0x1473}, |
257 | {0x300c, 0x0013}, |
258 | {0x300e, 0x140f}, |
259 | {0x3010, 0x0040}, |
260 | {0x3012, 0x100f}, |
261 | {0x3014, 0x60f8}, |
262 | {0x3016, 0x187f}, |
263 | {0x3018, 0x7060}, |
264 | {0x301a, 0x0114}, |
265 | {0x301c, 0x60b0}, |
266 | {0x301e, 0x1473}, |
267 | {0x3020, 0x0013}, |
268 | {0x3022, 0x140f}, |
269 | {0x3024, 0x0040}, |
270 | {0x3026, 0x000f}, |
271 | |
272 | {0x0b00, 0x0000}, |
273 | {0x0b02, 0x0045}, |
274 | {0x0b04, 0xb405}, |
275 | {0x0b06, 0xc403}, |
276 | {0x0b08, 0x0081}, |
277 | {0x0b0a, 0x8252}, |
278 | {0x0b0c, 0xf814}, |
279 | {0x0b0e, 0xc618}, |
280 | {0x0b10, 0xa828}, |
281 | {0x0b12, 0x004c}, |
282 | {0x0b14, 0x4068}, |
283 | {0x0b16, 0x0000}, |
284 | {0x0f30, 0x5b15}, |
285 | {0x0f32, 0x7067}, |
286 | {0x0954, 0x0009}, |
287 | {0x0956, 0x0000}, |
288 | {0x0958, 0xbb80}, |
289 | {0x095a, 0x5140}, |
290 | {0x0c00, 0x1110}, |
291 | {0x0c02, 0x0011}, |
292 | {0x0c04, 0x0000}, |
293 | {0x0c06, 0x0200}, |
294 | {0x0c10, 0x0040}, |
295 | {0x0c12, 0x0040}, |
296 | {0x0c14, 0x0040}, |
297 | {0x0c16, 0x0040}, |
298 | {0x0a10, 0x4000}, |
299 | {0x3068, 0xf800}, |
300 | {0x306a, 0xf876}, |
301 | {0x006c, 0x0000}, |
302 | {0x005e, 0x0200}, |
303 | {0x000e, 0x0100}, |
304 | {0x0e0a, 0x0001}, |
305 | {0x004a, 0x0100}, |
306 | {0x004c, 0x0000}, |
307 | {0x004e, 0x0100}, |
308 | {0x000c, 0x0022}, |
309 | {0x0008, 0x0b00}, |
310 | {0x005a, 0x0202}, |
311 | {0x0012, 0x000e}, |
312 | {0x0018, 0x0a33}, |
313 | {0x0022, 0x0008}, |
314 | {0x0028, 0x0017}, |
315 | {0x0024, 0x0028}, |
316 | {0x002a, 0x002d}, |
317 | {0x0026, 0x0030}, |
318 | {0x002c, 0x07c9}, |
319 | {0x002e, 0x1111}, |
320 | {0x0030, 0x1111}, |
321 | {0x0032, 0x1111}, |
322 | {0x0006, 0x07bc}, |
323 | {0x0a22, 0x0000}, |
324 | {0x0a12, 0x0a20}, |
325 | {0x0a14, 0x0798}, |
326 | {0x003e, 0x0000}, |
327 | {0x0074, 0x080e}, |
328 | {0x0070, 0x0407}, |
329 | {0x0002, 0x0000}, |
330 | {0x0a02, 0x0100}, |
331 | {0x0a24, 0x0100}, |
332 | {0x0046, 0x0000}, |
333 | {0x0076, 0x0000}, |
334 | {0x0060, 0x0000}, |
335 | {0x0062, 0x0530}, |
336 | {0x0064, 0x0500}, |
337 | {0x0066, 0x0530}, |
338 | {0x0068, 0x0500}, |
339 | {0x0122, 0x0300}, |
340 | {0x015a, 0xff08}, |
341 | {0x0804, 0x0300}, |
342 | {0x0806, 0x0100}, |
343 | {0x005c, 0x0102}, |
344 | {0x0a1a, 0x0800}, |
345 | }; |
346 | |
347 | static const struct hi556_reg mode_2592x1944_regs[] = { |
348 | {0x0a00, 0x0000}, |
349 | {0x0b0a, 0x8252}, |
350 | {0x0f30, 0x5b15}, |
351 | {0x0f32, 0x7067}, |
352 | {0x004a, 0x0100}, |
353 | {0x004c, 0x0000}, |
354 | {0x004e, 0x0100}, |
355 | {0x000c, 0x0022}, |
356 | {0x0008, 0x0b00}, |
357 | {0x005a, 0x0202}, |
358 | {0x0012, 0x000e}, |
359 | {0x0018, 0x0a33}, |
360 | {0x0022, 0x0008}, |
361 | {0x0028, 0x0017}, |
362 | {0x0024, 0x0028}, |
363 | {0x002a, 0x002d}, |
364 | {0x0026, 0x0030}, |
365 | {0x002c, 0x07c9}, |
366 | {0x002e, 0x1111}, |
367 | {0x0030, 0x1111}, |
368 | {0x0032, 0x1111}, |
369 | {0x0006, 0x0814}, |
370 | {0x0a22, 0x0000}, |
371 | {0x0a12, 0x0a20}, |
372 | {0x0a14, 0x0798}, |
373 | {0x003e, 0x0000}, |
374 | {0x0074, 0x0812}, |
375 | {0x0070, 0x0409}, |
376 | {0x0804, 0x0300}, |
377 | {0x0806, 0x0100}, |
378 | {0x0a04, 0x014a}, |
379 | {0x090c, 0x0fdc}, |
380 | {0x090e, 0x002d}, |
381 | |
382 | {0x0902, 0x4319}, |
383 | {0x0914, 0xc10a}, |
384 | {0x0916, 0x071f}, |
385 | {0x0918, 0x0408}, |
386 | {0x091a, 0x0c0d}, |
387 | {0x091c, 0x0f09}, |
388 | {0x091e, 0x0a00}, |
389 | {0x0958, 0xbb80}, |
390 | }; |
391 | |
392 | static const struct hi556_reg mode_2592x1444_regs[] = { |
393 | {0x0a00, 0x0000}, |
394 | {0x0b0a, 0x8252}, |
395 | {0x0f30, 0xe545}, |
396 | {0x0f32, 0x7067}, |
397 | {0x004a, 0x0100}, |
398 | {0x004c, 0x0000}, |
399 | {0x000c, 0x0022}, |
400 | {0x0008, 0x0b00}, |
401 | {0x005a, 0x0202}, |
402 | {0x0012, 0x000e}, |
403 | {0x0018, 0x0a33}, |
404 | {0x0022, 0x0008}, |
405 | {0x0028, 0x0017}, |
406 | {0x0024, 0x0122}, |
407 | {0x002a, 0x0127}, |
408 | {0x0026, 0x012a}, |
409 | {0x002c, 0x06cf}, |
410 | {0x002e, 0x1111}, |
411 | {0x0030, 0x1111}, |
412 | {0x0032, 0x1111}, |
413 | {0x0006, 0x0821}, |
414 | {0x0a22, 0x0000}, |
415 | {0x0a12, 0x0a20}, |
416 | {0x0a14, 0x05a4}, |
417 | {0x003e, 0x0000}, |
418 | {0x0074, 0x081f}, |
419 | {0x0070, 0x040f}, |
420 | {0x0804, 0x0300}, |
421 | {0x0806, 0x0100}, |
422 | {0x0a04, 0x014a}, |
423 | {0x090c, 0x0fdc}, |
424 | {0x090e, 0x002d}, |
425 | {0x0902, 0x4319}, |
426 | {0x0914, 0xc10a}, |
427 | {0x0916, 0x071f}, |
428 | {0x0918, 0x0408}, |
429 | {0x091a, 0x0c0d}, |
430 | {0x091c, 0x0f09}, |
431 | {0x091e, 0x0a00}, |
432 | {0x0958, 0xbb80}, |
433 | }; |
434 | |
435 | static const struct hi556_reg mode_1296x972_regs[] = { |
436 | {0x0a00, 0x0000}, |
437 | {0x0b0a, 0x8259}, |
438 | {0x0f30, 0x5b15}, |
439 | {0x0f32, 0x7167}, |
440 | {0x004a, 0x0100}, |
441 | {0x004c, 0x0000}, |
442 | {0x004e, 0x0100}, |
443 | {0x000c, 0x0122}, |
444 | {0x0008, 0x0b00}, |
445 | {0x005a, 0x0404}, |
446 | {0x0012, 0x000c}, |
447 | {0x0018, 0x0a33}, |
448 | {0x0022, 0x0008}, |
449 | {0x0028, 0x0017}, |
450 | {0x0024, 0x0022}, |
451 | {0x002a, 0x002b}, |
452 | {0x0026, 0x0030}, |
453 | {0x002c, 0x07c9}, |
454 | {0x002e, 0x3311}, |
455 | {0x0030, 0x3311}, |
456 | {0x0032, 0x3311}, |
457 | {0x0006, 0x0814}, |
458 | {0x0a22, 0x0000}, |
459 | {0x0a12, 0x0510}, |
460 | {0x0a14, 0x03cc}, |
461 | {0x003e, 0x0000}, |
462 | {0x0074, 0x0812}, |
463 | {0x0070, 0x0409}, |
464 | {0x0804, 0x0308}, |
465 | {0x0806, 0x0100}, |
466 | {0x0a04, 0x016a}, |
467 | {0x090e, 0x0010}, |
468 | {0x090c, 0x09c0}, |
469 | |
470 | {0x0902, 0x4319}, |
471 | {0x0914, 0xc106}, |
472 | {0x0916, 0x040e}, |
473 | {0x0918, 0x0304}, |
474 | {0x091a, 0x0708}, |
475 | {0x091c, 0x0e06}, |
476 | {0x091e, 0x0300}, |
477 | {0x0958, 0xbb80}, |
478 | }; |
479 | |
480 | static const struct hi556_reg mode_1296x722_regs[] = { |
481 | {0x0a00, 0x0000}, |
482 | {0x0b0a, 0x8259}, |
483 | {0x0f30, 0x5b15}, |
484 | {0x0f32, 0x7167}, |
485 | {0x004a, 0x0100}, |
486 | {0x004c, 0x0000}, |
487 | {0x004e, 0x0100}, |
488 | {0x000c, 0x0122}, |
489 | {0x0008, 0x0b00}, |
490 | {0x005a, 0x0404}, |
491 | {0x0012, 0x000c}, |
492 | {0x0018, 0x0a33}, |
493 | {0x0022, 0x0008}, |
494 | {0x0028, 0x0017}, |
495 | {0x0024, 0x0022}, |
496 | {0x002a, 0x002b}, |
497 | {0x0026, 0x012a}, |
498 | {0x002c, 0x06cf}, |
499 | {0x002e, 0x3311}, |
500 | {0x0030, 0x3311}, |
501 | {0x0032, 0x3311}, |
502 | {0x0006, 0x0814}, |
503 | {0x0a22, 0x0000}, |
504 | {0x0a12, 0x0510}, |
505 | {0x0a14, 0x02d2}, |
506 | {0x003e, 0x0000}, |
507 | {0x0074, 0x0812}, |
508 | {0x0070, 0x0409}, |
509 | {0x0804, 0x0308}, |
510 | {0x0806, 0x0100}, |
511 | {0x0a04, 0x016a}, |
512 | {0x090c, 0x09c0}, |
513 | {0x090e, 0x0010}, |
514 | {0x0902, 0x4319}, |
515 | {0x0914, 0xc106}, |
516 | {0x0916, 0x040e}, |
517 | {0x0918, 0x0304}, |
518 | {0x091a, 0x0708}, |
519 | {0x091c, 0x0e06}, |
520 | {0x091e, 0x0300}, |
521 | {0x0958, 0xbb80}, |
522 | }; |
523 | |
524 | static const char * const [] = { |
525 | "Disabled" , |
526 | "Solid Colour" , |
527 | "100% Colour Bars" , |
528 | "Fade To Grey Colour Bars" , |
529 | "PN9" , |
530 | "Gradient Horizontal" , |
531 | "Gradient Vertical" , |
532 | "Check Board" , |
533 | "Slant Pattern" , |
534 | }; |
535 | |
536 | static const s64 [] = { |
537 | HI556_LINK_FREQ_437MHZ, |
538 | }; |
539 | |
540 | static const struct hi556_link_freq_config link_freq_configs[] = { |
541 | [HI556_LINK_FREQ_437MHZ_INDEX] = { |
542 | .reg_list = { |
543 | .num_of_regs = ARRAY_SIZE(mipi_data_rate_874mbps), |
544 | .regs = mipi_data_rate_874mbps, |
545 | } |
546 | } |
547 | }; |
548 | |
549 | static const struct hi556_mode supported_modes[] = { |
550 | { |
551 | .width = HI556_PIXEL_ARRAY_WIDTH, |
552 | .height = HI556_PIXEL_ARRAY_HEIGHT, |
553 | .crop = { |
554 | .left = HI556_PIXEL_ARRAY_LEFT, |
555 | .top = HI556_PIXEL_ARRAY_TOP, |
556 | .width = HI556_PIXEL_ARRAY_WIDTH, |
557 | .height = HI556_PIXEL_ARRAY_HEIGHT |
558 | }, |
559 | .fll_def = HI556_FLL_30FPS, |
560 | .fll_min = HI556_FLL_30FPS_MIN, |
561 | .llp = 0x0b00, |
562 | .reg_list = { |
563 | .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs), |
564 | .regs = mode_2592x1944_regs, |
565 | }, |
566 | .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX, |
567 | }, |
568 | { |
569 | .width = HI556_PIXEL_ARRAY_WIDTH, |
570 | .height = 1444, |
571 | .crop = { |
572 | .left = HI556_PIXEL_ARRAY_LEFT, |
573 | .top = 250, |
574 | .width = HI556_PIXEL_ARRAY_WIDTH, |
575 | .height = 1444 |
576 | }, |
577 | .fll_def = 0x821, |
578 | .fll_min = 0x821, |
579 | .llp = 0x0b00, |
580 | .reg_list = { |
581 | .num_of_regs = ARRAY_SIZE(mode_2592x1444_regs), |
582 | .regs = mode_2592x1444_regs, |
583 | }, |
584 | .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX, |
585 | }, |
586 | { |
587 | .width = 1296, |
588 | .height = 972, |
589 | .crop = { |
590 | .left = HI556_PIXEL_ARRAY_LEFT, |
591 | .top = HI556_PIXEL_ARRAY_TOP, |
592 | .width = HI556_PIXEL_ARRAY_WIDTH, |
593 | .height = HI556_PIXEL_ARRAY_HEIGHT |
594 | }, |
595 | .fll_def = HI556_FLL_30FPS, |
596 | .fll_min = HI556_FLL_30FPS_MIN, |
597 | .llp = 0x0b00, |
598 | .reg_list = { |
599 | .num_of_regs = ARRAY_SIZE(mode_1296x972_regs), |
600 | .regs = mode_1296x972_regs, |
601 | }, |
602 | .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX, |
603 | }, |
604 | { |
605 | .width = 1296, |
606 | .height = 722, |
607 | .crop = { |
608 | .left = HI556_PIXEL_ARRAY_LEFT, |
609 | .top = 250, |
610 | .width = HI556_PIXEL_ARRAY_WIDTH, |
611 | .height = 1444 |
612 | }, |
613 | .fll_def = HI556_FLL_30FPS, |
614 | .fll_min = HI556_FLL_30FPS_MIN, |
615 | .llp = 0x0b00, |
616 | .reg_list = { |
617 | .num_of_regs = ARRAY_SIZE(mode_1296x722_regs), |
618 | .regs = mode_1296x722_regs, |
619 | }, |
620 | .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX, |
621 | }, |
622 | }; |
623 | |
624 | struct hi556 { |
625 | struct v4l2_subdev sd; |
626 | struct media_pad pad; |
627 | struct v4l2_ctrl_handler ctrl_handler; |
628 | |
629 | /* V4L2 Controls */ |
630 | struct v4l2_ctrl *link_freq; |
631 | struct v4l2_ctrl *pixel_rate; |
632 | struct v4l2_ctrl *vblank; |
633 | struct v4l2_ctrl *hblank; |
634 | struct v4l2_ctrl *exposure; |
635 | |
636 | /* Current mode */ |
637 | const struct hi556_mode *cur_mode; |
638 | |
639 | /* To serialize asynchronus callbacks */ |
640 | struct mutex mutex; |
641 | |
642 | /* True if the device has been identified */ |
643 | bool identified; |
644 | }; |
645 | |
646 | static u64 to_pixel_rate(u32 f_index) |
647 | { |
648 | u64 pixel_rate = link_freq_menu_items[f_index] * 2 * HI556_DATA_LANES; |
649 | |
650 | do_div(pixel_rate, HI556_RGB_DEPTH); |
651 | |
652 | return pixel_rate; |
653 | } |
654 | |
655 | static int hi556_read_reg(struct hi556 *hi556, u16 reg, u16 len, u32 *val) |
656 | { |
657 | struct i2c_client *client = v4l2_get_subdevdata(sd: &hi556->sd); |
658 | struct i2c_msg msgs[2]; |
659 | u8 addr_buf[2]; |
660 | u8 data_buf[4] = {0}; |
661 | int ret; |
662 | |
663 | if (len > 4) |
664 | return -EINVAL; |
665 | |
666 | put_unaligned_be16(val: reg, p: addr_buf); |
667 | msgs[0].addr = client->addr; |
668 | msgs[0].flags = 0; |
669 | msgs[0].len = sizeof(addr_buf); |
670 | msgs[0].buf = addr_buf; |
671 | msgs[1].addr = client->addr; |
672 | msgs[1].flags = I2C_M_RD; |
673 | msgs[1].len = len; |
674 | msgs[1].buf = &data_buf[4 - len]; |
675 | |
676 | ret = i2c_transfer(adap: client->adapter, msgs, ARRAY_SIZE(msgs)); |
677 | if (ret != ARRAY_SIZE(msgs)) |
678 | return -EIO; |
679 | |
680 | *val = get_unaligned_be32(p: data_buf); |
681 | |
682 | return 0; |
683 | } |
684 | |
685 | static int hi556_write_reg(struct hi556 *hi556, u16 reg, u16 len, u32 val) |
686 | { |
687 | struct i2c_client *client = v4l2_get_subdevdata(sd: &hi556->sd); |
688 | u8 buf[6]; |
689 | |
690 | if (len > 4) |
691 | return -EINVAL; |
692 | |
693 | put_unaligned_be16(val: reg, p: buf); |
694 | put_unaligned_be32(val: val << 8 * (4 - len), p: buf + 2); |
695 | if (i2c_master_send(client, buf, count: len + 2) != len + 2) |
696 | return -EIO; |
697 | |
698 | return 0; |
699 | } |
700 | |
701 | static int hi556_write_reg_list(struct hi556 *hi556, |
702 | const struct hi556_reg_list *r_list) |
703 | { |
704 | struct i2c_client *client = v4l2_get_subdevdata(sd: &hi556->sd); |
705 | unsigned int i; |
706 | int ret; |
707 | |
708 | for (i = 0; i < r_list->num_of_regs; i++) { |
709 | ret = hi556_write_reg(hi556, reg: r_list->regs[i].address, |
710 | HI556_REG_VALUE_16BIT, |
711 | val: r_list->regs[i].val); |
712 | if (ret) { |
713 | dev_err_ratelimited(&client->dev, |
714 | "failed to write reg 0x%4.4x. error = %d" , |
715 | r_list->regs[i].address, ret); |
716 | return ret; |
717 | } |
718 | } |
719 | |
720 | return 0; |
721 | } |
722 | |
723 | static int hi556_update_digital_gain(struct hi556 *hi556, u32 d_gain) |
724 | { |
725 | int ret; |
726 | |
727 | ret = hi556_write_reg(hi556, HI556_REG_MWB_GR_GAIN, |
728 | HI556_REG_VALUE_16BIT, val: d_gain); |
729 | if (ret) |
730 | return ret; |
731 | |
732 | ret = hi556_write_reg(hi556, HI556_REG_MWB_GB_GAIN, |
733 | HI556_REG_VALUE_16BIT, val: d_gain); |
734 | if (ret) |
735 | return ret; |
736 | |
737 | ret = hi556_write_reg(hi556, HI556_REG_MWB_R_GAIN, |
738 | HI556_REG_VALUE_16BIT, val: d_gain); |
739 | if (ret) |
740 | return ret; |
741 | |
742 | return hi556_write_reg(hi556, HI556_REG_MWB_B_GAIN, |
743 | HI556_REG_VALUE_16BIT, val: d_gain); |
744 | } |
745 | |
746 | static int hi556_test_pattern(struct hi556 *hi556, u32 pattern) |
747 | { |
748 | int ret; |
749 | u32 val; |
750 | |
751 | if (pattern) { |
752 | ret = hi556_read_reg(hi556, HI556_REG_ISP, |
753 | HI556_REG_VALUE_08BIT, val: &val); |
754 | if (ret) |
755 | return ret; |
756 | |
757 | ret = hi556_write_reg(hi556, HI556_REG_ISP, |
758 | HI556_REG_VALUE_08BIT, |
759 | val: val | HI556_REG_ISP_TPG_EN); |
760 | if (ret) |
761 | return ret; |
762 | } |
763 | |
764 | return hi556_write_reg(hi556, HI556_REG_TEST_PATTERN, |
765 | HI556_REG_VALUE_08BIT, val: pattern); |
766 | } |
767 | |
768 | static int hi556_set_ctrl(struct v4l2_ctrl *ctrl) |
769 | { |
770 | struct hi556 *hi556 = container_of(ctrl->handler, |
771 | struct hi556, ctrl_handler); |
772 | struct i2c_client *client = v4l2_get_subdevdata(sd: &hi556->sd); |
773 | s64 exposure_max; |
774 | int ret = 0; |
775 | |
776 | /* Propagate change of current control to all related controls */ |
777 | if (ctrl->id == V4L2_CID_VBLANK) { |
778 | /* Update max exposure while meeting expected vblanking */ |
779 | exposure_max = hi556->cur_mode->height + ctrl->val - |
780 | HI556_EXPOSURE_MAX_MARGIN; |
781 | __v4l2_ctrl_modify_range(ctrl: hi556->exposure, |
782 | min: hi556->exposure->minimum, |
783 | max: exposure_max, step: hi556->exposure->step, |
784 | def: exposure_max); |
785 | } |
786 | |
787 | /* V4L2 controls values will be applied only when power is already up */ |
788 | if (!pm_runtime_get_if_in_use(dev: &client->dev)) |
789 | return 0; |
790 | |
791 | switch (ctrl->id) { |
792 | case V4L2_CID_ANALOGUE_GAIN: |
793 | ret = hi556_write_reg(hi556, HI556_REG_ANALOG_GAIN, |
794 | HI556_REG_VALUE_16BIT, val: ctrl->val); |
795 | break; |
796 | |
797 | case V4L2_CID_DIGITAL_GAIN: |
798 | ret = hi556_update_digital_gain(hi556, d_gain: ctrl->val); |
799 | break; |
800 | |
801 | case V4L2_CID_EXPOSURE: |
802 | ret = hi556_write_reg(hi556, HI556_REG_EXPOSURE, |
803 | HI556_REG_VALUE_16BIT, val: ctrl->val); |
804 | break; |
805 | |
806 | case V4L2_CID_VBLANK: |
807 | /* Update FLL that meets expected vertical blanking */ |
808 | ret = hi556_write_reg(hi556, HI556_REG_FLL, |
809 | HI556_REG_VALUE_16BIT, |
810 | val: hi556->cur_mode->height + ctrl->val); |
811 | break; |
812 | |
813 | case V4L2_CID_TEST_PATTERN: |
814 | ret = hi556_test_pattern(hi556, pattern: ctrl->val); |
815 | break; |
816 | |
817 | default: |
818 | ret = -EINVAL; |
819 | break; |
820 | } |
821 | |
822 | pm_runtime_put(dev: &client->dev); |
823 | |
824 | return ret; |
825 | } |
826 | |
827 | static const struct v4l2_ctrl_ops hi556_ctrl_ops = { |
828 | .s_ctrl = hi556_set_ctrl, |
829 | }; |
830 | |
831 | static int hi556_init_controls(struct hi556 *hi556) |
832 | { |
833 | struct v4l2_ctrl_handler *ctrl_hdlr; |
834 | s64 exposure_max, h_blank; |
835 | int ret; |
836 | |
837 | ctrl_hdlr = &hi556->ctrl_handler; |
838 | ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); |
839 | if (ret) |
840 | return ret; |
841 | |
842 | ctrl_hdlr->lock = &hi556->mutex; |
843 | hi556->link_freq = v4l2_ctrl_new_int_menu(hdl: ctrl_hdlr, ops: &hi556_ctrl_ops, |
844 | V4L2_CID_LINK_FREQ, |
845 | ARRAY_SIZE(link_freq_menu_items) - 1, |
846 | def: 0, qmenu_int: link_freq_menu_items); |
847 | if (hi556->link_freq) |
848 | hi556->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; |
849 | |
850 | hi556->pixel_rate = v4l2_ctrl_new_std |
851 | (hdl: ctrl_hdlr, ops: &hi556_ctrl_ops, |
852 | V4L2_CID_PIXEL_RATE, min: 0, |
853 | max: to_pixel_rate(f_index: HI556_LINK_FREQ_437MHZ_INDEX), |
854 | step: 1, |
855 | def: to_pixel_rate(f_index: HI556_LINK_FREQ_437MHZ_INDEX)); |
856 | hi556->vblank = v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &hi556_ctrl_ops, |
857 | V4L2_CID_VBLANK, |
858 | min: hi556->cur_mode->fll_min - |
859 | hi556->cur_mode->height, |
860 | HI556_FLL_MAX - |
861 | hi556->cur_mode->height, step: 1, |
862 | def: hi556->cur_mode->fll_def - |
863 | hi556->cur_mode->height); |
864 | |
865 | h_blank = hi556->cur_mode->llp - hi556->cur_mode->width; |
866 | |
867 | hi556->hblank = v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &hi556_ctrl_ops, |
868 | V4L2_CID_HBLANK, min: h_blank, max: h_blank, step: 1, |
869 | def: h_blank); |
870 | if (hi556->hblank) |
871 | hi556->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; |
872 | |
873 | v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &hi556_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, |
874 | HI556_ANAL_GAIN_MIN, HI556_ANAL_GAIN_MAX, |
875 | HI556_ANAL_GAIN_STEP, HI556_ANAL_GAIN_MIN); |
876 | v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &hi556_ctrl_ops, V4L2_CID_DIGITAL_GAIN, |
877 | HI556_DGTL_GAIN_MIN, HI556_DGTL_GAIN_MAX, |
878 | HI556_DGTL_GAIN_STEP, HI556_DGTL_GAIN_DEFAULT); |
879 | exposure_max = hi556->cur_mode->fll_def - HI556_EXPOSURE_MAX_MARGIN; |
880 | hi556->exposure = v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &hi556_ctrl_ops, |
881 | V4L2_CID_EXPOSURE, |
882 | HI556_EXPOSURE_MIN, max: exposure_max, |
883 | HI556_EXPOSURE_STEP, |
884 | def: exposure_max); |
885 | v4l2_ctrl_new_std_menu_items(hdl: ctrl_hdlr, ops: &hi556_ctrl_ops, |
886 | V4L2_CID_TEST_PATTERN, |
887 | ARRAY_SIZE(hi556_test_pattern_menu) - 1, |
888 | mask: 0, def: 0, qmenu: hi556_test_pattern_menu); |
889 | if (ctrl_hdlr->error) |
890 | return ctrl_hdlr->error; |
891 | |
892 | hi556->sd.ctrl_handler = ctrl_hdlr; |
893 | |
894 | return 0; |
895 | } |
896 | |
897 | static void hi556_assign_pad_format(const struct hi556_mode *mode, |
898 | struct v4l2_mbus_framefmt *fmt) |
899 | { |
900 | fmt->width = mode->width; |
901 | fmt->height = mode->height; |
902 | fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; |
903 | fmt->field = V4L2_FIELD_NONE; |
904 | } |
905 | |
906 | static int hi556_identify_module(struct hi556 *hi556) |
907 | { |
908 | struct i2c_client *client = v4l2_get_subdevdata(sd: &hi556->sd); |
909 | int ret; |
910 | u32 val; |
911 | |
912 | if (hi556->identified) |
913 | return 0; |
914 | |
915 | ret = hi556_read_reg(hi556, HI556_REG_CHIP_ID, |
916 | HI556_REG_VALUE_16BIT, val: &val); |
917 | if (ret) |
918 | return ret; |
919 | |
920 | if (val != HI556_CHIP_ID) { |
921 | dev_err(&client->dev, "chip id mismatch: %x!=%x" , |
922 | HI556_CHIP_ID, val); |
923 | return -ENXIO; |
924 | } |
925 | |
926 | hi556->identified = true; |
927 | |
928 | return 0; |
929 | } |
930 | |
931 | static const struct v4l2_rect * |
932 | __hi556_get_pad_crop(struct hi556 *hi556, |
933 | struct v4l2_subdev_state *sd_state, |
934 | unsigned int pad, enum v4l2_subdev_format_whence which) |
935 | { |
936 | switch (which) { |
937 | case V4L2_SUBDEV_FORMAT_TRY: |
938 | return v4l2_subdev_state_get_crop(sd_state, pad); |
939 | case V4L2_SUBDEV_FORMAT_ACTIVE: |
940 | return &hi556->cur_mode->crop; |
941 | } |
942 | |
943 | return NULL; |
944 | } |
945 | |
946 | static int hi556_get_selection(struct v4l2_subdev *sd, |
947 | struct v4l2_subdev_state *sd_state, |
948 | struct v4l2_subdev_selection *sel) |
949 | { |
950 | switch (sel->target) { |
951 | case V4L2_SEL_TGT_CROP: { |
952 | struct hi556 *hi556 = to_hi556(sd); |
953 | |
954 | mutex_lock(&hi556->mutex); |
955 | sel->r = *__hi556_get_pad_crop(hi556, sd_state, pad: sel->pad, |
956 | which: sel->which); |
957 | mutex_unlock(lock: &hi556->mutex); |
958 | |
959 | return 0; |
960 | } |
961 | |
962 | case V4L2_SEL_TGT_NATIVE_SIZE: |
963 | sel->r.top = 0; |
964 | sel->r.left = 0; |
965 | sel->r.width = HI556_NATIVE_WIDTH; |
966 | sel->r.height = HI556_NATIVE_HEIGHT; |
967 | |
968 | return 0; |
969 | |
970 | case V4L2_SEL_TGT_CROP_DEFAULT: |
971 | case V4L2_SEL_TGT_CROP_BOUNDS: |
972 | sel->r.top = HI556_PIXEL_ARRAY_TOP; |
973 | sel->r.left = HI556_PIXEL_ARRAY_LEFT; |
974 | sel->r.width = HI556_PIXEL_ARRAY_WIDTH; |
975 | sel->r.height = HI556_PIXEL_ARRAY_HEIGHT; |
976 | |
977 | return 0; |
978 | } |
979 | |
980 | return -EINVAL; |
981 | } |
982 | |
983 | static int hi556_start_streaming(struct hi556 *hi556) |
984 | { |
985 | struct i2c_client *client = v4l2_get_subdevdata(sd: &hi556->sd); |
986 | const struct hi556_reg_list *reg_list; |
987 | int link_freq_index, ret; |
988 | |
989 | ret = hi556_identify_module(hi556); |
990 | if (ret) |
991 | return ret; |
992 | |
993 | link_freq_index = hi556->cur_mode->link_freq_index; |
994 | reg_list = &link_freq_configs[link_freq_index].reg_list; |
995 | ret = hi556_write_reg_list(hi556, r_list: reg_list); |
996 | if (ret) { |
997 | dev_err(&client->dev, "failed to set plls" ); |
998 | return ret; |
999 | } |
1000 | |
1001 | reg_list = &hi556->cur_mode->reg_list; |
1002 | ret = hi556_write_reg_list(hi556, r_list: reg_list); |
1003 | if (ret) { |
1004 | dev_err(&client->dev, "failed to set mode" ); |
1005 | return ret; |
1006 | } |
1007 | |
1008 | ret = __v4l2_ctrl_handler_setup(hdl: hi556->sd.ctrl_handler); |
1009 | if (ret) |
1010 | return ret; |
1011 | |
1012 | ret = hi556_write_reg(hi556, HI556_REG_MODE_SELECT, |
1013 | HI556_REG_VALUE_16BIT, HI556_MODE_STREAMING); |
1014 | |
1015 | if (ret) { |
1016 | dev_err(&client->dev, "failed to set stream" ); |
1017 | return ret; |
1018 | } |
1019 | |
1020 | return 0; |
1021 | } |
1022 | |
1023 | static void hi556_stop_streaming(struct hi556 *hi556) |
1024 | { |
1025 | struct i2c_client *client = v4l2_get_subdevdata(sd: &hi556->sd); |
1026 | |
1027 | if (hi556_write_reg(hi556, HI556_REG_MODE_SELECT, |
1028 | HI556_REG_VALUE_16BIT, HI556_MODE_STANDBY)) |
1029 | dev_err(&client->dev, "failed to set stream" ); |
1030 | } |
1031 | |
1032 | static int hi556_set_stream(struct v4l2_subdev *sd, int enable) |
1033 | { |
1034 | struct hi556 *hi556 = to_hi556(sd); |
1035 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
1036 | int ret = 0; |
1037 | |
1038 | mutex_lock(&hi556->mutex); |
1039 | if (enable) { |
1040 | ret = pm_runtime_resume_and_get(dev: &client->dev); |
1041 | if (ret < 0) { |
1042 | mutex_unlock(lock: &hi556->mutex); |
1043 | return ret; |
1044 | } |
1045 | |
1046 | ret = hi556_start_streaming(hi556); |
1047 | if (ret) { |
1048 | enable = 0; |
1049 | hi556_stop_streaming(hi556); |
1050 | pm_runtime_put(dev: &client->dev); |
1051 | } |
1052 | } else { |
1053 | hi556_stop_streaming(hi556); |
1054 | pm_runtime_put(dev: &client->dev); |
1055 | } |
1056 | |
1057 | mutex_unlock(lock: &hi556->mutex); |
1058 | |
1059 | return ret; |
1060 | } |
1061 | |
1062 | static int hi556_set_format(struct v4l2_subdev *sd, |
1063 | struct v4l2_subdev_state *sd_state, |
1064 | struct v4l2_subdev_format *fmt) |
1065 | { |
1066 | struct hi556 *hi556 = to_hi556(sd); |
1067 | const struct hi556_mode *mode; |
1068 | s32 vblank_def, h_blank; |
1069 | |
1070 | mode = v4l2_find_nearest_size(supported_modes, |
1071 | ARRAY_SIZE(supported_modes), width, |
1072 | height, fmt->format.width, |
1073 | fmt->format.height); |
1074 | |
1075 | mutex_lock(&hi556->mutex); |
1076 | hi556_assign_pad_format(mode, fmt: &fmt->format); |
1077 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { |
1078 | *v4l2_subdev_state_get_format(sd_state, fmt->pad) = fmt->format; |
1079 | } else { |
1080 | hi556->cur_mode = mode; |
1081 | __v4l2_ctrl_s_ctrl(ctrl: hi556->link_freq, val: mode->link_freq_index); |
1082 | __v4l2_ctrl_s_ctrl_int64(ctrl: hi556->pixel_rate, |
1083 | val: to_pixel_rate(f_index: mode->link_freq_index)); |
1084 | |
1085 | /* Update limits and set FPS to default */ |
1086 | vblank_def = mode->fll_def - mode->height; |
1087 | __v4l2_ctrl_modify_range(ctrl: hi556->vblank, |
1088 | min: mode->fll_min - mode->height, |
1089 | HI556_FLL_MAX - mode->height, step: 1, |
1090 | def: vblank_def); |
1091 | __v4l2_ctrl_s_ctrl(ctrl: hi556->vblank, val: vblank_def); |
1092 | |
1093 | h_blank = hi556->cur_mode->llp - hi556->cur_mode->width; |
1094 | |
1095 | __v4l2_ctrl_modify_range(ctrl: hi556->hblank, min: h_blank, max: h_blank, step: 1, |
1096 | def: h_blank); |
1097 | } |
1098 | |
1099 | mutex_unlock(lock: &hi556->mutex); |
1100 | |
1101 | return 0; |
1102 | } |
1103 | |
1104 | static int hi556_get_format(struct v4l2_subdev *sd, |
1105 | struct v4l2_subdev_state *sd_state, |
1106 | struct v4l2_subdev_format *fmt) |
1107 | { |
1108 | struct hi556 *hi556 = to_hi556(sd); |
1109 | |
1110 | mutex_lock(&hi556->mutex); |
1111 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) |
1112 | fmt->format = *v4l2_subdev_state_get_format(sd_state, |
1113 | fmt->pad); |
1114 | else |
1115 | hi556_assign_pad_format(mode: hi556->cur_mode, fmt: &fmt->format); |
1116 | |
1117 | mutex_unlock(lock: &hi556->mutex); |
1118 | |
1119 | return 0; |
1120 | } |
1121 | |
1122 | static int hi556_enum_mbus_code(struct v4l2_subdev *sd, |
1123 | struct v4l2_subdev_state *sd_state, |
1124 | struct v4l2_subdev_mbus_code_enum *code) |
1125 | { |
1126 | if (code->index > 0) |
1127 | return -EINVAL; |
1128 | |
1129 | code->code = MEDIA_BUS_FMT_SGRBG10_1X10; |
1130 | |
1131 | return 0; |
1132 | } |
1133 | |
1134 | static int hi556_enum_frame_size(struct v4l2_subdev *sd, |
1135 | struct v4l2_subdev_state *sd_state, |
1136 | struct v4l2_subdev_frame_size_enum *fse) |
1137 | { |
1138 | if (fse->index >= ARRAY_SIZE(supported_modes)) |
1139 | return -EINVAL; |
1140 | |
1141 | if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10) |
1142 | return -EINVAL; |
1143 | |
1144 | fse->min_width = supported_modes[fse->index].width; |
1145 | fse->max_width = fse->min_width; |
1146 | fse->min_height = supported_modes[fse->index].height; |
1147 | fse->max_height = fse->min_height; |
1148 | |
1149 | return 0; |
1150 | } |
1151 | |
1152 | static int hi556_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) |
1153 | { |
1154 | struct hi556 *hi556 = to_hi556(sd); |
1155 | struct v4l2_rect *try_crop; |
1156 | |
1157 | mutex_lock(&hi556->mutex); |
1158 | hi556_assign_pad_format(mode: &supported_modes[0], |
1159 | v4l2_subdev_state_get_format(fh->state, 0)); |
1160 | |
1161 | /* Initialize try_crop rectangle. */ |
1162 | try_crop = v4l2_subdev_state_get_crop(fh->state, 0); |
1163 | try_crop->top = HI556_PIXEL_ARRAY_TOP; |
1164 | try_crop->left = HI556_PIXEL_ARRAY_LEFT; |
1165 | try_crop->width = HI556_PIXEL_ARRAY_WIDTH; |
1166 | try_crop->height = HI556_PIXEL_ARRAY_HEIGHT; |
1167 | |
1168 | mutex_unlock(lock: &hi556->mutex); |
1169 | |
1170 | return 0; |
1171 | } |
1172 | |
1173 | static const struct v4l2_subdev_video_ops hi556_video_ops = { |
1174 | .s_stream = hi556_set_stream, |
1175 | }; |
1176 | |
1177 | static const struct v4l2_subdev_pad_ops hi556_pad_ops = { |
1178 | .set_fmt = hi556_set_format, |
1179 | .get_fmt = hi556_get_format, |
1180 | .get_selection = hi556_get_selection, |
1181 | .enum_mbus_code = hi556_enum_mbus_code, |
1182 | .enum_frame_size = hi556_enum_frame_size, |
1183 | }; |
1184 | |
1185 | static const struct v4l2_subdev_ops hi556_subdev_ops = { |
1186 | .video = &hi556_video_ops, |
1187 | .pad = &hi556_pad_ops, |
1188 | }; |
1189 | |
1190 | static const struct media_entity_operations hi556_subdev_entity_ops = { |
1191 | .link_validate = v4l2_subdev_link_validate, |
1192 | }; |
1193 | |
1194 | static const struct v4l2_subdev_internal_ops hi556_internal_ops = { |
1195 | .open = hi556_open, |
1196 | }; |
1197 | |
1198 | static int hi556_check_hwcfg(struct device *dev) |
1199 | { |
1200 | struct fwnode_handle *ep; |
1201 | struct fwnode_handle *fwnode = dev_fwnode(dev); |
1202 | struct v4l2_fwnode_endpoint bus_cfg = { |
1203 | .bus_type = V4L2_MBUS_CSI2_DPHY |
1204 | }; |
1205 | u32 mclk; |
1206 | int ret = 0; |
1207 | unsigned int i, j; |
1208 | |
1209 | if (!fwnode) |
1210 | return -ENXIO; |
1211 | |
1212 | ret = fwnode_property_read_u32(fwnode, propname: "clock-frequency" , val: &mclk); |
1213 | if (ret) { |
1214 | dev_err(dev, "can't get clock frequency" ); |
1215 | return ret; |
1216 | } |
1217 | |
1218 | if (mclk != HI556_MCLK) { |
1219 | dev_err(dev, "external clock %d is not supported" , mclk); |
1220 | return -EINVAL; |
1221 | } |
1222 | |
1223 | ep = fwnode_graph_get_next_endpoint(fwnode, NULL); |
1224 | if (!ep) |
1225 | return -ENXIO; |
1226 | |
1227 | ret = v4l2_fwnode_endpoint_alloc_parse(fwnode: ep, vep: &bus_cfg); |
1228 | fwnode_handle_put(fwnode: ep); |
1229 | if (ret) |
1230 | return ret; |
1231 | |
1232 | if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) { |
1233 | dev_err(dev, "number of CSI2 data lanes %d is not supported" , |
1234 | bus_cfg.bus.mipi_csi2.num_data_lanes); |
1235 | ret = -EINVAL; |
1236 | goto check_hwcfg_error; |
1237 | } |
1238 | |
1239 | if (!bus_cfg.nr_of_link_frequencies) { |
1240 | dev_err(dev, "no link frequencies defined" ); |
1241 | ret = -EINVAL; |
1242 | goto check_hwcfg_error; |
1243 | } |
1244 | |
1245 | for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) { |
1246 | for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) { |
1247 | if (link_freq_menu_items[i] == |
1248 | bus_cfg.link_frequencies[j]) |
1249 | break; |
1250 | } |
1251 | |
1252 | if (j == bus_cfg.nr_of_link_frequencies) { |
1253 | dev_err(dev, "no link frequency %lld supported" , |
1254 | link_freq_menu_items[i]); |
1255 | ret = -EINVAL; |
1256 | goto check_hwcfg_error; |
1257 | } |
1258 | } |
1259 | |
1260 | check_hwcfg_error: |
1261 | v4l2_fwnode_endpoint_free(vep: &bus_cfg); |
1262 | |
1263 | return ret; |
1264 | } |
1265 | |
1266 | static void hi556_remove(struct i2c_client *client) |
1267 | { |
1268 | struct v4l2_subdev *sd = i2c_get_clientdata(client); |
1269 | struct hi556 *hi556 = to_hi556(sd); |
1270 | |
1271 | v4l2_async_unregister_subdev(sd); |
1272 | media_entity_cleanup(entity: &sd->entity); |
1273 | v4l2_ctrl_handler_free(hdl: sd->ctrl_handler); |
1274 | pm_runtime_disable(dev: &client->dev); |
1275 | mutex_destroy(lock: &hi556->mutex); |
1276 | } |
1277 | |
1278 | static int hi556_probe(struct i2c_client *client) |
1279 | { |
1280 | struct hi556 *hi556; |
1281 | bool full_power; |
1282 | int ret; |
1283 | |
1284 | ret = hi556_check_hwcfg(dev: &client->dev); |
1285 | if (ret) { |
1286 | dev_err(&client->dev, "failed to check HW configuration: %d" , |
1287 | ret); |
1288 | return ret; |
1289 | } |
1290 | |
1291 | hi556 = devm_kzalloc(dev: &client->dev, size: sizeof(*hi556), GFP_KERNEL); |
1292 | if (!hi556) |
1293 | return -ENOMEM; |
1294 | |
1295 | v4l2_i2c_subdev_init(sd: &hi556->sd, client, ops: &hi556_subdev_ops); |
1296 | |
1297 | full_power = acpi_dev_state_d0(dev: &client->dev); |
1298 | if (full_power) { |
1299 | ret = hi556_identify_module(hi556); |
1300 | if (ret) { |
1301 | dev_err(&client->dev, "failed to find sensor: %d" , ret); |
1302 | return ret; |
1303 | } |
1304 | } |
1305 | |
1306 | mutex_init(&hi556->mutex); |
1307 | hi556->cur_mode = &supported_modes[0]; |
1308 | ret = hi556_init_controls(hi556); |
1309 | if (ret) { |
1310 | dev_err(&client->dev, "failed to init controls: %d" , ret); |
1311 | goto probe_error_v4l2_ctrl_handler_free; |
1312 | } |
1313 | |
1314 | hi556->sd.internal_ops = &hi556_internal_ops; |
1315 | hi556->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
1316 | hi556->sd.entity.ops = &hi556_subdev_entity_ops; |
1317 | hi556->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; |
1318 | hi556->pad.flags = MEDIA_PAD_FL_SOURCE; |
1319 | ret = media_entity_pads_init(entity: &hi556->sd.entity, num_pads: 1, pads: &hi556->pad); |
1320 | if (ret) { |
1321 | dev_err(&client->dev, "failed to init entity pads: %d" , ret); |
1322 | goto probe_error_v4l2_ctrl_handler_free; |
1323 | } |
1324 | |
1325 | ret = v4l2_async_register_subdev_sensor(sd: &hi556->sd); |
1326 | if (ret < 0) { |
1327 | dev_err(&client->dev, "failed to register V4L2 subdev: %d" , |
1328 | ret); |
1329 | goto probe_error_media_entity_cleanup; |
1330 | } |
1331 | |
1332 | /* Set the device's state to active if it's in D0 state. */ |
1333 | if (full_power) |
1334 | pm_runtime_set_active(dev: &client->dev); |
1335 | pm_runtime_enable(dev: &client->dev); |
1336 | pm_runtime_idle(dev: &client->dev); |
1337 | |
1338 | return 0; |
1339 | |
1340 | probe_error_media_entity_cleanup: |
1341 | media_entity_cleanup(entity: &hi556->sd.entity); |
1342 | |
1343 | probe_error_v4l2_ctrl_handler_free: |
1344 | v4l2_ctrl_handler_free(hdl: hi556->sd.ctrl_handler); |
1345 | mutex_destroy(lock: &hi556->mutex); |
1346 | |
1347 | return ret; |
1348 | } |
1349 | |
1350 | #ifdef CONFIG_ACPI |
1351 | static const struct acpi_device_id hi556_acpi_ids[] = { |
1352 | {"INT3537" }, |
1353 | {} |
1354 | }; |
1355 | |
1356 | MODULE_DEVICE_TABLE(acpi, hi556_acpi_ids); |
1357 | #endif |
1358 | |
1359 | static struct i2c_driver hi556_i2c_driver = { |
1360 | .driver = { |
1361 | .name = "hi556" , |
1362 | .acpi_match_table = ACPI_PTR(hi556_acpi_ids), |
1363 | }, |
1364 | .probe = hi556_probe, |
1365 | .remove = hi556_remove, |
1366 | .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE, |
1367 | }; |
1368 | |
1369 | module_i2c_driver(hi556_i2c_driver); |
1370 | |
1371 | MODULE_AUTHOR("Shawn Tu" ); |
1372 | MODULE_DESCRIPTION("Hynix HI556 sensor driver" ); |
1373 | MODULE_LICENSE("GPL v2" ); |
1374 | |