1 | /* |
2 | * Driver for simple i2c audio chips. |
3 | * |
4 | * Copyright (c) 2000 Gerd Knorr |
5 | * based on code by: |
6 | * Eric Sandeen (eric_sandeen@bigfoot.com) |
7 | * Steve VanDeBogart (vandebo@uclink.berkeley.edu) |
8 | * Greg Alexander (galexand@acm.org) |
9 | * |
10 | * For the TDA9875 part: |
11 | * Copyright (c) 2000 Guillaume Delvit based on Gerd Knorr source |
12 | * and Eric Sandeen |
13 | * |
14 | * Copyright(c) 2005-2008 Mauro Carvalho Chehab |
15 | * - Some cleanups, code fixes, etc |
16 | * - Convert it to V4L2 API |
17 | * |
18 | * This code is placed under the terms of the GNU General Public License |
19 | * |
20 | * OPTIONS: |
21 | * debug - set to 1 if you'd like to see debug messages |
22 | * |
23 | */ |
24 | |
25 | #include <linux/module.h> |
26 | #include <linux/kernel.h> |
27 | #include <linux/sched.h> |
28 | #include <linux/string.h> |
29 | #include <linux/timer.h> |
30 | #include <linux/delay.h> |
31 | #include <linux/errno.h> |
32 | #include <linux/slab.h> |
33 | #include <linux/videodev2.h> |
34 | #include <linux/i2c.h> |
35 | #include <linux/init.h> |
36 | #include <linux/kthread.h> |
37 | #include <linux/freezer.h> |
38 | |
39 | #include <media/i2c/tvaudio.h> |
40 | #include <media/v4l2-device.h> |
41 | #include <media/v4l2-ctrls.h> |
42 | |
43 | /* ---------------------------------------------------------------------- */ |
44 | /* insmod args */ |
45 | |
46 | static int debug; /* insmod parameter */ |
47 | module_param(debug, int, 0644); |
48 | |
49 | MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips" ); |
50 | MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr" ); |
51 | MODULE_LICENSE("GPL" ); |
52 | |
53 | #define UNSET (-1U) |
54 | |
55 | /* ---------------------------------------------------------------------- */ |
56 | /* our structs */ |
57 | |
58 | #define MAXREGS 256 |
59 | |
60 | struct CHIPSTATE; |
61 | typedef int (*getvalue)(int); |
62 | typedef int (*checkit)(struct CHIPSTATE*); |
63 | typedef int (*initialize)(struct CHIPSTATE*); |
64 | typedef int (*getrxsubchans)(struct CHIPSTATE *); |
65 | typedef void (*setaudmode)(struct CHIPSTATE*, int mode); |
66 | |
67 | /* i2c command */ |
68 | typedef struct AUDIOCMD { |
69 | int count; /* # of bytes to send */ |
70 | unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */ |
71 | } audiocmd; |
72 | |
73 | /* chip description */ |
74 | struct CHIPDESC { |
75 | char *name; /* chip name */ |
76 | int addr_lo, addr_hi; /* i2c address range */ |
77 | int registers; /* # of registers */ |
78 | |
79 | int *insmodopt; |
80 | checkit checkit; |
81 | initialize initialize; |
82 | int flags; |
83 | #define CHIP_HAS_VOLUME 1 |
84 | #define CHIP_HAS_BASSTREBLE 2 |
85 | #define CHIP_HAS_INPUTSEL 4 |
86 | #define CHIP_NEED_CHECKMODE 8 |
87 | |
88 | /* various i2c command sequences */ |
89 | audiocmd init; |
90 | |
91 | /* which register has which value */ |
92 | int leftreg, rightreg, treblereg, bassreg; |
93 | |
94 | /* initialize with (defaults to 65535/32768/32768 */ |
95 | int volinit, trebleinit, bassinit; |
96 | |
97 | /* functions to convert the values (v4l -> chip) */ |
98 | getvalue volfunc, treblefunc, bassfunc; |
99 | |
100 | /* get/set mode */ |
101 | getrxsubchans getrxsubchans; |
102 | setaudmode setaudmode; |
103 | |
104 | /* input switch register + values for v4l inputs */ |
105 | int inputreg; |
106 | int inputmap[4]; |
107 | int inputmute; |
108 | int inputmask; |
109 | }; |
110 | |
111 | /* current state of the chip */ |
112 | struct CHIPSTATE { |
113 | struct v4l2_subdev sd; |
114 | struct v4l2_ctrl_handler hdl; |
115 | struct { |
116 | /* volume/balance cluster */ |
117 | struct v4l2_ctrl *volume; |
118 | struct v4l2_ctrl *balance; |
119 | }; |
120 | |
121 | /* chip-specific description - should point to |
122 | an entry at CHIPDESC table */ |
123 | struct CHIPDESC *desc; |
124 | |
125 | /* shadow register set */ |
126 | audiocmd shadow; |
127 | |
128 | /* current settings */ |
129 | u16 muted; |
130 | int prevmode; |
131 | int radio; |
132 | int input; |
133 | |
134 | /* thread */ |
135 | struct task_struct *thread; |
136 | struct timer_list wt; |
137 | int audmode; |
138 | }; |
139 | |
140 | static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd) |
141 | { |
142 | return container_of(sd, struct CHIPSTATE, sd); |
143 | } |
144 | |
145 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) |
146 | { |
147 | return &container_of(ctrl->handler, struct CHIPSTATE, hdl)->sd; |
148 | } |
149 | |
150 | |
151 | /* ---------------------------------------------------------------------- */ |
152 | /* i2c I/O functions */ |
153 | |
154 | static int chip_write(struct CHIPSTATE *chip, int subaddr, int val) |
155 | { |
156 | struct v4l2_subdev *sd = &chip->sd; |
157 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
158 | unsigned char buffer[2]; |
159 | int rc; |
160 | |
161 | if (subaddr < 0) { |
162 | v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n" , val); |
163 | chip->shadow.bytes[1] = val; |
164 | buffer[0] = val; |
165 | rc = i2c_master_send(client: c, buf: buffer, count: 1); |
166 | if (rc != 1) { |
167 | v4l2_warn(sd, "I/O error (write 0x%x)\n" , val); |
168 | if (rc < 0) |
169 | return rc; |
170 | return -EIO; |
171 | } |
172 | } else { |
173 | if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) { |
174 | v4l2_info(sd, |
175 | "Tried to access a non-existent register: %d\n" , |
176 | subaddr); |
177 | return -EINVAL; |
178 | } |
179 | |
180 | v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n" , |
181 | subaddr, val); |
182 | chip->shadow.bytes[subaddr+1] = val; |
183 | buffer[0] = subaddr; |
184 | buffer[1] = val; |
185 | rc = i2c_master_send(client: c, buf: buffer, count: 2); |
186 | if (rc != 2) { |
187 | v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n" , |
188 | subaddr, val); |
189 | if (rc < 0) |
190 | return rc; |
191 | return -EIO; |
192 | } |
193 | } |
194 | return 0; |
195 | } |
196 | |
197 | static int chip_write_masked(struct CHIPSTATE *chip, |
198 | int subaddr, int val, int mask) |
199 | { |
200 | struct v4l2_subdev *sd = &chip->sd; |
201 | |
202 | if (mask != 0) { |
203 | if (subaddr < 0) { |
204 | val = (chip->shadow.bytes[1] & ~mask) | (val & mask); |
205 | } else { |
206 | if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) { |
207 | v4l2_info(sd, |
208 | "Tried to access a non-existent register: %d\n" , |
209 | subaddr); |
210 | return -EINVAL; |
211 | } |
212 | |
213 | val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask); |
214 | } |
215 | } |
216 | return chip_write(chip, subaddr, val); |
217 | } |
218 | |
219 | static int chip_read(struct CHIPSTATE *chip) |
220 | { |
221 | struct v4l2_subdev *sd = &chip->sd; |
222 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
223 | unsigned char buffer; |
224 | int rc; |
225 | |
226 | rc = i2c_master_recv(client: c, buf: &buffer, count: 1); |
227 | if (rc != 1) { |
228 | v4l2_warn(sd, "I/O error (read)\n" ); |
229 | if (rc < 0) |
230 | return rc; |
231 | return -EIO; |
232 | } |
233 | v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n" , buffer); |
234 | return buffer; |
235 | } |
236 | |
237 | static int chip_read2(struct CHIPSTATE *chip, int subaddr) |
238 | { |
239 | struct v4l2_subdev *sd = &chip->sd; |
240 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
241 | int rc; |
242 | unsigned char write[1]; |
243 | unsigned char read[1]; |
244 | struct i2c_msg msgs[2] = { |
245 | { |
246 | .addr = c->addr, |
247 | .len = 1, |
248 | .buf = write |
249 | }, |
250 | { |
251 | .addr = c->addr, |
252 | .flags = I2C_M_RD, |
253 | .len = 1, |
254 | .buf = read |
255 | } |
256 | }; |
257 | |
258 | write[0] = subaddr; |
259 | |
260 | rc = i2c_transfer(adap: c->adapter, msgs, num: 2); |
261 | if (rc != 2) { |
262 | v4l2_warn(sd, "I/O error (read2)\n" ); |
263 | if (rc < 0) |
264 | return rc; |
265 | return -EIO; |
266 | } |
267 | v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n" , |
268 | subaddr, read[0]); |
269 | return read[0]; |
270 | } |
271 | |
272 | static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd) |
273 | { |
274 | struct v4l2_subdev *sd = &chip->sd; |
275 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
276 | int i, rc; |
277 | |
278 | if (0 == cmd->count) |
279 | return 0; |
280 | |
281 | if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) { |
282 | v4l2_info(sd, |
283 | "Tried to access a non-existent register range: %d to %d\n" , |
284 | cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1); |
285 | return -EINVAL; |
286 | } |
287 | |
288 | /* FIXME: it seems that the shadow bytes are wrong below !*/ |
289 | |
290 | /* update our shadow register set; print bytes if (debug > 0) */ |
291 | v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:" , |
292 | name, cmd->bytes[0]); |
293 | for (i = 1; i < cmd->count; i++) { |
294 | if (debug) |
295 | printk(KERN_CONT " 0x%x" , cmd->bytes[i]); |
296 | chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i]; |
297 | } |
298 | if (debug) |
299 | printk(KERN_CONT "\n" ); |
300 | |
301 | /* send data to the chip */ |
302 | rc = i2c_master_send(client: c, buf: cmd->bytes, count: cmd->count); |
303 | if (rc != cmd->count) { |
304 | v4l2_warn(sd, "I/O error (%s)\n" , name); |
305 | if (rc < 0) |
306 | return rc; |
307 | return -EIO; |
308 | } |
309 | return 0; |
310 | } |
311 | |
312 | /* ---------------------------------------------------------------------- */ |
313 | /* kernel thread for doing i2c stuff asyncronly |
314 | * right now it is used only to check the audio mode (mono/stereo/whatever) |
315 | * some time after switching to another TV channel, then turn on stereo |
316 | * if available, ... |
317 | */ |
318 | |
319 | static void chip_thread_wake(struct timer_list *t) |
320 | { |
321 | struct CHIPSTATE *chip = from_timer(chip, t, wt); |
322 | wake_up_process(tsk: chip->thread); |
323 | } |
324 | |
325 | static int chip_thread(void *data) |
326 | { |
327 | struct CHIPSTATE *chip = data; |
328 | struct CHIPDESC *desc = chip->desc; |
329 | struct v4l2_subdev *sd = &chip->sd; |
330 | int mode, selected; |
331 | |
332 | v4l2_dbg(1, debug, sd, "thread started\n" ); |
333 | set_freezable(); |
334 | for (;;) { |
335 | set_current_state(TASK_INTERRUPTIBLE); |
336 | if (!kthread_should_stop()) |
337 | schedule(); |
338 | set_current_state(TASK_RUNNING); |
339 | try_to_freeze(); |
340 | if (kthread_should_stop()) |
341 | break; |
342 | v4l2_dbg(1, debug, sd, "thread wakeup\n" ); |
343 | |
344 | /* don't do anything for radio */ |
345 | if (chip->radio) |
346 | continue; |
347 | |
348 | /* have a look what's going on */ |
349 | mode = desc->getrxsubchans(chip); |
350 | if (mode == chip->prevmode) |
351 | continue; |
352 | |
353 | /* chip detected a new audio mode - set it */ |
354 | v4l2_dbg(1, debug, sd, "thread checkmode\n" ); |
355 | |
356 | chip->prevmode = mode; |
357 | |
358 | selected = V4L2_TUNER_MODE_MONO; |
359 | switch (chip->audmode) { |
360 | case V4L2_TUNER_MODE_MONO: |
361 | if (mode & V4L2_TUNER_SUB_LANG1) |
362 | selected = V4L2_TUNER_MODE_LANG1; |
363 | break; |
364 | case V4L2_TUNER_MODE_STEREO: |
365 | case V4L2_TUNER_MODE_LANG1: |
366 | if (mode & V4L2_TUNER_SUB_LANG1) |
367 | selected = V4L2_TUNER_MODE_LANG1; |
368 | else if (mode & V4L2_TUNER_SUB_STEREO) |
369 | selected = V4L2_TUNER_MODE_STEREO; |
370 | break; |
371 | case V4L2_TUNER_MODE_LANG2: |
372 | if (mode & V4L2_TUNER_SUB_LANG2) |
373 | selected = V4L2_TUNER_MODE_LANG2; |
374 | else if (mode & V4L2_TUNER_SUB_STEREO) |
375 | selected = V4L2_TUNER_MODE_STEREO; |
376 | break; |
377 | case V4L2_TUNER_MODE_LANG1_LANG2: |
378 | if (mode & V4L2_TUNER_SUB_LANG2) |
379 | selected = V4L2_TUNER_MODE_LANG1_LANG2; |
380 | else if (mode & V4L2_TUNER_SUB_STEREO) |
381 | selected = V4L2_TUNER_MODE_STEREO; |
382 | } |
383 | desc->setaudmode(chip, selected); |
384 | |
385 | /* schedule next check */ |
386 | mod_timer(timer: &chip->wt, expires: jiffies+msecs_to_jiffies(m: 2000)); |
387 | } |
388 | |
389 | v4l2_dbg(1, debug, sd, "thread exiting\n" ); |
390 | return 0; |
391 | } |
392 | |
393 | /* ---------------------------------------------------------------------- */ |
394 | /* audio chip descriptions - defines+functions for tda9840 */ |
395 | |
396 | #define TDA9840_SW 0x00 |
397 | #define TDA9840_LVADJ 0x02 |
398 | #define TDA9840_STADJ 0x03 |
399 | #define TDA9840_TEST 0x04 |
400 | |
401 | #define TDA9840_MONO 0x10 |
402 | #define TDA9840_STEREO 0x2a |
403 | #define TDA9840_DUALA 0x12 |
404 | #define TDA9840_DUALB 0x1e |
405 | #define TDA9840_DUALAB 0x1a |
406 | #define TDA9840_DUALBA 0x16 |
407 | #define TDA9840_EXTERNAL 0x7a |
408 | |
409 | #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */ |
410 | #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */ |
411 | #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */ |
412 | |
413 | #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */ |
414 | #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */ |
415 | |
416 | static int tda9840_getrxsubchans(struct CHIPSTATE *chip) |
417 | { |
418 | struct v4l2_subdev *sd = &chip->sd; |
419 | int val, mode; |
420 | |
421 | mode = V4L2_TUNER_SUB_MONO; |
422 | |
423 | val = chip_read(chip); |
424 | if (val < 0) |
425 | return mode; |
426 | |
427 | if (val & TDA9840_DS_DUAL) |
428 | mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; |
429 | if (val & TDA9840_ST_STEREO) |
430 | mode = V4L2_TUNER_SUB_STEREO; |
431 | |
432 | v4l2_dbg(1, debug, sd, |
433 | "tda9840_getrxsubchans(): raw chip read: %d, return: %d\n" , |
434 | val, mode); |
435 | return mode; |
436 | } |
437 | |
438 | static void tda9840_setaudmode(struct CHIPSTATE *chip, int mode) |
439 | { |
440 | int update = 1; |
441 | int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e; |
442 | |
443 | switch (mode) { |
444 | case V4L2_TUNER_MODE_MONO: |
445 | t |= TDA9840_MONO; |
446 | break; |
447 | case V4L2_TUNER_MODE_STEREO: |
448 | t |= TDA9840_STEREO; |
449 | break; |
450 | case V4L2_TUNER_MODE_LANG1: |
451 | t |= TDA9840_DUALA; |
452 | break; |
453 | case V4L2_TUNER_MODE_LANG2: |
454 | t |= TDA9840_DUALB; |
455 | break; |
456 | case V4L2_TUNER_MODE_LANG1_LANG2: |
457 | t |= TDA9840_DUALAB; |
458 | break; |
459 | default: |
460 | update = 0; |
461 | } |
462 | |
463 | if (update) |
464 | chip_write(chip, TDA9840_SW, val: t); |
465 | } |
466 | |
467 | static int tda9840_checkit(struct CHIPSTATE *chip) |
468 | { |
469 | int rc; |
470 | |
471 | rc = chip_read(chip); |
472 | if (rc < 0) |
473 | return 0; |
474 | |
475 | |
476 | /* lower 5 bits should be 0 */ |
477 | return ((rc & 0x1f) == 0) ? 1 : 0; |
478 | } |
479 | |
480 | /* ---------------------------------------------------------------------- */ |
481 | /* audio chip descriptions - defines+functions for tda985x */ |
482 | |
483 | /* subaddresses for TDA9855 */ |
484 | #define TDA9855_VR 0x00 /* Volume, right */ |
485 | #define TDA9855_VL 0x01 /* Volume, left */ |
486 | #define TDA9855_BA 0x02 /* Bass */ |
487 | #define TDA9855_TR 0x03 /* Treble */ |
488 | #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */ |
489 | |
490 | /* subaddresses for TDA9850 */ |
491 | #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */ |
492 | |
493 | /* subaddesses for both chips */ |
494 | #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */ |
495 | #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */ |
496 | #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */ |
497 | #define TDA985x_A1 0x08 /* Alignment 1 for both chips */ |
498 | #define TDA985x_A2 0x09 /* Alignment 2 for both chips */ |
499 | #define TDA985x_A3 0x0a /* Alignment 3 for both chips */ |
500 | |
501 | /* Masks for bits in TDA9855 subaddresses */ |
502 | /* 0x00 - VR in TDA9855 */ |
503 | /* 0x01 - VL in TDA9855 */ |
504 | /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f) |
505 | * in 1dB steps - mute is 0x27 */ |
506 | |
507 | |
508 | /* 0x02 - BA in TDA9855 */ |
509 | /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19) |
510 | * in .5dB steps - 0 is 0x0E */ |
511 | |
512 | |
513 | /* 0x03 - TR in TDA9855 */ |
514 | /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb) |
515 | * in 3dB steps - 0 is 0x7 */ |
516 | |
517 | /* Masks for bits in both chips' subaddresses */ |
518 | /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */ |
519 | /* Unique to TDA9855: */ |
520 | /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf) |
521 | * in 3dB steps - mute is 0x0 */ |
522 | |
523 | /* Unique to TDA9850: */ |
524 | /* lower 4 bits control stereo noise threshold, over which stereo turns off |
525 | * set to values of 0x00 through 0x0f for Ster1 through Ster16 */ |
526 | |
527 | |
528 | /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/ |
529 | /* Unique to TDA9855: */ |
530 | #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */ |
531 | #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */ |
532 | #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */ |
533 | #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */ |
534 | /* Bits 0 to 3 select various combinations |
535 | * of line in and line out, only the |
536 | * interesting ones are defined */ |
537 | #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */ |
538 | #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */ |
539 | |
540 | /* Unique to TDA9850: */ |
541 | /* lower 4 bits control SAP noise threshold, over which SAP turns off |
542 | * set to values of 0x00 through 0x0f for SAP1 through SAP16 */ |
543 | |
544 | |
545 | /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */ |
546 | /* Common to TDA9855 and TDA9850: */ |
547 | #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */ |
548 | #define TDA985x_MONOSAP 2<<6 /* Selects Mono on left, SAP on right */ |
549 | #define TDA985x_STEREO 1<<6 /* Selects Stereo output, mono if not received */ |
550 | #define TDA985x_MONO 0 /* Forces Mono output */ |
551 | #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */ |
552 | |
553 | /* Unique to TDA9855: */ |
554 | #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */ |
555 | #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/ |
556 | #define TDA9855_LINEAR 0 /* Linear Stereo */ |
557 | #define TDA9855_PSEUDO 1 /* Pseudo Stereo */ |
558 | #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */ |
559 | #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */ |
560 | #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/ |
561 | |
562 | /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */ |
563 | /* Common to both TDA9855 and TDA9850: */ |
564 | /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF) |
565 | * in .5dB steps - 0dB is 0x7 */ |
566 | |
567 | /* 0x08, 0x09 - A1 and A2 (read/write) */ |
568 | /* Common to both TDA9855 and TDA9850: */ |
569 | /* lower 5 bites are wideband and spectral expander alignment |
570 | * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */ |
571 | #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */ |
572 | #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */ |
573 | #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/ |
574 | |
575 | /* 0x0a - A3 */ |
576 | /* Common to both TDA9855 and TDA9850: */ |
577 | /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1), |
578 | * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */ |
579 | #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */ |
580 | |
581 | static int tda9855_volume(int val) { return val/0x2e8+0x27; } |
582 | static int tda9855_bass(int val) { return val/0xccc+0x06; } |
583 | static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; } |
584 | |
585 | static int tda985x_getrxsubchans(struct CHIPSTATE *chip) |
586 | { |
587 | int mode, val; |
588 | |
589 | /* Add mono mode regardless of SAP and stereo */ |
590 | /* Allows forced mono */ |
591 | mode = V4L2_TUNER_SUB_MONO; |
592 | val = chip_read(chip); |
593 | if (val < 0) |
594 | return mode; |
595 | |
596 | if (val & TDA985x_STP) |
597 | mode = V4L2_TUNER_SUB_STEREO; |
598 | if (val & TDA985x_SAPP) |
599 | mode |= V4L2_TUNER_SUB_SAP; |
600 | return mode; |
601 | } |
602 | |
603 | static void tda985x_setaudmode(struct CHIPSTATE *chip, int mode) |
604 | { |
605 | int update = 1; |
606 | int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f; |
607 | |
608 | switch (mode) { |
609 | case V4L2_TUNER_MODE_MONO: |
610 | c6 |= TDA985x_MONO; |
611 | break; |
612 | case V4L2_TUNER_MODE_STEREO: |
613 | case V4L2_TUNER_MODE_LANG1: |
614 | c6 |= TDA985x_STEREO; |
615 | break; |
616 | case V4L2_TUNER_MODE_SAP: |
617 | c6 |= TDA985x_SAP; |
618 | break; |
619 | case V4L2_TUNER_MODE_LANG1_LANG2: |
620 | c6 |= TDA985x_MONOSAP; |
621 | break; |
622 | default: |
623 | update = 0; |
624 | } |
625 | if (update) |
626 | chip_write(chip,TDA985x_C6,val: c6); |
627 | } |
628 | |
629 | |
630 | /* ---------------------------------------------------------------------- */ |
631 | /* audio chip descriptions - defines+functions for tda9873h */ |
632 | |
633 | /* Subaddresses for TDA9873H */ |
634 | |
635 | #define TDA9873_SW 0x00 /* Switching */ |
636 | #define TDA9873_AD 0x01 /* Adjust */ |
637 | #define TDA9873_PT 0x02 /* Port */ |
638 | |
639 | /* Subaddress 0x00: Switching Data |
640 | * B7..B0: |
641 | * |
642 | * B1, B0: Input source selection |
643 | * 0, 0 internal |
644 | * 1, 0 external stereo |
645 | * 0, 1 external mono |
646 | */ |
647 | #define TDA9873_INP_MASK 3 |
648 | #define TDA9873_INTERNAL 0 |
649 | #define TDA9873_EXT_STEREO 2 |
650 | #define TDA9873_EXT_MONO 1 |
651 | |
652 | /* B3, B2: output signal select |
653 | * B4 : transmission mode |
654 | * 0, 0, 1 Mono |
655 | * 1, 0, 0 Stereo |
656 | * 1, 1, 1 Stereo (reversed channel) |
657 | * 0, 0, 0 Dual AB |
658 | * 0, 0, 1 Dual AA |
659 | * 0, 1, 0 Dual BB |
660 | * 0, 1, 1 Dual BA |
661 | */ |
662 | |
663 | #define TDA9873_TR_MASK (7 << 2) |
664 | #define TDA9873_TR_MONO 4 |
665 | #define TDA9873_TR_STEREO 1 << 4 |
666 | #define TDA9873_TR_REVERSE ((1 << 3) | (1 << 2)) |
667 | #define TDA9873_TR_DUALA 1 << 2 |
668 | #define TDA9873_TR_DUALB 1 << 3 |
669 | #define TDA9873_TR_DUALAB 0 |
670 | |
671 | /* output level controls |
672 | * B5: output level switch (0 = reduced gain, 1 = normal gain) |
673 | * B6: mute (1 = muted) |
674 | * B7: auto-mute (1 = auto-mute enabled) |
675 | */ |
676 | |
677 | #define TDA9873_GAIN_NORMAL 1 << 5 |
678 | #define TDA9873_MUTE 1 << 6 |
679 | #define TDA9873_AUTOMUTE 1 << 7 |
680 | |
681 | /* Subaddress 0x01: Adjust/standard */ |
682 | |
683 | /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB) |
684 | * Recommended value is +0 dB |
685 | */ |
686 | |
687 | #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */ |
688 | |
689 | /* Bits C6..C4 control FM stantard |
690 | * C6, C5, C4 |
691 | * 0, 0, 0 B/G (PAL FM) |
692 | * 0, 0, 1 M |
693 | * 0, 1, 0 D/K(1) |
694 | * 0, 1, 1 D/K(2) |
695 | * 1, 0, 0 D/K(3) |
696 | * 1, 0, 1 I |
697 | */ |
698 | #define TDA9873_BG 0 |
699 | #define TDA9873_M 1 |
700 | #define TDA9873_DK1 2 |
701 | #define TDA9873_DK2 3 |
702 | #define TDA9873_DK3 4 |
703 | #define TDA9873_I 5 |
704 | |
705 | /* C7 controls identification response time (1=fast/0=normal) |
706 | */ |
707 | #define TDA9873_IDR_NORM 0 |
708 | #define TDA9873_IDR_FAST 1 << 7 |
709 | |
710 | |
711 | /* Subaddress 0x02: Port data */ |
712 | |
713 | /* E1, E0 free programmable ports P1/P2 |
714 | 0, 0 both ports low |
715 | 0, 1 P1 high |
716 | 1, 0 P2 high |
717 | 1, 1 both ports high |
718 | */ |
719 | |
720 | #define TDA9873_PORTS 3 |
721 | |
722 | /* E2: test port */ |
723 | #define TDA9873_TST_PORT 1 << 2 |
724 | |
725 | /* E5..E3 control mono output channel (together with transmission mode bit B4) |
726 | * |
727 | * E5 E4 E3 B4 OUTM |
728 | * 0 0 0 0 mono |
729 | * 0 0 1 0 DUAL B |
730 | * 0 1 0 1 mono (from stereo decoder) |
731 | */ |
732 | #define TDA9873_MOUT_MONO 0 |
733 | #define TDA9873_MOUT_FMONO 0 |
734 | #define TDA9873_MOUT_DUALA 0 |
735 | #define TDA9873_MOUT_DUALB 1 << 3 |
736 | #define TDA9873_MOUT_ST 1 << 4 |
737 | #define TDA9873_MOUT_EXTM ((1 << 4) | (1 << 3)) |
738 | #define TDA9873_MOUT_EXTL 1 << 5 |
739 | #define TDA9873_MOUT_EXTR ((1 << 5) | (1 << 3)) |
740 | #define TDA9873_MOUT_EXTLR ((1 << 5) | (1 << 4)) |
741 | #define TDA9873_MOUT_MUTE ((1 << 5) | (1 << 4) | (1 << 3)) |
742 | |
743 | /* Status bits: (chip read) */ |
744 | #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */ |
745 | #define TDA9873_STEREO 2 /* Stereo sound is identified */ |
746 | #define TDA9873_DUAL 4 /* Dual sound is identified */ |
747 | |
748 | static int tda9873_getrxsubchans(struct CHIPSTATE *chip) |
749 | { |
750 | struct v4l2_subdev *sd = &chip->sd; |
751 | int val,mode; |
752 | |
753 | mode = V4L2_TUNER_SUB_MONO; |
754 | |
755 | val = chip_read(chip); |
756 | if (val < 0) |
757 | return mode; |
758 | |
759 | if (val & TDA9873_STEREO) |
760 | mode = V4L2_TUNER_SUB_STEREO; |
761 | if (val & TDA9873_DUAL) |
762 | mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; |
763 | v4l2_dbg(1, debug, sd, |
764 | "tda9873_getrxsubchans(): raw chip read: %d, return: %d\n" , |
765 | val, mode); |
766 | return mode; |
767 | } |
768 | |
769 | static void tda9873_setaudmode(struct CHIPSTATE *chip, int mode) |
770 | { |
771 | struct v4l2_subdev *sd = &chip->sd; |
772 | int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK; |
773 | /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */ |
774 | |
775 | if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) { |
776 | v4l2_dbg(1, debug, sd, |
777 | "tda9873_setaudmode(): external input\n" ); |
778 | return; |
779 | } |
780 | |
781 | v4l2_dbg(1, debug, sd, |
782 | "tda9873_setaudmode(): chip->shadow.bytes[%d] = %d\n" , |
783 | TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]); |
784 | v4l2_dbg(1, debug, sd, "tda9873_setaudmode(): sw_data = %d\n" , |
785 | sw_data); |
786 | |
787 | switch (mode) { |
788 | case V4L2_TUNER_MODE_MONO: |
789 | sw_data |= TDA9873_TR_MONO; |
790 | break; |
791 | case V4L2_TUNER_MODE_STEREO: |
792 | sw_data |= TDA9873_TR_STEREO; |
793 | break; |
794 | case V4L2_TUNER_MODE_LANG1: |
795 | sw_data |= TDA9873_TR_DUALA; |
796 | break; |
797 | case V4L2_TUNER_MODE_LANG2: |
798 | sw_data |= TDA9873_TR_DUALB; |
799 | break; |
800 | case V4L2_TUNER_MODE_LANG1_LANG2: |
801 | sw_data |= TDA9873_TR_DUALAB; |
802 | break; |
803 | default: |
804 | return; |
805 | } |
806 | |
807 | chip_write(chip, TDA9873_SW, val: sw_data); |
808 | v4l2_dbg(1, debug, sd, |
809 | "tda9873_setaudmode(): req. mode %d; chip_write: %d\n" , |
810 | mode, sw_data); |
811 | } |
812 | |
813 | static int tda9873_checkit(struct CHIPSTATE *chip) |
814 | { |
815 | int rc; |
816 | |
817 | rc = chip_read2(chip, subaddr: 254); |
818 | if (rc < 0) |
819 | return 0; |
820 | return (rc & ~0x1f) == 0x80; |
821 | } |
822 | |
823 | |
824 | /* ---------------------------------------------------------------------- */ |
825 | /* audio chip description - defines+functions for tda9874h and tda9874a */ |
826 | /* Dariusz Kowalewski <darekk@automex.pl> */ |
827 | |
828 | /* Subaddresses for TDA9874H and TDA9874A (slave rx) */ |
829 | #define TDA9874A_AGCGR 0x00 /* AGC gain */ |
830 | #define TDA9874A_GCONR 0x01 /* general config */ |
831 | #define TDA9874A_MSR 0x02 /* monitor select */ |
832 | #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */ |
833 | #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */ |
834 | #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */ |
835 | #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */ |
836 | #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */ |
837 | #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */ |
838 | #define TDA9874A_DCR 0x09 /* demodulator config */ |
839 | #define TDA9874A_FMER 0x0a /* FM de-emphasis */ |
840 | #define TDA9874A_FMMR 0x0b /* FM dematrix */ |
841 | #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */ |
842 | #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */ |
843 | #define TDA9874A_NCONR 0x0e /* NICAM config */ |
844 | #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */ |
845 | #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */ |
846 | #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */ |
847 | #define TDA9874A_AMCONR 0x12 /* audio mute control */ |
848 | #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */ |
849 | #define TDA9874A_AOSR 0x14 /* analog output select */ |
850 | #define TDA9874A_DAICONR 0x15 /* digital audio interface config */ |
851 | #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */ |
852 | #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */ |
853 | #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */ |
854 | #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */ |
855 | |
856 | /* Subaddresses for TDA9874H and TDA9874A (slave tx) */ |
857 | #define TDA9874A_DSR 0x00 /* device status */ |
858 | #define TDA9874A_NSR 0x01 /* NICAM status */ |
859 | #define TDA9874A_NECR 0x02 /* NICAM error count */ |
860 | #define TDA9874A_DR1 0x03 /* add. data LSB */ |
861 | #define TDA9874A_DR2 0x04 /* add. data MSB */ |
862 | #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */ |
863 | #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */ |
864 | #define TDA9874A_SIFLR 0x07 /* SIF level */ |
865 | #define TDA9874A_TR2 252 /* test reg. 2 */ |
866 | #define TDA9874A_TR1 253 /* test reg. 1 */ |
867 | #define TDA9874A_DIC 254 /* device id. code */ |
868 | #define TDA9874A_SIC 255 /* software id. code */ |
869 | |
870 | |
871 | static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */ |
872 | static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */ |
873 | static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */ |
874 | static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */ |
875 | static int tda9874a_dic = -1; /* device id. code */ |
876 | |
877 | /* insmod options for tda9874a */ |
878 | static unsigned int tda9874a_SIF = UNSET; |
879 | static unsigned int tda9874a_AMSEL = UNSET; |
880 | static unsigned int tda9874a_STD = UNSET; |
881 | module_param(tda9874a_SIF, int, 0444); |
882 | module_param(tda9874a_AMSEL, int, 0444); |
883 | module_param(tda9874a_STD, int, 0444); |
884 | |
885 | /* |
886 | * initialization table for tda9874 decoder: |
887 | * - carrier 1 freq. registers (3 bytes) |
888 | * - carrier 2 freq. registers (3 bytes) |
889 | * - demudulator config register |
890 | * - FM de-emphasis register (slow identification mode) |
891 | * Note: frequency registers must be written in single i2c transfer. |
892 | */ |
893 | static struct tda9874a_MODES { |
894 | char *name; |
895 | audiocmd cmd; |
896 | } tda9874a_modelist[9] = { |
897 | { "A2, B/G" , /* default */ |
898 | { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} }, |
899 | { "A2, M (Korea)" , |
900 | { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} }, |
901 | { "A2, D/K (1)" , |
902 | { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} }, |
903 | { "A2, D/K (2)" , |
904 | { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} }, |
905 | { "A2, D/K (3)" , |
906 | { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} }, |
907 | { "NICAM, I" , |
908 | { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} }, |
909 | { "NICAM, B/G" , |
910 | { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} }, |
911 | { "NICAM, D/K" , |
912 | { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} }, |
913 | { "NICAM, L" , |
914 | { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} } |
915 | }; |
916 | |
917 | static int tda9874a_setup(struct CHIPSTATE *chip) |
918 | { |
919 | struct v4l2_subdev *sd = &chip->sd; |
920 | |
921 | chip_write(chip, TDA9874A_AGCGR, val: 0x00); /* 0 dB */ |
922 | chip_write(chip, TDA9874A_GCONR, val: tda9874a_GCONR); |
923 | chip_write(chip, TDA9874A_MSR, val: (tda9874a_mode) ? 0x03:0x02); |
924 | if(tda9874a_dic == 0x11) { |
925 | chip_write(chip, TDA9874A_FMMR, val: 0x80); |
926 | } else { /* dic == 0x07 */ |
927 | chip_cmd(chip,name: "tda9874_modelist" ,cmd: &tda9874a_modelist[tda9874a_STD].cmd); |
928 | chip_write(chip, TDA9874A_FMMR, val: 0x00); |
929 | } |
930 | chip_write(chip, TDA9874A_C1OLAR, val: 0x00); /* 0 dB */ |
931 | chip_write(chip, TDA9874A_C2OLAR, val: 0x00); /* 0 dB */ |
932 | chip_write(chip, TDA9874A_NCONR, val: tda9874a_NCONR); |
933 | chip_write(chip, TDA9874A_NOLAR, val: 0x00); /* 0 dB */ |
934 | /* Note: If signal quality is poor you may want to change NICAM */ |
935 | /* error limit registers (NLELR and NUELR) to some greater values. */ |
936 | /* Then the sound would remain stereo, but won't be so clear. */ |
937 | chip_write(chip, TDA9874A_NLELR, val: 0x14); /* default */ |
938 | chip_write(chip, TDA9874A_NUELR, val: 0x50); /* default */ |
939 | |
940 | if(tda9874a_dic == 0x11) { |
941 | chip_write(chip, TDA9874A_AMCONR, val: 0xf9); |
942 | chip_write(chip, TDA9874A_SDACOSR, val: (tda9874a_mode) ? 0x81:0x80); |
943 | chip_write(chip, TDA9874A_AOSR, val: 0x80); |
944 | chip_write(chip, TDA9874A_MDACOSR, val: (tda9874a_mode) ? 0x82:0x80); |
945 | chip_write(chip, TDA9874A_ESP, val: tda9874a_ESP); |
946 | } else { /* dic == 0x07 */ |
947 | chip_write(chip, TDA9874A_AMCONR, val: 0xfb); |
948 | chip_write(chip, TDA9874A_SDACOSR, val: (tda9874a_mode) ? 0x81:0x80); |
949 | chip_write(chip, TDA9874A_AOSR, val: 0x00); /* or 0x10 */ |
950 | } |
951 | v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n" , |
952 | tda9874a_modelist[tda9874a_STD].name,tda9874a_STD); |
953 | return 1; |
954 | } |
955 | |
956 | static int tda9874a_getrxsubchans(struct CHIPSTATE *chip) |
957 | { |
958 | struct v4l2_subdev *sd = &chip->sd; |
959 | int dsr,nsr,mode; |
960 | int necr; /* just for debugging */ |
961 | |
962 | mode = V4L2_TUNER_SUB_MONO; |
963 | |
964 | dsr = chip_read2(chip, TDA9874A_DSR); |
965 | if (dsr < 0) |
966 | return mode; |
967 | nsr = chip_read2(chip, TDA9874A_NSR); |
968 | if (nsr < 0) |
969 | return mode; |
970 | necr = chip_read2(chip, TDA9874A_NECR); |
971 | if (necr < 0) |
972 | return mode; |
973 | |
974 | /* need to store dsr/nsr somewhere */ |
975 | chip->shadow.bytes[MAXREGS-2] = dsr; |
976 | chip->shadow.bytes[MAXREGS-1] = nsr; |
977 | |
978 | if(tda9874a_mode) { |
979 | /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked. |
980 | * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates |
981 | * that sound has (temporarily) switched from NICAM to |
982 | * mono FM (or AM) on 1st sound carrier due to high NICAM bit |
983 | * error count. So in fact there is no stereo in this case :-( |
984 | * But changing the mode to V4L2_TUNER_MODE_MONO would switch |
985 | * external 4052 multiplexer in audio_hook(). |
986 | */ |
987 | if(nsr & 0x02) /* NSR.S/MB=1 */ |
988 | mode = V4L2_TUNER_SUB_STEREO; |
989 | if(nsr & 0x01) /* NSR.D/SB=1 */ |
990 | mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; |
991 | } else { |
992 | if(dsr & 0x02) /* DSR.IDSTE=1 */ |
993 | mode = V4L2_TUNER_SUB_STEREO; |
994 | if(dsr & 0x04) /* DSR.IDDUA=1 */ |
995 | mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; |
996 | } |
997 | |
998 | v4l2_dbg(1, debug, sd, |
999 | "tda9874a_getrxsubchans(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n" , |
1000 | dsr, nsr, necr, mode); |
1001 | return mode; |
1002 | } |
1003 | |
1004 | static void tda9874a_setaudmode(struct CHIPSTATE *chip, int mode) |
1005 | { |
1006 | struct v4l2_subdev *sd = &chip->sd; |
1007 | |
1008 | /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */ |
1009 | /* If auto-muting is disabled, we can hear a signal of degrading quality. */ |
1010 | if (tda9874a_mode) { |
1011 | if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */ |
1012 | tda9874a_NCONR &= 0xfe; /* enable */ |
1013 | else |
1014 | tda9874a_NCONR |= 0x01; /* disable */ |
1015 | chip_write(chip, TDA9874A_NCONR, val: tda9874a_NCONR); |
1016 | } |
1017 | |
1018 | /* Note: TDA9874A supports automatic FM dematrixing (FMMR register) |
1019 | * and has auto-select function for audio output (AOSR register). |
1020 | * Old TDA9874H doesn't support these features. |
1021 | * TDA9874A also has additional mono output pin (OUTM), which |
1022 | * on same (all?) tv-cards is not used, anyway (as well as MONOIN). |
1023 | */ |
1024 | if(tda9874a_dic == 0x11) { |
1025 | int aosr = 0x80; |
1026 | int mdacosr = (tda9874a_mode) ? 0x82:0x80; |
1027 | |
1028 | switch(mode) { |
1029 | case V4L2_TUNER_MODE_MONO: |
1030 | case V4L2_TUNER_MODE_STEREO: |
1031 | break; |
1032 | case V4L2_TUNER_MODE_LANG1: |
1033 | aosr = 0x80; /* auto-select, dual A/A */ |
1034 | mdacosr = (tda9874a_mode) ? 0x82:0x80; |
1035 | break; |
1036 | case V4L2_TUNER_MODE_LANG2: |
1037 | aosr = 0xa0; /* auto-select, dual B/B */ |
1038 | mdacosr = (tda9874a_mode) ? 0x83:0x81; |
1039 | break; |
1040 | case V4L2_TUNER_MODE_LANG1_LANG2: |
1041 | aosr = 0x00; /* always route L to L and R to R */ |
1042 | mdacosr = (tda9874a_mode) ? 0x82:0x80; |
1043 | break; |
1044 | default: |
1045 | return; |
1046 | } |
1047 | chip_write(chip, TDA9874A_AOSR, val: aosr); |
1048 | chip_write(chip, TDA9874A_MDACOSR, val: mdacosr); |
1049 | |
1050 | v4l2_dbg(1, debug, sd, |
1051 | "tda9874a_setaudmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n" , |
1052 | mode, aosr, mdacosr); |
1053 | |
1054 | } else { /* dic == 0x07 */ |
1055 | int fmmr,aosr; |
1056 | |
1057 | switch(mode) { |
1058 | case V4L2_TUNER_MODE_MONO: |
1059 | fmmr = 0x00; /* mono */ |
1060 | aosr = 0x10; /* A/A */ |
1061 | break; |
1062 | case V4L2_TUNER_MODE_STEREO: |
1063 | if(tda9874a_mode) { |
1064 | fmmr = 0x00; |
1065 | aosr = 0x00; /* handled by NICAM auto-mute */ |
1066 | } else { |
1067 | fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */ |
1068 | aosr = 0x00; |
1069 | } |
1070 | break; |
1071 | case V4L2_TUNER_MODE_LANG1: |
1072 | fmmr = 0x02; /* dual */ |
1073 | aosr = 0x10; /* dual A/A */ |
1074 | break; |
1075 | case V4L2_TUNER_MODE_LANG2: |
1076 | fmmr = 0x02; /* dual */ |
1077 | aosr = 0x20; /* dual B/B */ |
1078 | break; |
1079 | case V4L2_TUNER_MODE_LANG1_LANG2: |
1080 | fmmr = 0x02; /* dual */ |
1081 | aosr = 0x00; /* dual A/B */ |
1082 | break; |
1083 | default: |
1084 | return; |
1085 | } |
1086 | chip_write(chip, TDA9874A_FMMR, val: fmmr); |
1087 | chip_write(chip, TDA9874A_AOSR, val: aosr); |
1088 | |
1089 | v4l2_dbg(1, debug, sd, |
1090 | "tda9874a_setaudmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n" , |
1091 | mode, fmmr, aosr); |
1092 | } |
1093 | } |
1094 | |
1095 | static int tda9874a_checkit(struct CHIPSTATE *chip) |
1096 | { |
1097 | struct v4l2_subdev *sd = &chip->sd; |
1098 | int dic,sic; /* device id. and software id. codes */ |
1099 | |
1100 | dic = chip_read2(chip, TDA9874A_DIC); |
1101 | if (dic < 0) |
1102 | return 0; |
1103 | sic = chip_read2(chip, TDA9874A_SIC); |
1104 | if (sic < 0) |
1105 | return 0; |
1106 | |
1107 | v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n" , dic, sic); |
1108 | |
1109 | if((dic == 0x11)||(dic == 0x07)) { |
1110 | v4l2_info(sd, "found tda9874%s.\n" , (dic == 0x11) ? "a" : "h" ); |
1111 | tda9874a_dic = dic; /* remember device id. */ |
1112 | return 1; |
1113 | } |
1114 | return 0; /* not found */ |
1115 | } |
1116 | |
1117 | static int tda9874a_initialize(struct CHIPSTATE *chip) |
1118 | { |
1119 | if (tda9874a_SIF > 2) |
1120 | tda9874a_SIF = 1; |
1121 | if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist)) |
1122 | tda9874a_STD = 0; |
1123 | if(tda9874a_AMSEL > 1) |
1124 | tda9874a_AMSEL = 0; |
1125 | |
1126 | if(tda9874a_SIF == 1) |
1127 | tda9874a_GCONR = 0xc0; /* sound IF input 1 */ |
1128 | else |
1129 | tda9874a_GCONR = 0xc1; /* sound IF input 2 */ |
1130 | |
1131 | tda9874a_ESP = tda9874a_STD; |
1132 | tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1; |
1133 | |
1134 | if(tda9874a_AMSEL == 0) |
1135 | tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */ |
1136 | else |
1137 | tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */ |
1138 | |
1139 | tda9874a_setup(chip); |
1140 | return 0; |
1141 | } |
1142 | |
1143 | /* ---------------------------------------------------------------------- */ |
1144 | /* audio chip description - defines+functions for tda9875 */ |
1145 | /* The TDA9875 is made by Philips Semiconductor |
1146 | * http://www.semiconductors.philips.com |
1147 | * TDA9875: I2C-bus controlled DSP audio processor, FM demodulator |
1148 | * |
1149 | */ |
1150 | |
1151 | /* subaddresses for TDA9875 */ |
1152 | #define TDA9875_MUT 0x12 /*General mute (value --> 0b11001100*/ |
1153 | #define TDA9875_CFG 0x01 /* Config register (value --> 0b00000000 */ |
1154 | #define TDA9875_DACOS 0x13 /*DAC i/o select (ADC) 0b0000100*/ |
1155 | #define TDA9875_LOSR 0x16 /*Line output select regirter 0b0100 0001*/ |
1156 | |
1157 | #define TDA9875_CH1V 0x0c /*Channel 1 volume (mute)*/ |
1158 | #define TDA9875_CH2V 0x0d /*Channel 2 volume (mute)*/ |
1159 | #define TDA9875_SC1 0x14 /*SCART 1 in (mono)*/ |
1160 | #define TDA9875_SC2 0x15 /*SCART 2 in (mono)*/ |
1161 | |
1162 | #define TDA9875_ADCIS 0x17 /*ADC input select (mono) 0b0110 000*/ |
1163 | #define TDA9875_AER 0x19 /*Audio effect (AVL+Pseudo) 0b0000 0110*/ |
1164 | #define TDA9875_MCS 0x18 /*Main channel select (DAC) 0b0000100*/ |
1165 | #define TDA9875_MVL 0x1a /* Main volume gauche */ |
1166 | #define TDA9875_MVR 0x1b /* Main volume droite */ |
1167 | #define TDA9875_MBA 0x1d /* Main Basse */ |
1168 | #define TDA9875_MTR 0x1e /* Main treble */ |
1169 | #define TDA9875_ACS 0x1f /* Auxiliary channel select (FM) 0b0000000*/ |
1170 | #define TDA9875_AVL 0x20 /* Auxiliary volume gauche */ |
1171 | #define TDA9875_AVR 0x21 /* Auxiliary volume droite */ |
1172 | #define TDA9875_ABA 0x22 /* Auxiliary Basse */ |
1173 | #define TDA9875_ATR 0x23 /* Auxiliary treble */ |
1174 | |
1175 | #define TDA9875_MSR 0x02 /* Monitor select register */ |
1176 | #define TDA9875_C1MSB 0x03 /* Carrier 1 (FM) frequency register MSB */ |
1177 | #define TDA9875_C1MIB 0x04 /* Carrier 1 (FM) frequency register (16-8]b */ |
1178 | #define TDA9875_C1LSB 0x05 /* Carrier 1 (FM) frequency register LSB */ |
1179 | #define TDA9875_C2MSB 0x06 /* Carrier 2 (nicam) frequency register MSB */ |
1180 | #define TDA9875_C2MIB 0x07 /* Carrier 2 (nicam) frequency register (16-8]b */ |
1181 | #define TDA9875_C2LSB 0x08 /* Carrier 2 (nicam) frequency register LSB */ |
1182 | #define TDA9875_DCR 0x09 /* Demodulateur configuration regirter*/ |
1183 | #define TDA9875_DEEM 0x0a /* FM de-emphasis regirter*/ |
1184 | #define TDA9875_FMAT 0x0b /* FM Matrix regirter*/ |
1185 | |
1186 | /* values */ |
1187 | #define TDA9875_MUTE_ON 0xff /* general mute */ |
1188 | #define TDA9875_MUTE_OFF 0xcc /* general no mute */ |
1189 | |
1190 | static int tda9875_initialize(struct CHIPSTATE *chip) |
1191 | { |
1192 | chip_write(chip, TDA9875_CFG, val: 0xd0); /*reg de config 0 (reset)*/ |
1193 | chip_write(chip, TDA9875_MSR, val: 0x03); /* Monitor 0b00000XXX*/ |
1194 | chip_write(chip, TDA9875_C1MSB, val: 0x00); /*Car1(FM) MSB XMHz*/ |
1195 | chip_write(chip, TDA9875_C1MIB, val: 0x00); /*Car1(FM) MIB XMHz*/ |
1196 | chip_write(chip, TDA9875_C1LSB, val: 0x00); /*Car1(FM) LSB XMHz*/ |
1197 | chip_write(chip, TDA9875_C2MSB, val: 0x00); /*Car2(NICAM) MSB XMHz*/ |
1198 | chip_write(chip, TDA9875_C2MIB, val: 0x00); /*Car2(NICAM) MIB XMHz*/ |
1199 | chip_write(chip, TDA9875_C2LSB, val: 0x00); /*Car2(NICAM) LSB XMHz*/ |
1200 | chip_write(chip, TDA9875_DCR, val: 0x00); /*Demod config 0x00*/ |
1201 | chip_write(chip, TDA9875_DEEM, val: 0x44); /*DE-Emph 0b0100 0100*/ |
1202 | chip_write(chip, TDA9875_FMAT, val: 0x00); /*FM Matrix reg 0x00*/ |
1203 | chip_write(chip, TDA9875_SC1, val: 0x00); /* SCART 1 (SC1)*/ |
1204 | chip_write(chip, TDA9875_SC2, val: 0x01); /* SCART 2 (sc2)*/ |
1205 | |
1206 | chip_write(chip, TDA9875_CH1V, val: 0x10); /* Channel volume 1 mute*/ |
1207 | chip_write(chip, TDA9875_CH2V, val: 0x10); /* Channel volume 2 mute */ |
1208 | chip_write(chip, TDA9875_DACOS, val: 0x02); /* sig DAC i/o(in:nicam)*/ |
1209 | chip_write(chip, TDA9875_ADCIS, val: 0x6f); /* sig ADC input(in:mono)*/ |
1210 | chip_write(chip, TDA9875_LOSR, val: 0x00); /* line out (in:mono)*/ |
1211 | chip_write(chip, TDA9875_AER, val: 0x00); /*06 Effect (AVL+PSEUDO) */ |
1212 | chip_write(chip, TDA9875_MCS, val: 0x44); /* Main ch select (DAC) */ |
1213 | chip_write(chip, TDA9875_MVL, val: 0x03); /* Vol Main left 10dB */ |
1214 | chip_write(chip, TDA9875_MVR, val: 0x03); /* Vol Main right 10dB*/ |
1215 | chip_write(chip, TDA9875_MBA, val: 0x00); /* Main Bass Main 0dB*/ |
1216 | chip_write(chip, TDA9875_MTR, val: 0x00); /* Main Treble Main 0dB*/ |
1217 | chip_write(chip, TDA9875_ACS, val: 0x44); /* Aux chan select (dac)*/ |
1218 | chip_write(chip, TDA9875_AVL, val: 0x00); /* Vol Aux left 0dB*/ |
1219 | chip_write(chip, TDA9875_AVR, val: 0x00); /* Vol Aux right 0dB*/ |
1220 | chip_write(chip, TDA9875_ABA, val: 0x00); /* Aux Bass Main 0dB*/ |
1221 | chip_write(chip, TDA9875_ATR, val: 0x00); /* Aux Aigus Main 0dB*/ |
1222 | |
1223 | chip_write(chip, TDA9875_MUT, val: 0xcc); /* General mute */ |
1224 | return 0; |
1225 | } |
1226 | |
1227 | static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); } |
1228 | static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); } |
1229 | static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); } |
1230 | |
1231 | /* ----------------------------------------------------------------------- */ |
1232 | |
1233 | |
1234 | /* *********************** * |
1235 | * i2c interface functions * |
1236 | * *********************** */ |
1237 | |
1238 | static int tda9875_checkit(struct CHIPSTATE *chip) |
1239 | { |
1240 | struct v4l2_subdev *sd = &chip->sd; |
1241 | int dic, rev; |
1242 | |
1243 | dic = chip_read2(chip, subaddr: 254); |
1244 | if (dic < 0) |
1245 | return 0; |
1246 | rev = chip_read2(chip, subaddr: 255); |
1247 | if (rev < 0) |
1248 | return 0; |
1249 | |
1250 | if (dic == 0 || dic == 2) { /* tda9875 and tda9875A */ |
1251 | v4l2_info(sd, "found tda9875%s rev. %d.\n" , |
1252 | dic == 0 ? "" : "A" , rev); |
1253 | return 1; |
1254 | } |
1255 | return 0; |
1256 | } |
1257 | |
1258 | /* ---------------------------------------------------------------------- */ |
1259 | /* audio chip descriptions - defines+functions for tea6420 */ |
1260 | |
1261 | #define TEA6300_VL 0x00 /* volume left */ |
1262 | #define TEA6300_VR 0x01 /* volume right */ |
1263 | #define TEA6300_BA 0x02 /* bass */ |
1264 | #define TEA6300_TR 0x03 /* treble */ |
1265 | #define TEA6300_FA 0x04 /* fader control */ |
1266 | #define TEA6300_S 0x05 /* switch register */ |
1267 | /* values for those registers: */ |
1268 | #define TEA6300_S_SA 0x01 /* stereo A input */ |
1269 | #define TEA6300_S_SB 0x02 /* stereo B */ |
1270 | #define TEA6300_S_SC 0x04 /* stereo C */ |
1271 | #define TEA6300_S_GMU 0x80 /* general mute */ |
1272 | |
1273 | #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */ |
1274 | #define TEA6320_FFR 0x01 /* fader front right (0-5) */ |
1275 | #define TEA6320_FFL 0x02 /* fader front left (0-5) */ |
1276 | #define TEA6320_FRR 0x03 /* fader rear right (0-5) */ |
1277 | #define TEA6320_FRL 0x04 /* fader rear left (0-5) */ |
1278 | #define TEA6320_BA 0x05 /* bass (0-4) */ |
1279 | #define TEA6320_TR 0x06 /* treble (0-4) */ |
1280 | #define TEA6320_S 0x07 /* switch register */ |
1281 | /* values for those registers: */ |
1282 | #define TEA6320_S_SA 0x07 /* stereo A input */ |
1283 | #define TEA6320_S_SB 0x06 /* stereo B */ |
1284 | #define TEA6320_S_SC 0x05 /* stereo C */ |
1285 | #define TEA6320_S_SD 0x04 /* stereo D */ |
1286 | #define TEA6320_S_GMU 0x80 /* general mute */ |
1287 | |
1288 | #define TEA6420_S_SA 0x00 /* stereo A input */ |
1289 | #define TEA6420_S_SB 0x01 /* stereo B */ |
1290 | #define TEA6420_S_SC 0x02 /* stereo C */ |
1291 | #define TEA6420_S_SD 0x03 /* stereo D */ |
1292 | #define TEA6420_S_SE 0x04 /* stereo E */ |
1293 | #define TEA6420_S_GMU 0x05 /* general mute */ |
1294 | |
1295 | static int tea6300_shift10(int val) { return val >> 10; } |
1296 | static int tea6300_shift12(int val) { return val >> 12; } |
1297 | |
1298 | /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */ |
1299 | /* 0x0c mirror those immediately higher) */ |
1300 | static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; } |
1301 | static int tea6320_shift11(int val) { return val >> 11; } |
1302 | static int tea6320_initialize(struct CHIPSTATE * chip) |
1303 | { |
1304 | chip_write(chip, TEA6320_FFR, val: 0x3f); |
1305 | chip_write(chip, TEA6320_FFL, val: 0x3f); |
1306 | chip_write(chip, TEA6320_FRR, val: 0x3f); |
1307 | chip_write(chip, TEA6320_FRL, val: 0x3f); |
1308 | |
1309 | return 0; |
1310 | } |
1311 | |
1312 | |
1313 | /* ---------------------------------------------------------------------- */ |
1314 | /* audio chip descriptions - defines+functions for tda8425 */ |
1315 | |
1316 | #define TDA8425_VL 0x00 /* volume left */ |
1317 | #define TDA8425_VR 0x01 /* volume right */ |
1318 | #define TDA8425_BA 0x02 /* bass */ |
1319 | #define TDA8425_TR 0x03 /* treble */ |
1320 | #define TDA8425_S1 0x08 /* switch functions */ |
1321 | /* values for those registers: */ |
1322 | #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */ |
1323 | #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */ |
1324 | #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */ |
1325 | #define TDA8425_S1_MU 0x20 /* mute bit */ |
1326 | #define TDA8425_S1_STEREO 0x18 /* stereo bits */ |
1327 | #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */ |
1328 | #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */ |
1329 | #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */ |
1330 | #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */ |
1331 | #define TDA8425_S1_ML 0x06 /* language selector */ |
1332 | #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */ |
1333 | #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */ |
1334 | #define TDA8425_S1_ML_STEREO 0x06 /* stereo */ |
1335 | #define TDA8425_S1_IS 0x01 /* channel selector */ |
1336 | |
1337 | |
1338 | static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; } |
1339 | static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; } |
1340 | |
1341 | static void tda8425_setaudmode(struct CHIPSTATE *chip, int mode) |
1342 | { |
1343 | int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1; |
1344 | |
1345 | switch (mode) { |
1346 | case V4L2_TUNER_MODE_LANG1: |
1347 | s1 |= TDA8425_S1_ML_SOUND_A; |
1348 | s1 |= TDA8425_S1_STEREO_PSEUDO; |
1349 | break; |
1350 | case V4L2_TUNER_MODE_LANG2: |
1351 | s1 |= TDA8425_S1_ML_SOUND_B; |
1352 | s1 |= TDA8425_S1_STEREO_PSEUDO; |
1353 | break; |
1354 | case V4L2_TUNER_MODE_LANG1_LANG2: |
1355 | s1 |= TDA8425_S1_ML_STEREO; |
1356 | s1 |= TDA8425_S1_STEREO_LINEAR; |
1357 | break; |
1358 | case V4L2_TUNER_MODE_MONO: |
1359 | s1 |= TDA8425_S1_ML_STEREO; |
1360 | s1 |= TDA8425_S1_STEREO_MONO; |
1361 | break; |
1362 | case V4L2_TUNER_MODE_STEREO: |
1363 | s1 |= TDA8425_S1_ML_STEREO; |
1364 | s1 |= TDA8425_S1_STEREO_SPATIAL; |
1365 | break; |
1366 | default: |
1367 | return; |
1368 | } |
1369 | chip_write(chip,TDA8425_S1,val: s1); |
1370 | } |
1371 | |
1372 | |
1373 | /* ---------------------------------------------------------------------- */ |
1374 | /* audio chip descriptions - defines+functions for pic16c54 (PV951) */ |
1375 | |
1376 | /* the registers of 16C54, I2C sub address. */ |
1377 | #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */ |
1378 | #define PIC16C54_REG_MISC 0x02 |
1379 | |
1380 | /* bit definition of the RESET register, I2C data. */ |
1381 | #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */ |
1382 | /* code of remote controller */ |
1383 | #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */ |
1384 | #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */ |
1385 | #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */ |
1386 | #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */ |
1387 | #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */ |
1388 | #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */ |
1389 | #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */ |
1390 | |
1391 | /* ---------------------------------------------------------------------- */ |
1392 | /* audio chip descriptions - defines+functions for TA8874Z */ |
1393 | |
1394 | /* write 1st byte */ |
1395 | #define TA8874Z_LED_STE 0x80 |
1396 | #define TA8874Z_LED_BIL 0x40 |
1397 | #define TA8874Z_LED_EXT 0x20 |
1398 | #define TA8874Z_MONO_SET 0x10 |
1399 | #define TA8874Z_MUTE 0x08 |
1400 | #define TA8874Z_F_MONO 0x04 |
1401 | #define TA8874Z_MODE_SUB 0x02 |
1402 | #define TA8874Z_MODE_MAIN 0x01 |
1403 | |
1404 | /* write 2nd byte */ |
1405 | /*#define TA8874Z_TI 0x80 */ /* test mode */ |
1406 | #define TA8874Z_SEPARATION 0x3f |
1407 | #define TA8874Z_SEPARATION_DEFAULT 0x10 |
1408 | |
1409 | /* read */ |
1410 | #define TA8874Z_B1 0x80 |
1411 | #define TA8874Z_B0 0x40 |
1412 | #define TA8874Z_CHAG_FLAG 0x20 |
1413 | |
1414 | /* |
1415 | * B1 B0 |
1416 | * mono L H |
1417 | * stereo L L |
1418 | * BIL H L |
1419 | */ |
1420 | static int ta8874z_getrxsubchans(struct CHIPSTATE *chip) |
1421 | { |
1422 | int val, mode; |
1423 | |
1424 | mode = V4L2_TUNER_SUB_MONO; |
1425 | |
1426 | val = chip_read(chip); |
1427 | if (val < 0) |
1428 | return mode; |
1429 | |
1430 | if (val & TA8874Z_B1){ |
1431 | mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; |
1432 | }else if (!(val & TA8874Z_B0)){ |
1433 | mode = V4L2_TUNER_SUB_STEREO; |
1434 | } |
1435 | /* v4l2_dbg(1, debug, &chip->sd, |
1436 | "ta8874z_getrxsubchans(): raw chip read: 0x%02x, return: 0x%02x\n", |
1437 | val, mode); */ |
1438 | return mode; |
1439 | } |
1440 | |
1441 | static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}}; |
1442 | static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}}; |
1443 | static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}}; |
1444 | static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}}; |
1445 | static audiocmd ta8874z_both = {2, { TA8874Z_MODE_MAIN | TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}}; |
1446 | |
1447 | static void ta8874z_setaudmode(struct CHIPSTATE *chip, int mode) |
1448 | { |
1449 | struct v4l2_subdev *sd = &chip->sd; |
1450 | int update = 1; |
1451 | audiocmd *t = NULL; |
1452 | |
1453 | v4l2_dbg(1, debug, sd, "ta8874z_setaudmode(): mode: 0x%02x\n" , mode); |
1454 | |
1455 | switch(mode){ |
1456 | case V4L2_TUNER_MODE_MONO: |
1457 | t = &ta8874z_mono; |
1458 | break; |
1459 | case V4L2_TUNER_MODE_STEREO: |
1460 | t = &ta8874z_stereo; |
1461 | break; |
1462 | case V4L2_TUNER_MODE_LANG1: |
1463 | t = &ta8874z_main; |
1464 | break; |
1465 | case V4L2_TUNER_MODE_LANG2: |
1466 | t = &ta8874z_sub; |
1467 | break; |
1468 | case V4L2_TUNER_MODE_LANG1_LANG2: |
1469 | t = &ta8874z_both; |
1470 | break; |
1471 | default: |
1472 | update = 0; |
1473 | } |
1474 | |
1475 | if(update) |
1476 | chip_cmd(chip, name: "TA8874Z" , cmd: t); |
1477 | } |
1478 | |
1479 | static int ta8874z_checkit(struct CHIPSTATE *chip) |
1480 | { |
1481 | int rc; |
1482 | |
1483 | rc = chip_read(chip); |
1484 | if (rc < 0) |
1485 | return rc; |
1486 | |
1487 | return ((rc & 0x1f) == 0x1f) ? 1 : 0; |
1488 | } |
1489 | |
1490 | /* ---------------------------------------------------------------------- */ |
1491 | /* audio chip descriptions - struct CHIPDESC */ |
1492 | |
1493 | /* insmod options to enable/disable individual audio chips */ |
1494 | static int tda8425 = 1; |
1495 | static int tda9840 = 1; |
1496 | static int tda9850 = 1; |
1497 | static int tda9855 = 1; |
1498 | static int tda9873 = 1; |
1499 | static int tda9874a = 1; |
1500 | static int tda9875 = 1; |
1501 | static int tea6300; /* default 0 - address clash with msp34xx */ |
1502 | static int tea6320; /* default 0 - address clash with msp34xx */ |
1503 | static int tea6420 = 1; |
1504 | static int pic16c54 = 1; |
1505 | static int ta8874z; /* default 0 - address clash with tda9840 */ |
1506 | |
1507 | module_param(tda8425, int, 0444); |
1508 | module_param(tda9840, int, 0444); |
1509 | module_param(tda9850, int, 0444); |
1510 | module_param(tda9855, int, 0444); |
1511 | module_param(tda9873, int, 0444); |
1512 | module_param(tda9874a, int, 0444); |
1513 | module_param(tda9875, int, 0444); |
1514 | module_param(tea6300, int, 0444); |
1515 | module_param(tea6320, int, 0444); |
1516 | module_param(tea6420, int, 0444); |
1517 | module_param(pic16c54, int, 0444); |
1518 | module_param(ta8874z, int, 0444); |
1519 | |
1520 | static struct CHIPDESC chiplist[] = { |
1521 | { |
1522 | .name = "tda9840" , |
1523 | .insmodopt = &tda9840, |
1524 | .addr_lo = I2C_ADDR_TDA9840 >> 1, |
1525 | .addr_hi = I2C_ADDR_TDA9840 >> 1, |
1526 | .registers = 5, |
1527 | .flags = CHIP_NEED_CHECKMODE, |
1528 | |
1529 | /* callbacks */ |
1530 | .checkit = tda9840_checkit, |
1531 | .getrxsubchans = tda9840_getrxsubchans, |
1532 | .setaudmode = tda9840_setaudmode, |
1533 | |
1534 | .init = { .count: 2, .bytes: { TDA9840_TEST, TDA9840_TEST_INT1SN |
1535 | /* ,TDA9840_SW, TDA9840_MONO */} } |
1536 | }, |
1537 | { |
1538 | .name = "tda9873h" , |
1539 | .insmodopt = &tda9873, |
1540 | .addr_lo = I2C_ADDR_TDA985x_L >> 1, |
1541 | .addr_hi = I2C_ADDR_TDA985x_H >> 1, |
1542 | .registers = 3, |
1543 | .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE, |
1544 | |
1545 | /* callbacks */ |
1546 | .checkit = tda9873_checkit, |
1547 | .getrxsubchans = tda9873_getrxsubchans, |
1548 | .setaudmode = tda9873_setaudmode, |
1549 | |
1550 | .init = { .count: 4, .bytes: { TDA9873_SW, 0xa4, 0x06, 0x03 } }, |
1551 | .inputreg = TDA9873_SW, |
1552 | .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE, |
1553 | .inputmap = {0xa0, 0xa2, 0xa0, 0xa0}, |
1554 | .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE, |
1555 | |
1556 | }, |
1557 | { |
1558 | .name = "tda9874h/a" , |
1559 | .insmodopt = &tda9874a, |
1560 | .addr_lo = I2C_ADDR_TDA9874 >> 1, |
1561 | .addr_hi = I2C_ADDR_TDA9874 >> 1, |
1562 | .flags = CHIP_NEED_CHECKMODE, |
1563 | |
1564 | /* callbacks */ |
1565 | .initialize = tda9874a_initialize, |
1566 | .checkit = tda9874a_checkit, |
1567 | .getrxsubchans = tda9874a_getrxsubchans, |
1568 | .setaudmode = tda9874a_setaudmode, |
1569 | }, |
1570 | { |
1571 | .name = "tda9875" , |
1572 | .insmodopt = &tda9875, |
1573 | .addr_lo = I2C_ADDR_TDA9875 >> 1, |
1574 | .addr_hi = I2C_ADDR_TDA9875 >> 1, |
1575 | .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE, |
1576 | |
1577 | /* callbacks */ |
1578 | .initialize = tda9875_initialize, |
1579 | .checkit = tda9875_checkit, |
1580 | .volfunc = tda9875_volume, |
1581 | .bassfunc = tda9875_bass, |
1582 | .treblefunc = tda9875_treble, |
1583 | .leftreg = TDA9875_MVL, |
1584 | .rightreg = TDA9875_MVR, |
1585 | .bassreg = TDA9875_MBA, |
1586 | .treblereg = TDA9875_MTR, |
1587 | .volinit = 58880, |
1588 | }, |
1589 | { |
1590 | .name = "tda9850" , |
1591 | .insmodopt = &tda9850, |
1592 | .addr_lo = I2C_ADDR_TDA985x_L >> 1, |
1593 | .addr_hi = I2C_ADDR_TDA985x_H >> 1, |
1594 | .registers = 11, |
1595 | |
1596 | .getrxsubchans = tda985x_getrxsubchans, |
1597 | .setaudmode = tda985x_setaudmode, |
1598 | |
1599 | .init = { .count: 8, .bytes: { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } } |
1600 | }, |
1601 | { |
1602 | .name = "tda9855" , |
1603 | .insmodopt = &tda9855, |
1604 | .addr_lo = I2C_ADDR_TDA985x_L >> 1, |
1605 | .addr_hi = I2C_ADDR_TDA985x_H >> 1, |
1606 | .registers = 11, |
1607 | .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE, |
1608 | |
1609 | .leftreg = TDA9855_VL, |
1610 | .rightreg = TDA9855_VR, |
1611 | .bassreg = TDA9855_BA, |
1612 | .treblereg = TDA9855_TR, |
1613 | |
1614 | /* callbacks */ |
1615 | .volfunc = tda9855_volume, |
1616 | .bassfunc = tda9855_bass, |
1617 | .treblefunc = tda9855_treble, |
1618 | .getrxsubchans = tda985x_getrxsubchans, |
1619 | .setaudmode = tda985x_setaudmode, |
1620 | |
1621 | .init = { .count: 12, .bytes: { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2, |
1622 | TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT, |
1623 | TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM, |
1624 | 0x07, 0x10, 0x10, 0x03 }} |
1625 | }, |
1626 | { |
1627 | .name = "tea6300" , |
1628 | .insmodopt = &tea6300, |
1629 | .addr_lo = I2C_ADDR_TEA6300 >> 1, |
1630 | .addr_hi = I2C_ADDR_TEA6300 >> 1, |
1631 | .registers = 6, |
1632 | .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL, |
1633 | |
1634 | .leftreg = TEA6300_VR, |
1635 | .rightreg = TEA6300_VL, |
1636 | .bassreg = TEA6300_BA, |
1637 | .treblereg = TEA6300_TR, |
1638 | |
1639 | /* callbacks */ |
1640 | .volfunc = tea6300_shift10, |
1641 | .bassfunc = tea6300_shift12, |
1642 | .treblefunc = tea6300_shift12, |
1643 | |
1644 | .inputreg = TEA6300_S, |
1645 | .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC }, |
1646 | .inputmute = TEA6300_S_GMU, |
1647 | }, |
1648 | { |
1649 | .name = "tea6320" , |
1650 | .insmodopt = &tea6320, |
1651 | .addr_lo = I2C_ADDR_TEA6300 >> 1, |
1652 | .addr_hi = I2C_ADDR_TEA6300 >> 1, |
1653 | .registers = 8, |
1654 | .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL, |
1655 | |
1656 | .leftreg = TEA6320_V, |
1657 | .rightreg = TEA6320_V, |
1658 | .bassreg = TEA6320_BA, |
1659 | .treblereg = TEA6320_TR, |
1660 | |
1661 | /* callbacks */ |
1662 | .initialize = tea6320_initialize, |
1663 | .volfunc = tea6320_volume, |
1664 | .bassfunc = tea6320_shift11, |
1665 | .treblefunc = tea6320_shift11, |
1666 | |
1667 | .inputreg = TEA6320_S, |
1668 | .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD }, |
1669 | .inputmute = TEA6300_S_GMU, |
1670 | }, |
1671 | { |
1672 | .name = "tea6420" , |
1673 | .insmodopt = &tea6420, |
1674 | .addr_lo = I2C_ADDR_TEA6420 >> 1, |
1675 | .addr_hi = I2C_ADDR_TEA6420 >> 1, |
1676 | .registers = 1, |
1677 | .flags = CHIP_HAS_INPUTSEL, |
1678 | |
1679 | .inputreg = -1, |
1680 | .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC }, |
1681 | .inputmute = TEA6420_S_GMU, |
1682 | .inputmask = 0x07, |
1683 | }, |
1684 | { |
1685 | .name = "tda8425" , |
1686 | .insmodopt = &tda8425, |
1687 | .addr_lo = I2C_ADDR_TDA8425 >> 1, |
1688 | .addr_hi = I2C_ADDR_TDA8425 >> 1, |
1689 | .registers = 9, |
1690 | .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL, |
1691 | |
1692 | .leftreg = TDA8425_VL, |
1693 | .rightreg = TDA8425_VR, |
1694 | .bassreg = TDA8425_BA, |
1695 | .treblereg = TDA8425_TR, |
1696 | |
1697 | /* callbacks */ |
1698 | .volfunc = tda8425_shift10, |
1699 | .bassfunc = tda8425_shift12, |
1700 | .treblefunc = tda8425_shift12, |
1701 | .setaudmode = tda8425_setaudmode, |
1702 | |
1703 | .inputreg = TDA8425_S1, |
1704 | .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 }, |
1705 | .inputmute = TDA8425_S1_OFF, |
1706 | |
1707 | }, |
1708 | { |
1709 | .name = "pic16c54 (PV951)" , |
1710 | .insmodopt = &pic16c54, |
1711 | .addr_lo = I2C_ADDR_PIC16C54 >> 1, |
1712 | .addr_hi = I2C_ADDR_PIC16C54>> 1, |
1713 | .registers = 2, |
1714 | .flags = CHIP_HAS_INPUTSEL, |
1715 | |
1716 | .inputreg = PIC16C54_REG_MISC, |
1717 | .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER, |
1718 | PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE, |
1719 | PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE, |
1720 | PIC16C54_MISC_SND_MUTE}, |
1721 | .inputmute = PIC16C54_MISC_SND_MUTE, |
1722 | }, |
1723 | { |
1724 | .name = "ta8874z" , |
1725 | .checkit = ta8874z_checkit, |
1726 | .insmodopt = &ta8874z, |
1727 | .addr_lo = I2C_ADDR_TDA9840 >> 1, |
1728 | .addr_hi = I2C_ADDR_TDA9840 >> 1, |
1729 | .registers = 2, |
1730 | |
1731 | /* callbacks */ |
1732 | .getrxsubchans = ta8874z_getrxsubchans, |
1733 | .setaudmode = ta8874z_setaudmode, |
1734 | |
1735 | .init = {.count: 2, .bytes: { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}}, |
1736 | }, |
1737 | { .name = NULL } /* EOF */ |
1738 | }; |
1739 | |
1740 | |
1741 | /* ---------------------------------------------------------------------- */ |
1742 | |
1743 | static int tvaudio_s_ctrl(struct v4l2_ctrl *ctrl) |
1744 | { |
1745 | struct v4l2_subdev *sd = to_sd(ctrl); |
1746 | struct CHIPSTATE *chip = to_state(sd); |
1747 | struct CHIPDESC *desc = chip->desc; |
1748 | |
1749 | switch (ctrl->id) { |
1750 | case V4L2_CID_AUDIO_MUTE: |
1751 | chip->muted = ctrl->val; |
1752 | if (chip->muted) |
1753 | chip_write_masked(chip,subaddr: desc->inputreg,val: desc->inputmute,mask: desc->inputmask); |
1754 | else |
1755 | chip_write_masked(chip,subaddr: desc->inputreg, |
1756 | val: desc->inputmap[chip->input],mask: desc->inputmask); |
1757 | return 0; |
1758 | case V4L2_CID_AUDIO_VOLUME: { |
1759 | u32 volume, balance; |
1760 | u32 left, right; |
1761 | |
1762 | volume = chip->volume->val; |
1763 | balance = chip->balance->val; |
1764 | left = (min(65536U - balance, 32768U) * volume) / 32768U; |
1765 | right = (min(balance, 32768U) * volume) / 32768U; |
1766 | |
1767 | chip_write(chip, subaddr: desc->leftreg, val: desc->volfunc(left)); |
1768 | chip_write(chip, subaddr: desc->rightreg, val: desc->volfunc(right)); |
1769 | return 0; |
1770 | } |
1771 | case V4L2_CID_AUDIO_BASS: |
1772 | chip_write(chip, subaddr: desc->bassreg, val: desc->bassfunc(ctrl->val)); |
1773 | return 0; |
1774 | case V4L2_CID_AUDIO_TREBLE: |
1775 | chip_write(chip, subaddr: desc->treblereg, val: desc->treblefunc(ctrl->val)); |
1776 | return 0; |
1777 | } |
1778 | return -EINVAL; |
1779 | } |
1780 | |
1781 | |
1782 | /* ---------------------------------------------------------------------- */ |
1783 | /* video4linux interface */ |
1784 | |
1785 | static int tvaudio_s_radio(struct v4l2_subdev *sd) |
1786 | { |
1787 | struct CHIPSTATE *chip = to_state(sd); |
1788 | |
1789 | chip->radio = 1; |
1790 | /* del_timer(&chip->wt); */ |
1791 | return 0; |
1792 | } |
1793 | |
1794 | static int tvaudio_s_routing(struct v4l2_subdev *sd, |
1795 | u32 input, u32 output, u32 config) |
1796 | { |
1797 | struct CHIPSTATE *chip = to_state(sd); |
1798 | struct CHIPDESC *desc = chip->desc; |
1799 | |
1800 | if (!(desc->flags & CHIP_HAS_INPUTSEL)) |
1801 | return 0; |
1802 | if (input >= 4) |
1803 | return -EINVAL; |
1804 | /* There are four inputs: tuner, radio, extern and intern. */ |
1805 | chip->input = input; |
1806 | if (chip->muted) |
1807 | return 0; |
1808 | chip_write_masked(chip, subaddr: desc->inputreg, |
1809 | val: desc->inputmap[chip->input], mask: desc->inputmask); |
1810 | return 0; |
1811 | } |
1812 | |
1813 | static int tvaudio_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *vt) |
1814 | { |
1815 | struct CHIPSTATE *chip = to_state(sd); |
1816 | struct CHIPDESC *desc = chip->desc; |
1817 | |
1818 | if (!desc->setaudmode) |
1819 | return 0; |
1820 | if (chip->radio) |
1821 | return 0; |
1822 | |
1823 | switch (vt->audmode) { |
1824 | case V4L2_TUNER_MODE_MONO: |
1825 | case V4L2_TUNER_MODE_STEREO: |
1826 | case V4L2_TUNER_MODE_LANG1: |
1827 | case V4L2_TUNER_MODE_LANG2: |
1828 | case V4L2_TUNER_MODE_LANG1_LANG2: |
1829 | break; |
1830 | default: |
1831 | return -EINVAL; |
1832 | } |
1833 | chip->audmode = vt->audmode; |
1834 | |
1835 | if (chip->thread) |
1836 | wake_up_process(tsk: chip->thread); |
1837 | else |
1838 | desc->setaudmode(chip, vt->audmode); |
1839 | |
1840 | return 0; |
1841 | } |
1842 | |
1843 | static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
1844 | { |
1845 | struct CHIPSTATE *chip = to_state(sd); |
1846 | struct CHIPDESC *desc = chip->desc; |
1847 | |
1848 | if (!desc->getrxsubchans) |
1849 | return 0; |
1850 | if (chip->radio) |
1851 | return 0; |
1852 | |
1853 | vt->audmode = chip->audmode; |
1854 | vt->rxsubchans = desc->getrxsubchans(chip); |
1855 | vt->capability |= V4L2_TUNER_CAP_STEREO | |
1856 | V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2; |
1857 | |
1858 | return 0; |
1859 | } |
1860 | |
1861 | static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
1862 | { |
1863 | struct CHIPSTATE *chip = to_state(sd); |
1864 | |
1865 | chip->radio = 0; |
1866 | return 0; |
1867 | } |
1868 | |
1869 | static int tvaudio_s_frequency(struct v4l2_subdev *sd, const struct v4l2_frequency *freq) |
1870 | { |
1871 | struct CHIPSTATE *chip = to_state(sd); |
1872 | struct CHIPDESC *desc = chip->desc; |
1873 | |
1874 | /* For chips that provide getrxsubchans and setaudmode, and doesn't |
1875 | automatically follows the stereo carrier, a kthread is |
1876 | created to set the audio standard. In this case, when then |
1877 | the video channel is changed, tvaudio starts on MONO mode. |
1878 | After waiting for 2 seconds, the kernel thread is called, |
1879 | to follow whatever audio standard is pointed by the |
1880 | audio carrier. |
1881 | */ |
1882 | if (chip->thread) { |
1883 | desc->setaudmode(chip, V4L2_TUNER_MODE_MONO); |
1884 | chip->prevmode = -1; /* reset previous mode */ |
1885 | mod_timer(timer: &chip->wt, expires: jiffies+msecs_to_jiffies(m: 2000)); |
1886 | } |
1887 | return 0; |
1888 | } |
1889 | |
1890 | static int tvaudio_log_status(struct v4l2_subdev *sd) |
1891 | { |
1892 | struct CHIPSTATE *chip = to_state(sd); |
1893 | struct CHIPDESC *desc = chip->desc; |
1894 | |
1895 | v4l2_info(sd, "Chip: %s\n" , desc->name); |
1896 | v4l2_ctrl_handler_log_status(hdl: &chip->hdl, prefix: sd->name); |
1897 | return 0; |
1898 | } |
1899 | |
1900 | /* ----------------------------------------------------------------------- */ |
1901 | |
1902 | static const struct v4l2_ctrl_ops tvaudio_ctrl_ops = { |
1903 | .s_ctrl = tvaudio_s_ctrl, |
1904 | }; |
1905 | |
1906 | static const struct v4l2_subdev_core_ops tvaudio_core_ops = { |
1907 | .log_status = tvaudio_log_status, |
1908 | }; |
1909 | |
1910 | static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = { |
1911 | .s_radio = tvaudio_s_radio, |
1912 | .s_frequency = tvaudio_s_frequency, |
1913 | .s_tuner = tvaudio_s_tuner, |
1914 | .g_tuner = tvaudio_g_tuner, |
1915 | }; |
1916 | |
1917 | static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = { |
1918 | .s_routing = tvaudio_s_routing, |
1919 | }; |
1920 | |
1921 | static const struct v4l2_subdev_video_ops tvaudio_video_ops = { |
1922 | .s_std = tvaudio_s_std, |
1923 | }; |
1924 | |
1925 | static const struct v4l2_subdev_ops tvaudio_ops = { |
1926 | .core = &tvaudio_core_ops, |
1927 | .tuner = &tvaudio_tuner_ops, |
1928 | .audio = &tvaudio_audio_ops, |
1929 | .video = &tvaudio_video_ops, |
1930 | }; |
1931 | |
1932 | /* ----------------------------------------------------------------------- */ |
1933 | |
1934 | |
1935 | /* i2c registration */ |
1936 | |
1937 | static int tvaudio_probe(struct i2c_client *client) |
1938 | { |
1939 | const struct i2c_device_id *id = i2c_client_get_device_id(client); |
1940 | struct CHIPSTATE *chip; |
1941 | struct CHIPDESC *desc; |
1942 | struct v4l2_subdev *sd; |
1943 | |
1944 | if (debug) { |
1945 | printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n" ); |
1946 | printk(KERN_INFO "tvaudio: known chips: " ); |
1947 | for (desc = chiplist; desc->name != NULL; desc++) |
1948 | printk(KERN_CONT "%s%s" , |
1949 | (desc == chiplist) ? "" : ", " , desc->name); |
1950 | printk(KERN_CONT "\n" ); |
1951 | } |
1952 | |
1953 | chip = devm_kzalloc(dev: &client->dev, size: sizeof(*chip), GFP_KERNEL); |
1954 | if (!chip) |
1955 | return -ENOMEM; |
1956 | sd = &chip->sd; |
1957 | v4l2_i2c_subdev_init(sd, client, ops: &tvaudio_ops); |
1958 | |
1959 | /* find description for the chip */ |
1960 | v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n" , client->addr<<1); |
1961 | for (desc = chiplist; desc->name != NULL; desc++) { |
1962 | if (0 == *(desc->insmodopt)) |
1963 | continue; |
1964 | if (client->addr < desc->addr_lo || |
1965 | client->addr > desc->addr_hi) |
1966 | continue; |
1967 | if (desc->checkit && !desc->checkit(chip)) |
1968 | continue; |
1969 | break; |
1970 | } |
1971 | if (desc->name == NULL) { |
1972 | v4l2_dbg(1, debug, sd, "no matching chip description found\n" ); |
1973 | return -EIO; |
1974 | } |
1975 | v4l2_info(sd, "%s found @ 0x%x (%s)\n" , desc->name, client->addr<<1, client->adapter->name); |
1976 | if (desc->flags) { |
1977 | v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n" , |
1978 | (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "" , |
1979 | (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "" , |
1980 | (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "" ); |
1981 | } |
1982 | |
1983 | /* fill required data structures */ |
1984 | if (!id) |
1985 | strscpy(client->name, desc->name, I2C_NAME_SIZE); |
1986 | chip->desc = desc; |
1987 | chip->shadow.count = desc->registers+1; |
1988 | chip->prevmode = -1; |
1989 | chip->audmode = V4L2_TUNER_MODE_LANG1; |
1990 | |
1991 | /* initialization */ |
1992 | if (desc->initialize != NULL) |
1993 | desc->initialize(chip); |
1994 | else |
1995 | chip_cmd(chip, name: "init" , cmd: &desc->init); |
1996 | |
1997 | v4l2_ctrl_handler_init(&chip->hdl, 5); |
1998 | if (desc->flags & CHIP_HAS_INPUTSEL) |
1999 | v4l2_ctrl_new_std(hdl: &chip->hdl, ops: &tvaudio_ctrl_ops, |
2000 | V4L2_CID_AUDIO_MUTE, min: 0, max: 1, step: 1, def: 0); |
2001 | if (desc->flags & CHIP_HAS_VOLUME) { |
2002 | if (!desc->volfunc) { |
2003 | /* This shouldn't be happen. Warn user, but keep working |
2004 | without volume controls |
2005 | */ |
2006 | v4l2_info(sd, "volume callback undefined!\n" ); |
2007 | desc->flags &= ~CHIP_HAS_VOLUME; |
2008 | } else { |
2009 | chip->volume = v4l2_ctrl_new_std(hdl: &chip->hdl, |
2010 | ops: &tvaudio_ctrl_ops, V4L2_CID_AUDIO_VOLUME, |
2011 | min: 0, max: 65535, step: 65535 / 100, |
2012 | def: desc->volinit ? desc->volinit : 65535); |
2013 | chip->balance = v4l2_ctrl_new_std(hdl: &chip->hdl, |
2014 | ops: &tvaudio_ctrl_ops, V4L2_CID_AUDIO_BALANCE, |
2015 | min: 0, max: 65535, step: 65535 / 100, def: 32768); |
2016 | v4l2_ctrl_cluster(ncontrols: 2, controls: &chip->volume); |
2017 | } |
2018 | } |
2019 | if (desc->flags & CHIP_HAS_BASSTREBLE) { |
2020 | if (!desc->bassfunc || !desc->treblefunc) { |
2021 | /* This shouldn't be happen. Warn user, but keep working |
2022 | without bass/treble controls |
2023 | */ |
2024 | v4l2_info(sd, "bass/treble callbacks undefined!\n" ); |
2025 | desc->flags &= ~CHIP_HAS_BASSTREBLE; |
2026 | } else { |
2027 | v4l2_ctrl_new_std(hdl: &chip->hdl, |
2028 | ops: &tvaudio_ctrl_ops, V4L2_CID_AUDIO_BASS, |
2029 | min: 0, max: 65535, step: 65535 / 100, |
2030 | def: desc->bassinit ? desc->bassinit : 32768); |
2031 | v4l2_ctrl_new_std(hdl: &chip->hdl, |
2032 | ops: &tvaudio_ctrl_ops, V4L2_CID_AUDIO_TREBLE, |
2033 | min: 0, max: 65535, step: 65535 / 100, |
2034 | def: desc->trebleinit ? desc->trebleinit : 32768); |
2035 | } |
2036 | } |
2037 | |
2038 | sd->ctrl_handler = &chip->hdl; |
2039 | if (chip->hdl.error) { |
2040 | int err = chip->hdl.error; |
2041 | |
2042 | v4l2_ctrl_handler_free(hdl: &chip->hdl); |
2043 | return err; |
2044 | } |
2045 | /* set controls to the default values */ |
2046 | v4l2_ctrl_handler_setup(hdl: &chip->hdl); |
2047 | |
2048 | chip->thread = NULL; |
2049 | timer_setup(&chip->wt, chip_thread_wake, 0); |
2050 | if (desc->flags & CHIP_NEED_CHECKMODE) { |
2051 | if (!desc->getrxsubchans || !desc->setaudmode) { |
2052 | /* This shouldn't be happen. Warn user, but keep working |
2053 | without kthread |
2054 | */ |
2055 | v4l2_info(sd, "set/get mode callbacks undefined!\n" ); |
2056 | return 0; |
2057 | } |
2058 | /* start async thread */ |
2059 | chip->thread = kthread_run(chip_thread, chip, "%s" , |
2060 | client->name); |
2061 | if (IS_ERR(ptr: chip->thread)) { |
2062 | v4l2_warn(sd, "failed to create kthread\n" ); |
2063 | chip->thread = NULL; |
2064 | } |
2065 | } |
2066 | return 0; |
2067 | } |
2068 | |
2069 | static void tvaudio_remove(struct i2c_client *client) |
2070 | { |
2071 | struct v4l2_subdev *sd = i2c_get_clientdata(client); |
2072 | struct CHIPSTATE *chip = to_state(sd); |
2073 | |
2074 | del_timer_sync(timer: &chip->wt); |
2075 | if (chip->thread) { |
2076 | /* shutdown async thread */ |
2077 | kthread_stop(k: chip->thread); |
2078 | chip->thread = NULL; |
2079 | } |
2080 | |
2081 | v4l2_device_unregister_subdev(sd); |
2082 | v4l2_ctrl_handler_free(hdl: &chip->hdl); |
2083 | } |
2084 | |
2085 | /* This driver supports many devices and the idea is to let the driver |
2086 | detect which device is present. So rather than listing all supported |
2087 | devices here, we pretend to support a single, fake device type. */ |
2088 | static const struct i2c_device_id tvaudio_id[] = { |
2089 | { "tvaudio" , 0 }, |
2090 | { } |
2091 | }; |
2092 | MODULE_DEVICE_TABLE(i2c, tvaudio_id); |
2093 | |
2094 | static struct i2c_driver tvaudio_driver = { |
2095 | .driver = { |
2096 | .name = "tvaudio" , |
2097 | }, |
2098 | .probe = tvaudio_probe, |
2099 | .remove = tvaudio_remove, |
2100 | .id_table = tvaudio_id, |
2101 | }; |
2102 | |
2103 | module_i2c_driver(tvaudio_driver); |
2104 | |