1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Microchip CSI2 Demux Controller (CSI2DC) driver |
4 | * |
5 | * Copyright (C) 2018 Microchip Technology, Inc. |
6 | * |
7 | * Author: Eugen Hristev <eugen.hristev@microchip.com> |
8 | * |
9 | */ |
10 | |
11 | #include <linux/clk.h> |
12 | #include <linux/mod_devicetable.h> |
13 | #include <linux/module.h> |
14 | #include <linux/of_graph.h> |
15 | #include <linux/platform_device.h> |
16 | #include <linux/pm_runtime.h> |
17 | #include <linux/videodev2.h> |
18 | |
19 | #include <media/v4l2-fwnode.h> |
20 | #include <media/v4l2-subdev.h> |
21 | |
22 | /* Global configuration register */ |
23 | #define CSI2DC_GCFG 0x0 |
24 | |
25 | /* MIPI sensor pixel clock is free running */ |
26 | #define CSI2DC_GCFG_MIPIFRN BIT(0) |
27 | /* GPIO parallel interface selection */ |
28 | #define CSI2DC_GCFG_GPIOSEL BIT(1) |
29 | /* Output waveform inter-line minimum delay */ |
30 | #define CSI2DC_GCFG_HLC(v) ((v) << 4) |
31 | #define CSI2DC_GCFG_HLC_MASK GENMASK(7, 4) |
32 | /* SAMA7G5 requires a HLC delay of 15 */ |
33 | #define SAMA7G5_HLC (15) |
34 | |
35 | /* Global control register */ |
36 | #define CSI2DC_GCTLR 0x04 |
37 | #define CSI2DC_GCTLR_SWRST BIT(0) |
38 | |
39 | /* Global status register */ |
40 | #define CSI2DC_GS 0x08 |
41 | |
42 | /* SSP interrupt status register */ |
43 | #define CSI2DC_SSPIS 0x28 |
44 | /* Pipe update register */ |
45 | #define CSI2DC_PU 0xc0 |
46 | /* Video pipe attributes update */ |
47 | #define CSI2DC_PU_VP BIT(0) |
48 | |
49 | /* Pipe update status register */ |
50 | #define CSI2DC_PUS 0xc4 |
51 | |
52 | /* Video pipeline Interrupt Status Register */ |
53 | #define CSI2DC_VPISR 0xf4 |
54 | |
55 | /* Video pipeline enable register */ |
56 | #define CSI2DC_VPE 0xf8 |
57 | #define CSI2DC_VPE_ENABLE BIT(0) |
58 | |
59 | /* Video pipeline configuration register */ |
60 | #define CSI2DC_VPCFG 0xfc |
61 | /* Data type */ |
62 | #define CSI2DC_VPCFG_DT(v) ((v) << 0) |
63 | #define CSI2DC_VPCFG_DT_MASK GENMASK(5, 0) |
64 | /* Virtual channel identifier */ |
65 | #define CSI2DC_VPCFG_VC(v) ((v) << 6) |
66 | #define CSI2DC_VPCFG_VC_MASK GENMASK(7, 6) |
67 | /* Decompression enable */ |
68 | #define CSI2DC_VPCFG_DE BIT(8) |
69 | /* Decoder mode */ |
70 | #define CSI2DC_VPCFG_DM(v) ((v) << 9) |
71 | #define CSI2DC_VPCFG_DM_DECODER8TO12 0 |
72 | /* Decoder predictor 2 selection */ |
73 | #define CSI2DC_VPCFG_DP2 BIT(12) |
74 | /* Recommended memory storage */ |
75 | #define CSI2DC_VPCFG_RMS BIT(13) |
76 | /* Post adjustment */ |
77 | #define CSI2DC_VPCFG_PA BIT(14) |
78 | |
79 | /* Video pipeline column register */ |
80 | #define CSI2DC_VPCOL 0x100 |
81 | /* Column number */ |
82 | #define CSI2DC_VPCOL_COL(v) ((v) << 0) |
83 | #define CSI2DC_VPCOL_COL_MASK GENMASK(15, 0) |
84 | |
85 | /* Video pipeline row register */ |
86 | #define CSI2DC_VPROW 0x104 |
87 | /* Row number */ |
88 | #define CSI2DC_VPROW_ROW(v) ((v) << 0) |
89 | #define CSI2DC_VPROW_ROW_MASK GENMASK(15, 0) |
90 | |
91 | /* Version register */ |
92 | #define CSI2DC_VERSION 0x1fc |
93 | |
94 | /* register read/write helpers */ |
95 | #define csi2dc_readl(st, reg) readl_relaxed((st)->base + (reg)) |
96 | #define csi2dc_writel(st, reg, val) writel_relaxed((val), \ |
97 | (st)->base + (reg)) |
98 | |
99 | /* supported RAW data types */ |
100 | #define CSI2DC_DT_RAW6 0x28 |
101 | #define CSI2DC_DT_RAW7 0x29 |
102 | #define CSI2DC_DT_RAW8 0x2a |
103 | #define CSI2DC_DT_RAW10 0x2b |
104 | #define CSI2DC_DT_RAW12 0x2c |
105 | #define CSI2DC_DT_RAW14 0x2d |
106 | /* YUV data types */ |
107 | #define CSI2DC_DT_YUV422_8B 0x1e |
108 | |
109 | /* |
110 | * struct csi2dc_format - CSI2DC format type struct |
111 | * @mbus_code: Media bus code for the format |
112 | * @dt: Data type constant for this format |
113 | */ |
114 | struct csi2dc_format { |
115 | u32 mbus_code; |
116 | u32 dt; |
117 | }; |
118 | |
119 | static const struct csi2dc_format csi2dc_formats[] = { |
120 | { |
121 | .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8, |
122 | .dt = CSI2DC_DT_RAW8, |
123 | }, { |
124 | .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8, |
125 | .dt = CSI2DC_DT_RAW8, |
126 | }, { |
127 | .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, |
128 | .dt = CSI2DC_DT_RAW8, |
129 | }, { |
130 | .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8, |
131 | .dt = CSI2DC_DT_RAW8, |
132 | }, { |
133 | .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10, |
134 | .dt = CSI2DC_DT_RAW10, |
135 | }, { |
136 | .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, |
137 | .dt = CSI2DC_DT_RAW10, |
138 | }, { |
139 | .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, |
140 | .dt = CSI2DC_DT_RAW10, |
141 | }, { |
142 | .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10, |
143 | .dt = CSI2DC_DT_RAW10, |
144 | }, { |
145 | .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, |
146 | .dt = CSI2DC_DT_YUV422_8B, |
147 | }, |
148 | }; |
149 | |
150 | enum mipi_csi_pads { |
151 | CSI2DC_PAD_SINK = 0, |
152 | CSI2DC_PAD_SOURCE = 1, |
153 | CSI2DC_PADS_NUM = 2, |
154 | }; |
155 | |
156 | /* |
157 | * struct csi2dc_device - CSI2DC device driver data/config struct |
158 | * @base: Register map base address |
159 | * @csi2dc_sd: v4l2 subdevice for the csi2dc device |
160 | * This is the subdevice that the csi2dc device itself |
161 | * registers in v4l2 subsystem |
162 | * @dev: struct device for this csi2dc device |
163 | * @pclk: Peripheral clock reference |
164 | * Input clock that clocks the hardware block internal |
165 | * logic |
166 | * @scck: Sensor Controller clock reference |
167 | * Input clock that is used to generate the pixel clock |
168 | * @format: Current saved format used in g/s fmt |
169 | * @cur_fmt: Current state format |
170 | * @try_fmt: Try format that is being tried |
171 | * @pads: Media entity pads for the csi2dc subdevice |
172 | * @clk_gated: Whether the clock is gated or free running |
173 | * @video_pipe: Whether video pipeline is configured |
174 | * @parallel_mode: The underlying subdevice is connected on a parallel bus |
175 | * @vc: Current set virtual channel |
176 | * @notifier: Async notifier that is used to bound the underlying |
177 | * subdevice to the csi2dc subdevice |
178 | * @input_sd: Reference to the underlying subdevice bound to the |
179 | * csi2dc subdevice |
180 | * @remote_pad: Pad number of the underlying subdevice that is linked |
181 | * to the csi2dc subdevice sink pad. |
182 | */ |
183 | struct csi2dc_device { |
184 | void __iomem *base; |
185 | struct v4l2_subdev csi2dc_sd; |
186 | struct device *dev; |
187 | struct clk *pclk; |
188 | struct clk *scck; |
189 | |
190 | struct v4l2_mbus_framefmt format; |
191 | |
192 | const struct csi2dc_format *cur_fmt; |
193 | const struct csi2dc_format *try_fmt; |
194 | |
195 | struct media_pad pads[CSI2DC_PADS_NUM]; |
196 | |
197 | bool clk_gated; |
198 | bool video_pipe; |
199 | bool parallel_mode; |
200 | u32 vc; |
201 | |
202 | struct v4l2_async_notifier notifier; |
203 | |
204 | struct v4l2_subdev *input_sd; |
205 | |
206 | u32 remote_pad; |
207 | }; |
208 | |
209 | static inline struct csi2dc_device * |
210 | csi2dc_sd_to_csi2dc_device(struct v4l2_subdev *csi2dc_sd) |
211 | { |
212 | return container_of(csi2dc_sd, struct csi2dc_device, csi2dc_sd); |
213 | } |
214 | |
215 | static int csi2dc_enum_mbus_code(struct v4l2_subdev *csi2dc_sd, |
216 | struct v4l2_subdev_state *sd_state, |
217 | struct v4l2_subdev_mbus_code_enum *code) |
218 | { |
219 | if (code->index >= ARRAY_SIZE(csi2dc_formats)) |
220 | return -EINVAL; |
221 | |
222 | code->code = csi2dc_formats[code->index].mbus_code; |
223 | |
224 | return 0; |
225 | } |
226 | |
227 | static int csi2dc_get_fmt(struct v4l2_subdev *csi2dc_sd, |
228 | struct v4l2_subdev_state *sd_state, |
229 | struct v4l2_subdev_format *format) |
230 | { |
231 | struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd); |
232 | struct v4l2_mbus_framefmt *v4l2_try_fmt; |
233 | |
234 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { |
235 | v4l2_try_fmt = v4l2_subdev_state_get_format(sd_state, |
236 | format->pad); |
237 | format->format = *v4l2_try_fmt; |
238 | |
239 | return 0; |
240 | } |
241 | |
242 | format->format = csi2dc->format; |
243 | |
244 | return 0; |
245 | } |
246 | |
247 | static int csi2dc_set_fmt(struct v4l2_subdev *csi2dc_sd, |
248 | struct v4l2_subdev_state *sd_state, |
249 | struct v4l2_subdev_format *req_fmt) |
250 | { |
251 | struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd); |
252 | const struct csi2dc_format *fmt, *try_fmt = NULL; |
253 | struct v4l2_mbus_framefmt *v4l2_try_fmt; |
254 | unsigned int i; |
255 | |
256 | /* |
257 | * Setting the source pad is disabled. |
258 | * The same format is being propagated from the sink to source. |
259 | */ |
260 | if (req_fmt->pad == CSI2DC_PAD_SOURCE) |
261 | return -EINVAL; |
262 | |
263 | for (i = 0; i < ARRAY_SIZE(csi2dc_formats); i++) { |
264 | fmt = &csi2dc_formats[i]; |
265 | if (req_fmt->format.code == fmt->mbus_code) |
266 | try_fmt = fmt; |
267 | fmt++; |
268 | } |
269 | |
270 | /* in case we could not find the desired format, default to something */ |
271 | if (!try_fmt) { |
272 | try_fmt = &csi2dc_formats[0]; |
273 | |
274 | dev_dbg(csi2dc->dev, |
275 | "CSI2DC unsupported format 0x%x, defaulting to 0x%x\n" , |
276 | req_fmt->format.code, csi2dc_formats[0].mbus_code); |
277 | } |
278 | |
279 | req_fmt->format.code = try_fmt->mbus_code; |
280 | req_fmt->format.colorspace = V4L2_COLORSPACE_SRGB; |
281 | req_fmt->format.field = V4L2_FIELD_NONE; |
282 | |
283 | if (req_fmt->which == V4L2_SUBDEV_FORMAT_TRY) { |
284 | v4l2_try_fmt = v4l2_subdev_state_get_format(sd_state, |
285 | req_fmt->pad); |
286 | *v4l2_try_fmt = req_fmt->format; |
287 | /* Trying on the sink pad makes the source pad change too */ |
288 | v4l2_try_fmt = v4l2_subdev_state_get_format(sd_state, |
289 | CSI2DC_PAD_SOURCE); |
290 | *v4l2_try_fmt = req_fmt->format; |
291 | |
292 | /* if we are just trying, we are done */ |
293 | return 0; |
294 | } |
295 | |
296 | /* save the format for later requests */ |
297 | csi2dc->format = req_fmt->format; |
298 | |
299 | /* update config */ |
300 | csi2dc->cur_fmt = try_fmt; |
301 | |
302 | dev_dbg(csi2dc->dev, "new format set: 0x%x @%dx%d\n" , |
303 | csi2dc->format.code, csi2dc->format.width, |
304 | csi2dc->format.height); |
305 | |
306 | return 0; |
307 | } |
308 | |
309 | static int csi2dc_power(struct csi2dc_device *csi2dc, int on) |
310 | { |
311 | int ret = 0; |
312 | |
313 | if (on) { |
314 | ret = clk_prepare_enable(clk: csi2dc->pclk); |
315 | if (ret) { |
316 | dev_err(csi2dc->dev, "failed to enable pclk:%d\n" , ret); |
317 | return ret; |
318 | } |
319 | |
320 | ret = clk_prepare_enable(clk: csi2dc->scck); |
321 | if (ret) { |
322 | dev_err(csi2dc->dev, "failed to enable scck:%d\n" , ret); |
323 | clk_disable_unprepare(clk: csi2dc->pclk); |
324 | return ret; |
325 | } |
326 | |
327 | /* if powering up, deassert reset line */ |
328 | csi2dc_writel(csi2dc, CSI2DC_GCTLR, CSI2DC_GCTLR_SWRST); |
329 | } else { |
330 | /* if powering down, assert reset line */ |
331 | csi2dc_writel(csi2dc, CSI2DC_GCTLR, 0); |
332 | |
333 | clk_disable_unprepare(clk: csi2dc->scck); |
334 | clk_disable_unprepare(clk: csi2dc->pclk); |
335 | } |
336 | |
337 | return ret; |
338 | } |
339 | |
340 | static int csi2dc_get_mbus_config(struct csi2dc_device *csi2dc) |
341 | { |
342 | struct v4l2_mbus_config mbus_config = { 0 }; |
343 | int ret; |
344 | |
345 | ret = v4l2_subdev_call(csi2dc->input_sd, pad, get_mbus_config, |
346 | csi2dc->remote_pad, &mbus_config); |
347 | if (ret == -ENOIOCTLCMD) { |
348 | dev_dbg(csi2dc->dev, |
349 | "no remote mbus configuration available\n" ); |
350 | return 0; |
351 | } |
352 | |
353 | if (ret) { |
354 | dev_err(csi2dc->dev, |
355 | "failed to get remote mbus configuration\n" ); |
356 | return 0; |
357 | } |
358 | |
359 | dev_dbg(csi2dc->dev, "subdev sending on channel %d\n" , csi2dc->vc); |
360 | |
361 | csi2dc->clk_gated = mbus_config.bus.parallel.flags & |
362 | V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK; |
363 | |
364 | dev_dbg(csi2dc->dev, "mbus_config: %s clock\n" , |
365 | csi2dc->clk_gated ? "gated" : "free running" ); |
366 | |
367 | return 0; |
368 | } |
369 | |
370 | static void csi2dc_vp_update(struct csi2dc_device *csi2dc) |
371 | { |
372 | u32 vp, gcfg; |
373 | |
374 | if (!csi2dc->video_pipe) { |
375 | dev_err(csi2dc->dev, "video pipeline unavailable\n" ); |
376 | return; |
377 | } |
378 | |
379 | if (csi2dc->parallel_mode) { |
380 | /* In parallel mode, GPIO parallel interface must be selected */ |
381 | gcfg = csi2dc_readl(csi2dc, CSI2DC_GCFG); |
382 | gcfg |= CSI2DC_GCFG_GPIOSEL; |
383 | csi2dc_writel(csi2dc, CSI2DC_GCFG, gcfg); |
384 | return; |
385 | } |
386 | |
387 | /* serial video pipeline */ |
388 | |
389 | csi2dc_writel(csi2dc, CSI2DC_GCFG, |
390 | (SAMA7G5_HLC & CSI2DC_GCFG_HLC_MASK) | |
391 | (csi2dc->clk_gated ? 0 : CSI2DC_GCFG_MIPIFRN)); |
392 | |
393 | vp = CSI2DC_VPCFG_DT(csi2dc->cur_fmt->dt) & CSI2DC_VPCFG_DT_MASK; |
394 | vp |= CSI2DC_VPCFG_VC(csi2dc->vc) & CSI2DC_VPCFG_VC_MASK; |
395 | vp &= ~CSI2DC_VPCFG_DE; |
396 | vp |= CSI2DC_VPCFG_DM(CSI2DC_VPCFG_DM_DECODER8TO12); |
397 | vp &= ~CSI2DC_VPCFG_DP2; |
398 | vp &= ~CSI2DC_VPCFG_RMS; |
399 | vp |= CSI2DC_VPCFG_PA; |
400 | |
401 | csi2dc_writel(csi2dc, CSI2DC_VPCFG, vp); |
402 | csi2dc_writel(csi2dc, CSI2DC_VPE, CSI2DC_VPE_ENABLE); |
403 | csi2dc_writel(csi2dc, CSI2DC_PU, CSI2DC_PU_VP); |
404 | } |
405 | |
406 | static int csi2dc_s_stream(struct v4l2_subdev *csi2dc_sd, int enable) |
407 | { |
408 | struct csi2dc_device *csi2dc = csi2dc_sd_to_csi2dc_device(csi2dc_sd); |
409 | int ret; |
410 | |
411 | if (enable) { |
412 | ret = pm_runtime_resume_and_get(dev: csi2dc->dev); |
413 | if (ret < 0) |
414 | return ret; |
415 | |
416 | csi2dc_get_mbus_config(csi2dc); |
417 | |
418 | csi2dc_vp_update(csi2dc); |
419 | |
420 | return v4l2_subdev_call(csi2dc->input_sd, video, s_stream, |
421 | true); |
422 | } |
423 | |
424 | dev_dbg(csi2dc->dev, |
425 | "Last frame received: VPCOLR = %u, VPROWR= %u, VPISR = %x\n" , |
426 | csi2dc_readl(csi2dc, CSI2DC_VPCOL), |
427 | csi2dc_readl(csi2dc, CSI2DC_VPROW), |
428 | csi2dc_readl(csi2dc, CSI2DC_VPISR)); |
429 | |
430 | /* stop streaming scenario */ |
431 | ret = v4l2_subdev_call(csi2dc->input_sd, video, s_stream, false); |
432 | |
433 | pm_runtime_put_sync(dev: csi2dc->dev); |
434 | |
435 | return ret; |
436 | } |
437 | |
438 | static int csi2dc_init_state(struct v4l2_subdev *csi2dc_sd, |
439 | struct v4l2_subdev_state *sd_state) |
440 | { |
441 | struct v4l2_mbus_framefmt *v4l2_try_fmt = |
442 | v4l2_subdev_state_get_format(sd_state, 0); |
443 | |
444 | v4l2_try_fmt->height = 480; |
445 | v4l2_try_fmt->width = 640; |
446 | v4l2_try_fmt->code = csi2dc_formats[0].mbus_code; |
447 | v4l2_try_fmt->colorspace = V4L2_COLORSPACE_SRGB; |
448 | v4l2_try_fmt->field = V4L2_FIELD_NONE; |
449 | v4l2_try_fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; |
450 | v4l2_try_fmt->quantization = V4L2_QUANTIZATION_DEFAULT; |
451 | v4l2_try_fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT; |
452 | |
453 | return 0; |
454 | } |
455 | |
456 | static const struct media_entity_operations csi2dc_entity_ops = { |
457 | .link_validate = v4l2_subdev_link_validate, |
458 | }; |
459 | |
460 | static const struct v4l2_subdev_pad_ops csi2dc_pad_ops = { |
461 | .enum_mbus_code = csi2dc_enum_mbus_code, |
462 | .set_fmt = csi2dc_set_fmt, |
463 | .get_fmt = csi2dc_get_fmt, |
464 | }; |
465 | |
466 | static const struct v4l2_subdev_video_ops csi2dc_video_ops = { |
467 | .s_stream = csi2dc_s_stream, |
468 | }; |
469 | |
470 | static const struct v4l2_subdev_ops csi2dc_subdev_ops = { |
471 | .pad = &csi2dc_pad_ops, |
472 | .video = &csi2dc_video_ops, |
473 | }; |
474 | |
475 | static const struct v4l2_subdev_internal_ops csi2dc_internal_ops = { |
476 | .init_state = csi2dc_init_state, |
477 | }; |
478 | |
479 | static int csi2dc_async_bound(struct v4l2_async_notifier *notifier, |
480 | struct v4l2_subdev *subdev, |
481 | struct v4l2_async_connection *asd) |
482 | { |
483 | struct csi2dc_device *csi2dc = container_of(notifier, |
484 | struct csi2dc_device, notifier); |
485 | int pad; |
486 | int ret; |
487 | |
488 | csi2dc->input_sd = subdev; |
489 | |
490 | pad = media_entity_get_fwnode_pad(entity: &subdev->entity, fwnode: asd->match.fwnode, |
491 | MEDIA_PAD_FL_SOURCE); |
492 | if (pad < 0) { |
493 | dev_err(csi2dc->dev, "Failed to find pad for %s\n" , |
494 | subdev->name); |
495 | return pad; |
496 | } |
497 | |
498 | csi2dc->remote_pad = pad; |
499 | |
500 | ret = media_create_pad_link(source: &csi2dc->input_sd->entity, |
501 | source_pad: csi2dc->remote_pad, |
502 | sink: &csi2dc->csi2dc_sd.entity, sink_pad: 0, |
503 | MEDIA_LNK_FL_ENABLED); |
504 | if (ret) { |
505 | dev_err(csi2dc->dev, |
506 | "Failed to create pad link: %s to %s\n" , |
507 | csi2dc->input_sd->entity.name, |
508 | csi2dc->csi2dc_sd.entity.name); |
509 | return ret; |
510 | } |
511 | |
512 | dev_dbg(csi2dc->dev, "link with %s pad: %d\n" , |
513 | csi2dc->input_sd->name, csi2dc->remote_pad); |
514 | |
515 | return ret; |
516 | } |
517 | |
518 | static const struct v4l2_async_notifier_operations csi2dc_async_ops = { |
519 | .bound = csi2dc_async_bound, |
520 | }; |
521 | |
522 | static int csi2dc_prepare_notifier(struct csi2dc_device *csi2dc, |
523 | struct fwnode_handle *input_fwnode) |
524 | { |
525 | struct v4l2_async_connection *asd; |
526 | int ret = 0; |
527 | |
528 | v4l2_async_subdev_nf_init(notifier: &csi2dc->notifier, sd: &csi2dc->csi2dc_sd); |
529 | |
530 | asd = v4l2_async_nf_add_fwnode_remote(&csi2dc->notifier, |
531 | input_fwnode, |
532 | struct v4l2_async_connection); |
533 | |
534 | fwnode_handle_put(fwnode: input_fwnode); |
535 | |
536 | if (IS_ERR(ptr: asd)) { |
537 | ret = PTR_ERR(ptr: asd); |
538 | dev_err(csi2dc->dev, |
539 | "failed to add async notifier for node %pOF: %d\n" , |
540 | to_of_node(input_fwnode), ret); |
541 | v4l2_async_nf_cleanup(notifier: &csi2dc->notifier); |
542 | return ret; |
543 | } |
544 | |
545 | csi2dc->notifier.ops = &csi2dc_async_ops; |
546 | |
547 | ret = v4l2_async_nf_register(notifier: &csi2dc->notifier); |
548 | if (ret) { |
549 | dev_err(csi2dc->dev, "fail to register async notifier: %d\n" , |
550 | ret); |
551 | v4l2_async_nf_cleanup(notifier: &csi2dc->notifier); |
552 | } |
553 | |
554 | return ret; |
555 | } |
556 | |
557 | static int csi2dc_of_parse(struct csi2dc_device *csi2dc, |
558 | struct device_node *of_node) |
559 | { |
560 | struct fwnode_handle *input_fwnode, *output_fwnode; |
561 | struct v4l2_fwnode_endpoint input_endpoint = { 0 }, |
562 | output_endpoint = { 0 }; |
563 | int ret; |
564 | |
565 | input_fwnode = fwnode_graph_get_next_endpoint(of_fwnode_handle(of_node), |
566 | NULL); |
567 | if (!input_fwnode) { |
568 | dev_err(csi2dc->dev, |
569 | "missing port node at %pOF, input node is mandatory.\n" , |
570 | of_node); |
571 | return -EINVAL; |
572 | } |
573 | |
574 | ret = v4l2_fwnode_endpoint_parse(fwnode: input_fwnode, vep: &input_endpoint); |
575 | if (ret) { |
576 | dev_err(csi2dc->dev, "endpoint not defined at %pOF\n" , of_node); |
577 | goto csi2dc_of_parse_err; |
578 | } |
579 | |
580 | if (input_endpoint.bus_type == V4L2_MBUS_PARALLEL || |
581 | input_endpoint.bus_type == V4L2_MBUS_BT656) { |
582 | csi2dc->parallel_mode = true; |
583 | dev_dbg(csi2dc->dev, |
584 | "subdevice connected on parallel interface\n" ); |
585 | } |
586 | |
587 | if (input_endpoint.bus_type == V4L2_MBUS_CSI2_DPHY) { |
588 | csi2dc->clk_gated = input_endpoint.bus.mipi_csi2.flags & |
589 | V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK; |
590 | dev_dbg(csi2dc->dev, |
591 | "subdevice connected on serial interface\n" ); |
592 | dev_dbg(csi2dc->dev, "DT: %s clock\n" , |
593 | csi2dc->clk_gated ? "gated" : "free running" ); |
594 | } |
595 | |
596 | output_fwnode = fwnode_graph_get_next_endpoint |
597 | (of_fwnode_handle(of_node), prev: input_fwnode); |
598 | |
599 | if (output_fwnode) |
600 | ret = v4l2_fwnode_endpoint_parse(fwnode: output_fwnode, |
601 | vep: &output_endpoint); |
602 | |
603 | fwnode_handle_put(fwnode: output_fwnode); |
604 | |
605 | if (!output_fwnode || ret) { |
606 | dev_info(csi2dc->dev, |
607 | "missing output node at %pOF, data pipe available only.\n" , |
608 | of_node); |
609 | } else { |
610 | if (output_endpoint.bus_type != V4L2_MBUS_PARALLEL && |
611 | output_endpoint.bus_type != V4L2_MBUS_BT656) { |
612 | dev_err(csi2dc->dev, |
613 | "output port must be parallel/bt656.\n" ); |
614 | ret = -EINVAL; |
615 | goto csi2dc_of_parse_err; |
616 | } |
617 | |
618 | csi2dc->video_pipe = true; |
619 | |
620 | dev_dbg(csi2dc->dev, |
621 | "block %pOF [%d.%d]->[%d.%d] video pipeline\n" , |
622 | of_node, input_endpoint.base.port, |
623 | input_endpoint.base.id, output_endpoint.base.port, |
624 | output_endpoint.base.id); |
625 | } |
626 | |
627 | /* prepare async notifier for subdevice completion */ |
628 | return csi2dc_prepare_notifier(csi2dc, input_fwnode); |
629 | |
630 | csi2dc_of_parse_err: |
631 | fwnode_handle_put(fwnode: input_fwnode); |
632 | return ret; |
633 | } |
634 | |
635 | static void csi2dc_default_format(struct csi2dc_device *csi2dc) |
636 | { |
637 | csi2dc->cur_fmt = &csi2dc_formats[0]; |
638 | |
639 | csi2dc->format.height = 480; |
640 | csi2dc->format.width = 640; |
641 | csi2dc->format.code = csi2dc_formats[0].mbus_code; |
642 | csi2dc->format.colorspace = V4L2_COLORSPACE_SRGB; |
643 | csi2dc->format.field = V4L2_FIELD_NONE; |
644 | csi2dc->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; |
645 | csi2dc->format.quantization = V4L2_QUANTIZATION_DEFAULT; |
646 | csi2dc->format.xfer_func = V4L2_XFER_FUNC_DEFAULT; |
647 | } |
648 | |
649 | static int csi2dc_probe(struct platform_device *pdev) |
650 | { |
651 | struct device *dev = &pdev->dev; |
652 | struct csi2dc_device *csi2dc; |
653 | int ret = 0; |
654 | u32 ver; |
655 | |
656 | csi2dc = devm_kzalloc(dev, size: sizeof(*csi2dc), GFP_KERNEL); |
657 | if (!csi2dc) |
658 | return -ENOMEM; |
659 | |
660 | csi2dc->dev = dev; |
661 | |
662 | csi2dc->base = devm_platform_ioremap_resource(pdev, index: 0); |
663 | if (IS_ERR(ptr: csi2dc->base)) { |
664 | dev_err(dev, "base address not set\n" ); |
665 | return PTR_ERR(ptr: csi2dc->base); |
666 | } |
667 | |
668 | csi2dc->pclk = devm_clk_get(dev, id: "pclk" ); |
669 | if (IS_ERR(ptr: csi2dc->pclk)) { |
670 | ret = PTR_ERR(ptr: csi2dc->pclk); |
671 | dev_err(dev, "failed to get pclk: %d\n" , ret); |
672 | return ret; |
673 | } |
674 | |
675 | csi2dc->scck = devm_clk_get(dev, id: "scck" ); |
676 | if (IS_ERR(ptr: csi2dc->scck)) { |
677 | ret = PTR_ERR(ptr: csi2dc->scck); |
678 | dev_err(dev, "failed to get scck: %d\n" , ret); |
679 | return ret; |
680 | } |
681 | |
682 | v4l2_subdev_init(sd: &csi2dc->csi2dc_sd, ops: &csi2dc_subdev_ops); |
683 | csi2dc->csi2dc_sd.internal_ops = &csi2dc_internal_ops; |
684 | |
685 | csi2dc->csi2dc_sd.owner = THIS_MODULE; |
686 | csi2dc->csi2dc_sd.dev = dev; |
687 | snprintf(buf: csi2dc->csi2dc_sd.name, size: sizeof(csi2dc->csi2dc_sd.name), |
688 | fmt: "csi2dc" ); |
689 | |
690 | csi2dc->csi2dc_sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
691 | csi2dc->csi2dc_sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; |
692 | csi2dc->csi2dc_sd.entity.ops = &csi2dc_entity_ops; |
693 | |
694 | platform_set_drvdata(pdev, data: csi2dc); |
695 | |
696 | ret = csi2dc_of_parse(csi2dc, of_node: dev->of_node); |
697 | if (ret) |
698 | goto csi2dc_probe_cleanup_entity; |
699 | |
700 | csi2dc->pads[CSI2DC_PAD_SINK].flags = MEDIA_PAD_FL_SINK; |
701 | if (csi2dc->video_pipe) |
702 | csi2dc->pads[CSI2DC_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; |
703 | |
704 | ret = media_entity_pads_init(entity: &csi2dc->csi2dc_sd.entity, |
705 | num_pads: csi2dc->video_pipe ? CSI2DC_PADS_NUM : 1, |
706 | pads: csi2dc->pads); |
707 | if (ret < 0) { |
708 | dev_err(dev, "media entity init failed\n" ); |
709 | goto csi2dc_probe_cleanup_notifier; |
710 | } |
711 | |
712 | csi2dc_default_format(csi2dc); |
713 | |
714 | /* turn power on to validate capabilities */ |
715 | ret = csi2dc_power(csi2dc, on: true); |
716 | if (ret < 0) |
717 | goto csi2dc_probe_cleanup_notifier; |
718 | |
719 | pm_runtime_set_active(dev); |
720 | pm_runtime_enable(dev); |
721 | ver = csi2dc_readl(csi2dc, CSI2DC_VERSION); |
722 | |
723 | /* |
724 | * we must register the subdev after PM runtime has been requested, |
725 | * otherwise we might bound immediately and request pm_runtime_resume |
726 | * before runtime_enable. |
727 | */ |
728 | ret = v4l2_async_register_subdev(sd: &csi2dc->csi2dc_sd); |
729 | if (ret) { |
730 | dev_err(csi2dc->dev, "failed to register the subdevice\n" ); |
731 | goto csi2dc_probe_cleanup_notifier; |
732 | } |
733 | |
734 | dev_info(dev, "Microchip CSI2DC version %x\n" , ver); |
735 | |
736 | return 0; |
737 | |
738 | csi2dc_probe_cleanup_notifier: |
739 | v4l2_async_nf_cleanup(notifier: &csi2dc->notifier); |
740 | csi2dc_probe_cleanup_entity: |
741 | media_entity_cleanup(entity: &csi2dc->csi2dc_sd.entity); |
742 | |
743 | return ret; |
744 | } |
745 | |
746 | static void csi2dc_remove(struct platform_device *pdev) |
747 | { |
748 | struct csi2dc_device *csi2dc = platform_get_drvdata(pdev); |
749 | |
750 | pm_runtime_disable(dev: &pdev->dev); |
751 | |
752 | v4l2_async_unregister_subdev(sd: &csi2dc->csi2dc_sd); |
753 | v4l2_async_nf_unregister(notifier: &csi2dc->notifier); |
754 | v4l2_async_nf_cleanup(notifier: &csi2dc->notifier); |
755 | media_entity_cleanup(entity: &csi2dc->csi2dc_sd.entity); |
756 | } |
757 | |
758 | static int __maybe_unused csi2dc_runtime_suspend(struct device *dev) |
759 | { |
760 | struct csi2dc_device *csi2dc = dev_get_drvdata(dev); |
761 | |
762 | return csi2dc_power(csi2dc, on: false); |
763 | } |
764 | |
765 | static int __maybe_unused csi2dc_runtime_resume(struct device *dev) |
766 | { |
767 | struct csi2dc_device *csi2dc = dev_get_drvdata(dev); |
768 | |
769 | return csi2dc_power(csi2dc, on: true); |
770 | } |
771 | |
772 | static const struct dev_pm_ops csi2dc_dev_pm_ops = { |
773 | SET_RUNTIME_PM_OPS(csi2dc_runtime_suspend, csi2dc_runtime_resume, NULL) |
774 | }; |
775 | |
776 | static const struct of_device_id csi2dc_of_match[] = { |
777 | { .compatible = "microchip,sama7g5-csi2dc" }, |
778 | { } |
779 | }; |
780 | |
781 | MODULE_DEVICE_TABLE(of, csi2dc_of_match); |
782 | |
783 | static struct platform_driver csi2dc_driver = { |
784 | .probe = csi2dc_probe, |
785 | .remove_new = csi2dc_remove, |
786 | .driver = { |
787 | .name = "microchip-csi2dc" , |
788 | .pm = &csi2dc_dev_pm_ops, |
789 | .of_match_table = of_match_ptr(csi2dc_of_match), |
790 | }, |
791 | }; |
792 | |
793 | module_platform_driver(csi2dc_driver); |
794 | |
795 | MODULE_AUTHOR("Eugen Hristev <eugen.hristev@microchip.com>" ); |
796 | MODULE_DESCRIPTION("Microchip CSI2 Demux Controller driver" ); |
797 | MODULE_LICENSE("GPL v2" ); |
798 | |