1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Hantro VDEC driver
4 *
5 * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
6 */
7
8#include "hantro.h"
9
10/*
11 * Supported formats.
12 */
13
14static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
15 {
16 .fourcc = V4L2_PIX_FMT_YUYV,
17 .codec_mode = HANTRO_MODE_NONE,
18 .postprocessed = true,
19 .frmsize = {
20 .min_width = FMT_MIN_WIDTH,
21 .max_width = FMT_HD_WIDTH,
22 .step_width = MB_DIM,
23 .min_height = FMT_MIN_HEIGHT,
24 .max_height = FMT_HD_HEIGHT,
25 .step_height = MB_DIM,
26 },
27 },
28};
29
30static const struct hantro_fmt sama5d4_vdec_fmts[] = {
31 {
32 .fourcc = V4L2_PIX_FMT_NV12,
33 .codec_mode = HANTRO_MODE_NONE,
34 .frmsize = {
35 .min_width = FMT_MIN_WIDTH,
36 .max_width = FMT_HD_WIDTH,
37 .step_width = MB_DIM,
38 .min_height = FMT_MIN_HEIGHT,
39 .max_height = FMT_HD_HEIGHT,
40 .step_height = MB_DIM,
41 },
42 },
43 {
44 .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
45 .codec_mode = HANTRO_MODE_MPEG2_DEC,
46 .max_depth = 2,
47 .frmsize = {
48 .min_width = FMT_MIN_WIDTH,
49 .max_width = FMT_HD_WIDTH,
50 .step_width = MB_DIM,
51 .min_height = FMT_MIN_HEIGHT,
52 .max_height = FMT_HD_HEIGHT,
53 .step_height = MB_DIM,
54 },
55 },
56 {
57 .fourcc = V4L2_PIX_FMT_VP8_FRAME,
58 .codec_mode = HANTRO_MODE_VP8_DEC,
59 .max_depth = 2,
60 .frmsize = {
61 .min_width = FMT_MIN_WIDTH,
62 .max_width = FMT_HD_WIDTH,
63 .step_width = MB_DIM,
64 .min_height = FMT_MIN_HEIGHT,
65 .max_height = FMT_HD_HEIGHT,
66 .step_height = MB_DIM,
67 },
68 },
69 {
70 .fourcc = V4L2_PIX_FMT_H264_SLICE,
71 .codec_mode = HANTRO_MODE_H264_DEC,
72 .max_depth = 2,
73 .frmsize = {
74 .min_width = FMT_MIN_WIDTH,
75 .max_width = FMT_HD_WIDTH,
76 .step_width = MB_DIM,
77 .min_height = FMT_MIN_HEIGHT,
78 .max_height = FMT_HD_HEIGHT,
79 .step_height = MB_DIM,
80 },
81 },
82};
83
84/*
85 * Supported codec ops.
86 */
87
88static const struct hantro_codec_ops sama5d4_vdec_codec_ops[] = {
89 [HANTRO_MODE_MPEG2_DEC] = {
90 .run = hantro_g1_mpeg2_dec_run,
91 .reset = hantro_g1_reset,
92 .init = hantro_mpeg2_dec_init,
93 .exit = hantro_mpeg2_dec_exit,
94 },
95 [HANTRO_MODE_VP8_DEC] = {
96 .run = hantro_g1_vp8_dec_run,
97 .reset = hantro_g1_reset,
98 .init = hantro_vp8_dec_init,
99 .exit = hantro_vp8_dec_exit,
100 },
101 [HANTRO_MODE_H264_DEC] = {
102 .run = hantro_g1_h264_dec_run,
103 .reset = hantro_g1_reset,
104 .init = hantro_h264_dec_init,
105 .exit = hantro_h264_dec_exit,
106 },
107};
108
109static const struct hantro_irq sama5d4_irqs[] = {
110 { "vdec", hantro_g1_irq },
111};
112
113static const char * const sama5d4_clk_names[] = { "vdec_clk" };
114
115const struct hantro_variant sama5d4_vdec_variant = {
116 .dec_fmts = sama5d4_vdec_fmts,
117 .num_dec_fmts = ARRAY_SIZE(sama5d4_vdec_fmts),
118 .postproc_fmts = sama5d4_vdec_postproc_fmts,
119 .num_postproc_fmts = ARRAY_SIZE(sama5d4_vdec_postproc_fmts),
120 .postproc_ops = &hantro_g1_postproc_ops,
121 .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
122 HANTRO_H264_DECODER,
123 .codec_ops = sama5d4_vdec_codec_ops,
124 .irqs = sama5d4_irqs,
125 .num_irqs = ARRAY_SIZE(sama5d4_irqs),
126 .clk_names = sama5d4_clk_names,
127 .num_clocks = ARRAY_SIZE(sama5d4_clk_names),
128};
129

source code of linux/drivers/media/platform/verisilicon/sama5d4_vdec_hw.c