1 | /* |
2 | * Base driver for Marvell 88PM800 |
3 | * |
4 | * Copyright (C) 2012 Marvell International Ltd. |
5 | * Haojian Zhuang <haojian.zhuang@marvell.com> |
6 | * Joseph(Yossi) Hanin <yhanin@marvell.com> |
7 | * Qiao Zhou <zhouqiao@marvell.com> |
8 | * |
9 | * This file is subject to the terms and conditions of the GNU General |
10 | * Public License. See the file "COPYING" in the main directory of this |
11 | * archive for more details. |
12 | * |
13 | * This program is distributed in the hope that it will be useful, |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
16 | * GNU General Public License for more details. |
17 | * |
18 | * You should have received a copy of the GNU General Public License |
19 | * along with this program; if not, write to the Free Software |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
21 | */ |
22 | |
23 | #include <linux/kernel.h> |
24 | #include <linux/module.h> |
25 | #include <linux/err.h> |
26 | #include <linux/i2c.h> |
27 | #include <linux/mfd/core.h> |
28 | #include <linux/mfd/88pm80x.h> |
29 | #include <linux/slab.h> |
30 | |
31 | /* Interrupt Registers */ |
32 | #define PM800_INT_STATUS1 (0x05) |
33 | #define PM800_ONKEY_INT_STS1 (1 << 0) |
34 | #define PM800_EXTON_INT_STS1 (1 << 1) |
35 | #define PM800_CHG_INT_STS1 (1 << 2) |
36 | #define PM800_BAT_INT_STS1 (1 << 3) |
37 | #define PM800_RTC_INT_STS1 (1 << 4) |
38 | #define PM800_CLASSD_OC_INT_STS1 (1 << 5) |
39 | |
40 | #define PM800_INT_STATUS2 (0x06) |
41 | #define PM800_VBAT_INT_STS2 (1 << 0) |
42 | #define PM800_VSYS_INT_STS2 (1 << 1) |
43 | #define PM800_VCHG_INT_STS2 (1 << 2) |
44 | #define PM800_TINT_INT_STS2 (1 << 3) |
45 | #define PM800_GPADC0_INT_STS2 (1 << 4) |
46 | #define PM800_TBAT_INT_STS2 (1 << 5) |
47 | #define PM800_GPADC2_INT_STS2 (1 << 6) |
48 | #define PM800_GPADC3_INT_STS2 (1 << 7) |
49 | |
50 | #define PM800_INT_STATUS3 (0x07) |
51 | |
52 | #define PM800_INT_STATUS4 (0x08) |
53 | #define PM800_GPIO0_INT_STS4 (1 << 0) |
54 | #define PM800_GPIO1_INT_STS4 (1 << 1) |
55 | #define PM800_GPIO2_INT_STS4 (1 << 2) |
56 | #define PM800_GPIO3_INT_STS4 (1 << 3) |
57 | #define PM800_GPIO4_INT_STS4 (1 << 4) |
58 | |
59 | #define PM800_INT_ENA_1 (0x09) |
60 | #define PM800_ONKEY_INT_ENA1 (1 << 0) |
61 | #define PM800_EXTON_INT_ENA1 (1 << 1) |
62 | #define PM800_CHG_INT_ENA1 (1 << 2) |
63 | #define PM800_BAT_INT_ENA1 (1 << 3) |
64 | #define PM800_RTC_INT_ENA1 (1 << 4) |
65 | #define PM800_CLASSD_OC_INT_ENA1 (1 << 5) |
66 | |
67 | #define PM800_INT_ENA_2 (0x0A) |
68 | #define PM800_VBAT_INT_ENA2 (1 << 0) |
69 | #define PM800_VSYS_INT_ENA2 (1 << 1) |
70 | #define PM800_VCHG_INT_ENA2 (1 << 2) |
71 | #define PM800_TINT_INT_ENA2 (1 << 3) |
72 | |
73 | #define PM800_INT_ENA_3 (0x0B) |
74 | #define PM800_GPADC0_INT_ENA3 (1 << 0) |
75 | #define PM800_GPADC1_INT_ENA3 (1 << 1) |
76 | #define PM800_GPADC2_INT_ENA3 (1 << 2) |
77 | #define PM800_GPADC3_INT_ENA3 (1 << 3) |
78 | #define PM800_GPADC4_INT_ENA3 (1 << 4) |
79 | |
80 | #define PM800_INT_ENA_4 (0x0C) |
81 | #define PM800_GPIO0_INT_ENA4 (1 << 0) |
82 | #define PM800_GPIO1_INT_ENA4 (1 << 1) |
83 | #define PM800_GPIO2_INT_ENA4 (1 << 2) |
84 | #define PM800_GPIO3_INT_ENA4 (1 << 3) |
85 | #define PM800_GPIO4_INT_ENA4 (1 << 4) |
86 | |
87 | /* number of INT_ENA & INT_STATUS regs */ |
88 | #define PM800_INT_REG_NUM (4) |
89 | |
90 | /* Interrupt Number in 88PM800 */ |
91 | enum { |
92 | PM800_IRQ_ONKEY, /*EN1b0 *//*0 */ |
93 | PM800_IRQ_EXTON, /*EN1b1 */ |
94 | PM800_IRQ_CHG, /*EN1b2 */ |
95 | PM800_IRQ_BAT, /*EN1b3 */ |
96 | PM800_IRQ_RTC, /*EN1b4 */ |
97 | PM800_IRQ_CLASSD, /*EN1b5 *//*5 */ |
98 | PM800_IRQ_VBAT, /*EN2b0 */ |
99 | PM800_IRQ_VSYS, /*EN2b1 */ |
100 | PM800_IRQ_VCHG, /*EN2b2 */ |
101 | PM800_IRQ_TINT, /*EN2b3 */ |
102 | PM800_IRQ_GPADC0, /*EN3b0 *//*10 */ |
103 | PM800_IRQ_GPADC1, /*EN3b1 */ |
104 | PM800_IRQ_GPADC2, /*EN3b2 */ |
105 | PM800_IRQ_GPADC3, /*EN3b3 */ |
106 | PM800_IRQ_GPADC4, /*EN3b4 */ |
107 | PM800_IRQ_GPIO0, /*EN4b0 *//*15 */ |
108 | PM800_IRQ_GPIO1, /*EN4b1 */ |
109 | PM800_IRQ_GPIO2, /*EN4b2 */ |
110 | PM800_IRQ_GPIO3, /*EN4b3 */ |
111 | PM800_IRQ_GPIO4, /*EN4b4 *//*19 */ |
112 | PM800_MAX_IRQ, |
113 | }; |
114 | |
115 | /* PM800: generation identification number */ |
116 | #define PM800_CHIP_GEN_ID_NUM 0x3 |
117 | |
118 | static const struct i2c_device_id pm80x_id_table[] = { |
119 | {"88PM800" , 0}, |
120 | {} /* NULL terminated */ |
121 | }; |
122 | MODULE_DEVICE_TABLE(i2c, pm80x_id_table); |
123 | |
124 | static const struct resource rtc_resources[] = { |
125 | DEFINE_RES_IRQ_NAMED(PM800_IRQ_RTC, "88pm80x-rtc" ), |
126 | }; |
127 | |
128 | static struct mfd_cell rtc_devs[] = { |
129 | { |
130 | .name = "88pm80x-rtc" , |
131 | .num_resources = ARRAY_SIZE(rtc_resources), |
132 | .resources = &rtc_resources[0], |
133 | .id = -1, |
134 | }, |
135 | }; |
136 | |
137 | static struct resource onkey_resources[] = { |
138 | DEFINE_RES_IRQ_NAMED(PM800_IRQ_ONKEY, "88pm80x-onkey" ), |
139 | }; |
140 | |
141 | static const struct mfd_cell onkey_devs[] = { |
142 | { |
143 | .name = "88pm80x-onkey" , |
144 | .num_resources = 1, |
145 | .resources = &onkey_resources[0], |
146 | .id = -1, |
147 | }, |
148 | }; |
149 | |
150 | static const struct mfd_cell regulator_devs[] = { |
151 | { |
152 | .name = "88pm80x-regulator" , |
153 | .id = -1, |
154 | }, |
155 | }; |
156 | |
157 | static const struct regmap_irq pm800_irqs[] = { |
158 | /* INT0 */ |
159 | [PM800_IRQ_ONKEY] = { |
160 | .mask = PM800_ONKEY_INT_ENA1, |
161 | }, |
162 | [PM800_IRQ_EXTON] = { |
163 | .mask = PM800_EXTON_INT_ENA1, |
164 | }, |
165 | [PM800_IRQ_CHG] = { |
166 | .mask = PM800_CHG_INT_ENA1, |
167 | }, |
168 | [PM800_IRQ_BAT] = { |
169 | .mask = PM800_BAT_INT_ENA1, |
170 | }, |
171 | [PM800_IRQ_RTC] = { |
172 | .mask = PM800_RTC_INT_ENA1, |
173 | }, |
174 | [PM800_IRQ_CLASSD] = { |
175 | .mask = PM800_CLASSD_OC_INT_ENA1, |
176 | }, |
177 | /* INT1 */ |
178 | [PM800_IRQ_VBAT] = { |
179 | .reg_offset = 1, |
180 | .mask = PM800_VBAT_INT_ENA2, |
181 | }, |
182 | [PM800_IRQ_VSYS] = { |
183 | .reg_offset = 1, |
184 | .mask = PM800_VSYS_INT_ENA2, |
185 | }, |
186 | [PM800_IRQ_VCHG] = { |
187 | .reg_offset = 1, |
188 | .mask = PM800_VCHG_INT_ENA2, |
189 | }, |
190 | [PM800_IRQ_TINT] = { |
191 | .reg_offset = 1, |
192 | .mask = PM800_TINT_INT_ENA2, |
193 | }, |
194 | /* INT2 */ |
195 | [PM800_IRQ_GPADC0] = { |
196 | .reg_offset = 2, |
197 | .mask = PM800_GPADC0_INT_ENA3, |
198 | }, |
199 | [PM800_IRQ_GPADC1] = { |
200 | .reg_offset = 2, |
201 | .mask = PM800_GPADC1_INT_ENA3, |
202 | }, |
203 | [PM800_IRQ_GPADC2] = { |
204 | .reg_offset = 2, |
205 | .mask = PM800_GPADC2_INT_ENA3, |
206 | }, |
207 | [PM800_IRQ_GPADC3] = { |
208 | .reg_offset = 2, |
209 | .mask = PM800_GPADC3_INT_ENA3, |
210 | }, |
211 | [PM800_IRQ_GPADC4] = { |
212 | .reg_offset = 2, |
213 | .mask = PM800_GPADC4_INT_ENA3, |
214 | }, |
215 | /* INT3 */ |
216 | [PM800_IRQ_GPIO0] = { |
217 | .reg_offset = 3, |
218 | .mask = PM800_GPIO0_INT_ENA4, |
219 | }, |
220 | [PM800_IRQ_GPIO1] = { |
221 | .reg_offset = 3, |
222 | .mask = PM800_GPIO1_INT_ENA4, |
223 | }, |
224 | [PM800_IRQ_GPIO2] = { |
225 | .reg_offset = 3, |
226 | .mask = PM800_GPIO2_INT_ENA4, |
227 | }, |
228 | [PM800_IRQ_GPIO3] = { |
229 | .reg_offset = 3, |
230 | .mask = PM800_GPIO3_INT_ENA4, |
231 | }, |
232 | [PM800_IRQ_GPIO4] = { |
233 | .reg_offset = 3, |
234 | .mask = PM800_GPIO4_INT_ENA4, |
235 | }, |
236 | }; |
237 | |
238 | static int device_gpadc_init(struct pm80x_chip *chip, |
239 | struct pm80x_platform_data *pdata) |
240 | { |
241 | struct pm80x_subchip *subchip = chip->subchip; |
242 | struct regmap *map = subchip->regmap_gpadc; |
243 | int data = 0, mask = 0, ret = 0; |
244 | |
245 | if (!map) { |
246 | dev_warn(chip->dev, |
247 | "Warning: gpadc regmap is not available!\n" ); |
248 | return -EINVAL; |
249 | } |
250 | /* |
251 | * initialize GPADC without activating it turn on GPADC |
252 | * measurments |
253 | */ |
254 | ret = regmap_update_bits(map, |
255 | PM800_GPADC_MISC_CONFIG2, |
256 | PM800_GPADC_MISC_GPFSM_EN, |
257 | PM800_GPADC_MISC_GPFSM_EN); |
258 | if (ret < 0) |
259 | goto out; |
260 | /* |
261 | * This function configures the ADC as requires for |
262 | * CP implementation.CP does not "own" the ADC configuration |
263 | * registers and relies on AP. |
264 | * Reason: enable automatic ADC measurements needed |
265 | * for CP to get VBAT and RF temperature readings. |
266 | */ |
267 | ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN1, |
268 | PM800_MEAS_EN1_VBAT, PM800_MEAS_EN1_VBAT); |
269 | if (ret < 0) |
270 | goto out; |
271 | ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN2, |
272 | mask: (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN), |
273 | val: (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN)); |
274 | if (ret < 0) |
275 | goto out; |
276 | |
277 | /* |
278 | * the defult of PM800 is GPADC operates at 100Ks/s rate |
279 | * and Number of GPADC slots with active current bias prior |
280 | * to GPADC sampling = 1 slot for all GPADCs set for |
281 | * Temprature mesurmants |
282 | */ |
283 | mask = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 | |
284 | PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3); |
285 | |
286 | if (pdata && (pdata->batt_det == 0)) |
287 | data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 | |
288 | PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3); |
289 | else |
290 | data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN2 | |
291 | PM800_GPADC_GP_BIAS_EN3); |
292 | |
293 | ret = regmap_update_bits(map, PM800_GP_BIAS_ENA1, mask, val: data); |
294 | if (ret < 0) |
295 | goto out; |
296 | |
297 | dev_info(chip->dev, "pm800 device_gpadc_init: Done\n" ); |
298 | return 0; |
299 | |
300 | out: |
301 | dev_info(chip->dev, "pm800 device_gpadc_init: Failed!\n" ); |
302 | return ret; |
303 | } |
304 | |
305 | static int device_onkey_init(struct pm80x_chip *chip, |
306 | struct pm80x_platform_data *pdata) |
307 | { |
308 | int ret; |
309 | |
310 | ret = mfd_add_devices(parent: chip->dev, id: 0, cells: &onkey_devs[0], |
311 | ARRAY_SIZE(onkey_devs), mem_base: &onkey_resources[0], irq_base: 0, |
312 | NULL); |
313 | if (ret) { |
314 | dev_err(chip->dev, "Failed to add onkey subdev\n" ); |
315 | return ret; |
316 | } |
317 | |
318 | return 0; |
319 | } |
320 | |
321 | static int device_rtc_init(struct pm80x_chip *chip, |
322 | struct pm80x_platform_data *pdata) |
323 | { |
324 | int ret; |
325 | |
326 | if (pdata) { |
327 | rtc_devs[0].platform_data = pdata->rtc; |
328 | rtc_devs[0].pdata_size = |
329 | pdata->rtc ? sizeof(struct pm80x_rtc_pdata) : 0; |
330 | } |
331 | ret = mfd_add_devices(parent: chip->dev, id: 0, cells: &rtc_devs[0], |
332 | ARRAY_SIZE(rtc_devs), NULL, irq_base: 0, NULL); |
333 | if (ret) { |
334 | dev_err(chip->dev, "Failed to add rtc subdev\n" ); |
335 | return ret; |
336 | } |
337 | |
338 | return 0; |
339 | } |
340 | |
341 | static int device_regulator_init(struct pm80x_chip *chip, |
342 | struct pm80x_platform_data *pdata) |
343 | { |
344 | int ret; |
345 | |
346 | ret = mfd_add_devices(parent: chip->dev, id: 0, cells: ®ulator_devs[0], |
347 | ARRAY_SIZE(regulator_devs), NULL, irq_base: 0, NULL); |
348 | if (ret) { |
349 | dev_err(chip->dev, "Failed to add regulator subdev\n" ); |
350 | return ret; |
351 | } |
352 | |
353 | return 0; |
354 | } |
355 | |
356 | static int device_irq_init_800(struct pm80x_chip *chip) |
357 | { |
358 | struct regmap *map = chip->regmap; |
359 | unsigned long flags = IRQF_ONESHOT; |
360 | int data, mask, ret = -EINVAL; |
361 | |
362 | if (!map || !chip->irq) { |
363 | dev_err(chip->dev, "incorrect parameters\n" ); |
364 | return -EINVAL; |
365 | } |
366 | |
367 | /* |
368 | * irq_mode defines the way of clearing interrupt. it's read-clear by |
369 | * default. |
370 | */ |
371 | mask = |
372 | PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR | |
373 | PM800_WAKEUP2_INT_MASK; |
374 | |
375 | data = PM800_WAKEUP2_INT_CLEAR; |
376 | ret = regmap_update_bits(map, PM800_WAKEUP2, mask, val: data); |
377 | |
378 | if (ret < 0) |
379 | goto out; |
380 | |
381 | ret = |
382 | regmap_add_irq_chip(map: chip->regmap, irq: chip->irq, irq_flags: flags, irq_base: -1, |
383 | chip: chip->regmap_irq_chip, data: &chip->irq_data); |
384 | |
385 | out: |
386 | return ret; |
387 | } |
388 | |
389 | static void device_irq_exit_800(struct pm80x_chip *chip) |
390 | { |
391 | regmap_del_irq_chip(irq: chip->irq, data: chip->irq_data); |
392 | } |
393 | |
394 | static struct regmap_irq_chip pm800_irq_chip = { |
395 | .name = "88pm800" , |
396 | .irqs = pm800_irqs, |
397 | .num_irqs = ARRAY_SIZE(pm800_irqs), |
398 | |
399 | .num_regs = 4, |
400 | .status_base = PM800_INT_STATUS1, |
401 | .unmask_base = PM800_INT_ENA_1, |
402 | .ack_base = PM800_INT_STATUS1, |
403 | }; |
404 | |
405 | static int pm800_pages_init(struct pm80x_chip *chip) |
406 | { |
407 | struct pm80x_subchip *subchip; |
408 | struct i2c_client *client = chip->client; |
409 | |
410 | int ret = 0; |
411 | |
412 | subchip = chip->subchip; |
413 | if (!subchip || !subchip->power_page_addr || !subchip->gpadc_page_addr) |
414 | return -ENODEV; |
415 | |
416 | /* PM800 block power page */ |
417 | subchip->power_page = i2c_new_dummy_device(adapter: client->adapter, |
418 | address: subchip->power_page_addr); |
419 | if (IS_ERR(ptr: subchip->power_page)) { |
420 | ret = PTR_ERR(ptr: subchip->power_page); |
421 | goto out; |
422 | } |
423 | |
424 | subchip->regmap_power = devm_regmap_init_i2c(subchip->power_page, |
425 | &pm80x_regmap_config); |
426 | if (IS_ERR(ptr: subchip->regmap_power)) { |
427 | ret = PTR_ERR(ptr: subchip->regmap_power); |
428 | dev_err(chip->dev, |
429 | "Failed to allocate regmap_power: %d\n" , ret); |
430 | goto out; |
431 | } |
432 | |
433 | i2c_set_clientdata(client: subchip->power_page, data: chip); |
434 | |
435 | /* PM800 block GPADC */ |
436 | subchip->gpadc_page = i2c_new_dummy_device(adapter: client->adapter, |
437 | address: subchip->gpadc_page_addr); |
438 | if (IS_ERR(ptr: subchip->gpadc_page)) { |
439 | ret = PTR_ERR(ptr: subchip->gpadc_page); |
440 | goto out; |
441 | } |
442 | |
443 | subchip->regmap_gpadc = devm_regmap_init_i2c(subchip->gpadc_page, |
444 | &pm80x_regmap_config); |
445 | if (IS_ERR(ptr: subchip->regmap_gpadc)) { |
446 | ret = PTR_ERR(ptr: subchip->regmap_gpadc); |
447 | dev_err(chip->dev, |
448 | "Failed to allocate regmap_gpadc: %d\n" , ret); |
449 | goto out; |
450 | } |
451 | i2c_set_clientdata(client: subchip->gpadc_page, data: chip); |
452 | |
453 | out: |
454 | return ret; |
455 | } |
456 | |
457 | static void pm800_pages_exit(struct pm80x_chip *chip) |
458 | { |
459 | struct pm80x_subchip *subchip; |
460 | |
461 | subchip = chip->subchip; |
462 | |
463 | if (subchip && subchip->power_page) |
464 | i2c_unregister_device(client: subchip->power_page); |
465 | |
466 | if (subchip && subchip->gpadc_page) |
467 | i2c_unregister_device(client: subchip->gpadc_page); |
468 | } |
469 | |
470 | static int device_800_init(struct pm80x_chip *chip, |
471 | struct pm80x_platform_data *pdata) |
472 | { |
473 | int ret; |
474 | unsigned int val; |
475 | |
476 | /* |
477 | * alarm wake up bit will be clear in device_irq_init(), |
478 | * read before that |
479 | */ |
480 | ret = regmap_read(map: chip->regmap, PM800_RTC_CONTROL, val: &val); |
481 | if (ret < 0) { |
482 | dev_err(chip->dev, "Failed to read RTC register: %d\n" , ret); |
483 | goto out; |
484 | } |
485 | if (val & PM800_ALARM_WAKEUP) { |
486 | if (pdata && pdata->rtc) |
487 | pdata->rtc->rtc_wakeup = 1; |
488 | } |
489 | |
490 | ret = device_gpadc_init(chip, pdata); |
491 | if (ret < 0) { |
492 | dev_err(chip->dev, "[%s]Failed to init gpadc\n" , __func__); |
493 | goto out; |
494 | } |
495 | |
496 | chip->regmap_irq_chip = &pm800_irq_chip; |
497 | |
498 | ret = device_irq_init_800(chip); |
499 | if (ret < 0) { |
500 | dev_err(chip->dev, "[%s]Failed to init pm800 irq\n" , __func__); |
501 | goto out; |
502 | } |
503 | |
504 | ret = device_onkey_init(chip, pdata); |
505 | if (ret) { |
506 | dev_err(chip->dev, "Failed to add onkey subdev\n" ); |
507 | goto out_dev; |
508 | } |
509 | |
510 | ret = device_rtc_init(chip, pdata); |
511 | if (ret) { |
512 | dev_err(chip->dev, "Failed to add rtc subdev\n" ); |
513 | goto out; |
514 | } |
515 | |
516 | ret = device_regulator_init(chip, pdata); |
517 | if (ret) { |
518 | dev_err(chip->dev, "Failed to add regulators subdev\n" ); |
519 | goto out; |
520 | } |
521 | |
522 | return 0; |
523 | out_dev: |
524 | mfd_remove_devices(parent: chip->dev); |
525 | device_irq_exit_800(chip); |
526 | out: |
527 | return ret; |
528 | } |
529 | |
530 | static int pm800_probe(struct i2c_client *client) |
531 | { |
532 | int ret = 0; |
533 | struct pm80x_chip *chip; |
534 | struct pm80x_platform_data *pdata = dev_get_platdata(dev: &client->dev); |
535 | struct pm80x_subchip *subchip; |
536 | |
537 | ret = pm80x_init(client); |
538 | if (ret) { |
539 | dev_err(&client->dev, "pm800_init fail\n" ); |
540 | goto out_init; |
541 | } |
542 | |
543 | chip = i2c_get_clientdata(client); |
544 | |
545 | /* init subchip for PM800 */ |
546 | subchip = |
547 | devm_kzalloc(dev: &client->dev, size: sizeof(struct pm80x_subchip), |
548 | GFP_KERNEL); |
549 | if (!subchip) { |
550 | ret = -ENOMEM; |
551 | goto err_subchip_alloc; |
552 | } |
553 | |
554 | /* pm800 has 2 addtional pages to support power and gpadc. */ |
555 | subchip->power_page_addr = client->addr + 1; |
556 | subchip->gpadc_page_addr = client->addr + 2; |
557 | chip->subchip = subchip; |
558 | |
559 | ret = pm800_pages_init(chip); |
560 | if (ret) { |
561 | dev_err(&client->dev, "pm800_pages_init failed!\n" ); |
562 | goto err_device_init; |
563 | } |
564 | |
565 | ret = device_800_init(chip, pdata); |
566 | if (ret) { |
567 | dev_err(chip->dev, "Failed to initialize 88pm800 devices\n" ); |
568 | goto err_device_init; |
569 | } |
570 | |
571 | if (pdata && pdata->plat_config) |
572 | pdata->plat_config(chip, pdata); |
573 | |
574 | return 0; |
575 | |
576 | err_device_init: |
577 | pm800_pages_exit(chip); |
578 | err_subchip_alloc: |
579 | pm80x_deinit(); |
580 | out_init: |
581 | return ret; |
582 | } |
583 | |
584 | static void pm800_remove(struct i2c_client *client) |
585 | { |
586 | struct pm80x_chip *chip = i2c_get_clientdata(client); |
587 | |
588 | mfd_remove_devices(parent: chip->dev); |
589 | device_irq_exit_800(chip); |
590 | |
591 | pm800_pages_exit(chip); |
592 | pm80x_deinit(); |
593 | } |
594 | |
595 | static struct i2c_driver pm800_driver = { |
596 | .driver = { |
597 | .name = "88PM800" , |
598 | .pm = pm_sleep_ptr(&pm80x_pm_ops), |
599 | }, |
600 | .probe = pm800_probe, |
601 | .remove = pm800_remove, |
602 | .id_table = pm80x_id_table, |
603 | }; |
604 | |
605 | static int __init pm800_i2c_init(void) |
606 | { |
607 | return i2c_add_driver(&pm800_driver); |
608 | } |
609 | subsys_initcall(pm800_i2c_init); |
610 | |
611 | static void __exit pm800_i2c_exit(void) |
612 | { |
613 | i2c_del_driver(driver: &pm800_driver); |
614 | } |
615 | module_exit(pm800_i2c_exit); |
616 | |
617 | MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM800" ); |
618 | MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>" ); |
619 | MODULE_LICENSE("GPL" ); |
620 | |