1/*
2 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
3 * and audio CODEC devices
4 *
5 * Copyright (C) 2005-2006 Texas Instruments, Inc.
6 *
7 * Modifications to defer interrupt handling to a kernel thread:
8 * Copyright (C) 2006 MontaVista Software, Inc.
9 *
10 * Based on tlv320aic23.c:
11 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 *
13 * Code cleanup and modifications to IRQ handler.
14 * by syed khasim <x0khasim@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 */
30
31#include <linux/init.h>
32#include <linux/mutex.h>
33#include <linux/platform_device.h>
34#include <linux/regmap.h>
35#include <linux/clk.h>
36#include <linux/err.h>
37#include <linux/device.h>
38#include <linux/of.h>
39#include <linux/of_irq.h>
40#include <linux/of_platform.h>
41#include <linux/irq.h>
42#include <linux/irqdomain.h>
43
44#include <linux/regulator/machine.h>
45
46#include <linux/i2c.h>
47#include <linux/mfd/twl.h>
48
49/* Register descriptions for audio */
50#include <linux/mfd/twl4030-audio.h>
51
52#include "twl-core.h"
53
54/*
55 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
56 * Management and System Companion Device" chips originally designed for
57 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
58 * often at around 3 Mbit/sec, including for interrupt handling.
59 *
60 * This driver core provides genirq support for the interrupts emitted,
61 * by the various modules, and exports register access primitives.
62 *
63 * FIXME this driver currently requires use of the first interrupt line
64 * (and associated registers).
65 */
66
67#define DRIVER_NAME "twl"
68
69/* Triton Core internal information (BEGIN) */
70
71/* Base Address defns for twl4030_map[] */
72
73/* subchip/slave 0 - USB ID */
74#define TWL4030_BASEADD_USB 0x0000
75
76/* subchip/slave 1 - AUD ID */
77#define TWL4030_BASEADD_AUDIO_VOICE 0x0000
78#define TWL4030_BASEADD_GPIO 0x0098
79#define TWL4030_BASEADD_INTBR 0x0085
80#define TWL4030_BASEADD_PIH 0x0080
81#define TWL4030_BASEADD_TEST 0x004C
82
83/* subchip/slave 2 - AUX ID */
84#define TWL4030_BASEADD_INTERRUPTS 0x00B9
85#define TWL4030_BASEADD_LED 0x00EE
86#define TWL4030_BASEADD_MADC 0x0000
87#define TWL4030_BASEADD_MAIN_CHARGE 0x0074
88#define TWL4030_BASEADD_PRECHARGE 0x00AA
89#define TWL4030_BASEADD_PWM 0x00F8
90#define TWL4030_BASEADD_KEYPAD 0x00D2
91
92#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
93#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
94 one */
95
96/* subchip/slave 3 - POWER ID */
97#define TWL4030_BASEADD_BACKUP 0x0014
98#define TWL4030_BASEADD_INT 0x002E
99#define TWL4030_BASEADD_PM_MASTER 0x0036
100
101#define TWL4030_BASEADD_PM_RECEIVER 0x005B
102#define TWL4030_DCDC_GLOBAL_CFG 0x06
103#define SMARTREFLEX_ENABLE BIT(3)
104
105#define TWL4030_BASEADD_RTC 0x001C
106#define TWL4030_BASEADD_SECURED_REG 0x0000
107
108/* Triton Core internal information (END) */
109
110
111/* subchip/slave 0 0x48 - POWER */
112#define TWL6030_BASEADD_RTC 0x0000
113#define TWL6030_BASEADD_SECURED_REG 0x0017
114#define TWL6030_BASEADD_PM_MASTER 0x001F
115#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
116#define TWL6030_BASEADD_PM_MISC 0x00E2
117#define TWL6030_BASEADD_PM_PUPD 0x00F0
118
119/* subchip/slave 1 0x49 - FEATURE */
120#define TWL6030_BASEADD_USB 0x0000
121#define TWL6030_BASEADD_GPADC_CTRL 0x002E
122#define TWL6030_BASEADD_AUX 0x0090
123#define TWL6030_BASEADD_PWM 0x00BA
124#define TWL6030_BASEADD_GASGAUGE 0x00C0
125#define TWL6030_BASEADD_PIH 0x00D0
126#define TWL6030_BASEADD_CHARGER 0x00E0
127#define TWL6032_BASEADD_CHARGER 0x00DA
128#define TWL6030_BASEADD_LED 0x00F4
129
130/* subchip/slave 2 0x4A - DFT */
131#define TWL6030_BASEADD_DIEID 0x00C0
132
133/* subchip/slave 3 0x4B - AUDIO */
134#define TWL6030_BASEADD_AUDIO 0x0000
135#define TWL6030_BASEADD_RSV 0x0000
136#define TWL6030_BASEADD_ZERO 0x0000
137
138/* Few power values */
139#define R_CFG_BOOT 0x05
140
141/* some fields in R_CFG_BOOT */
142#define HFCLK_FREQ_19p2_MHZ (1 << 0)
143#define HFCLK_FREQ_26_MHZ (2 << 0)
144#define HFCLK_FREQ_38p4_MHZ (3 << 0)
145#define HIGH_PERF_SQ (1 << 3)
146#define CK32K_LOWPWR_EN (1 << 7)
147
148/*----------------------------------------------------------------------*/
149
150/* Structure for each TWL4030/TWL6030 Slave */
151struct twl_client {
152 struct i2c_client *client;
153 struct regmap *regmap;
154};
155
156/* mapping the module id to slave id and base address */
157struct twl_mapping {
158 unsigned char sid; /* Slave ID */
159 unsigned char base; /* base address */
160};
161
162struct twl_private {
163 bool ready; /* The core driver is ready to be used */
164 u32 twl_idcode; /* TWL IDCODE Register value */
165 unsigned int twl_id;
166
167 struct twl_mapping *twl_map;
168 struct twl_client *twl_modules;
169};
170
171static struct twl_private *twl_priv;
172
173static struct twl_mapping twl4030_map[] = {
174 /*
175 * NOTE: don't change this table without updating the
176 * <linux/mfd/twl.h> defines for TWL4030_MODULE_*
177 * so they continue to match the order in this table.
178 */
179
180 /* Common IPs */
181 { 0, TWL4030_BASEADD_USB },
182 { 1, TWL4030_BASEADD_PIH },
183 { 2, TWL4030_BASEADD_MAIN_CHARGE },
184 { 3, TWL4030_BASEADD_PM_MASTER },
185 { 3, TWL4030_BASEADD_PM_RECEIVER },
186
187 { 3, TWL4030_BASEADD_RTC },
188 { 2, TWL4030_BASEADD_PWM },
189 { 2, TWL4030_BASEADD_LED },
190 { 3, TWL4030_BASEADD_SECURED_REG },
191
192 /* TWL4030 specific IPs */
193 { 1, TWL4030_BASEADD_AUDIO_VOICE },
194 { 1, TWL4030_BASEADD_GPIO },
195 { 1, TWL4030_BASEADD_INTBR },
196 { 1, TWL4030_BASEADD_TEST },
197 { 2, TWL4030_BASEADD_KEYPAD },
198
199 { 2, TWL4030_BASEADD_MADC },
200 { 2, TWL4030_BASEADD_INTERRUPTS },
201 { 2, TWL4030_BASEADD_PRECHARGE },
202 { 3, TWL4030_BASEADD_BACKUP },
203 { 3, TWL4030_BASEADD_INT },
204
205 { 2, TWL5031_BASEADD_ACCESSORY },
206 { 2, TWL5031_BASEADD_INTERRUPTS },
207};
208
209static const struct reg_default twl4030_49_defaults[] = {
210 /* Audio Registers */
211 { 0x01, 0x00}, /* CODEC_MODE */
212 { 0x02, 0x00}, /* OPTION */
213 /* 0x03 Unused */
214 { 0x04, 0x00}, /* MICBIAS_CTL */
215 { 0x05, 0x00}, /* ANAMICL */
216 { 0x06, 0x00}, /* ANAMICR */
217 { 0x07, 0x00}, /* AVADC_CTL */
218 { 0x08, 0x00}, /* ADCMICSEL */
219 { 0x09, 0x00}, /* DIGMIXING */
220 { 0x0a, 0x0f}, /* ATXL1PGA */
221 { 0x0b, 0x0f}, /* ATXR1PGA */
222 { 0x0c, 0x0f}, /* AVTXL2PGA */
223 { 0x0d, 0x0f}, /* AVTXR2PGA */
224 { 0x0e, 0x00}, /* AUDIO_IF */
225 { 0x0f, 0x00}, /* VOICE_IF */
226 { 0x10, 0x3f}, /* ARXR1PGA */
227 { 0x11, 0x3f}, /* ARXL1PGA */
228 { 0x12, 0x3f}, /* ARXR2PGA */
229 { 0x13, 0x3f}, /* ARXL2PGA */
230 { 0x14, 0x25}, /* VRXPGA */
231 { 0x15, 0x00}, /* VSTPGA */
232 { 0x16, 0x00}, /* VRX2ARXPGA */
233 { 0x17, 0x00}, /* AVDAC_CTL */
234 { 0x18, 0x00}, /* ARX2VTXPGA */
235 { 0x19, 0x32}, /* ARXL1_APGA_CTL*/
236 { 0x1a, 0x32}, /* ARXR1_APGA_CTL*/
237 { 0x1b, 0x32}, /* ARXL2_APGA_CTL*/
238 { 0x1c, 0x32}, /* ARXR2_APGA_CTL*/
239 { 0x1d, 0x00}, /* ATX2ARXPGA */
240 { 0x1e, 0x00}, /* BT_IF */
241 { 0x1f, 0x55}, /* BTPGA */
242 { 0x20, 0x00}, /* BTSTPGA */
243 { 0x21, 0x00}, /* EAR_CTL */
244 { 0x22, 0x00}, /* HS_SEL */
245 { 0x23, 0x00}, /* HS_GAIN_SET */
246 { 0x24, 0x00}, /* HS_POPN_SET */
247 { 0x25, 0x00}, /* PREDL_CTL */
248 { 0x26, 0x00}, /* PREDR_CTL */
249 { 0x27, 0x00}, /* PRECKL_CTL */
250 { 0x28, 0x00}, /* PRECKR_CTL */
251 { 0x29, 0x00}, /* HFL_CTL */
252 { 0x2a, 0x00}, /* HFR_CTL */
253 { 0x2b, 0x05}, /* ALC_CTL */
254 { 0x2c, 0x00}, /* ALC_SET1 */
255 { 0x2d, 0x00}, /* ALC_SET2 */
256 { 0x2e, 0x00}, /* BOOST_CTL */
257 { 0x2f, 0x00}, /* SOFTVOL_CTL */
258 { 0x30, 0x13}, /* DTMF_FREQSEL */
259 { 0x31, 0x00}, /* DTMF_TONEXT1H */
260 { 0x32, 0x00}, /* DTMF_TONEXT1L */
261 { 0x33, 0x00}, /* DTMF_TONEXT2H */
262 { 0x34, 0x00}, /* DTMF_TONEXT2L */
263 { 0x35, 0x79}, /* DTMF_TONOFF */
264 { 0x36, 0x11}, /* DTMF_WANONOFF */
265 { 0x37, 0x00}, /* I2S_RX_SCRAMBLE_H */
266 { 0x38, 0x00}, /* I2S_RX_SCRAMBLE_M */
267 { 0x39, 0x00}, /* I2S_RX_SCRAMBLE_L */
268 { 0x3a, 0x06}, /* APLL_CTL */
269 { 0x3b, 0x00}, /* DTMF_CTL */
270 { 0x3c, 0x44}, /* DTMF_PGA_CTL2 (0x3C) */
271 { 0x3d, 0x69}, /* DTMF_PGA_CTL1 (0x3D) */
272 { 0x3e, 0x00}, /* MISC_SET_1 */
273 { 0x3f, 0x00}, /* PCMBTMUX */
274 /* 0x40 - 0x42 Unused */
275 { 0x43, 0x00}, /* RX_PATH_SEL */
276 { 0x44, 0x32}, /* VDL_APGA_CTL */
277 { 0x45, 0x00}, /* VIBRA_CTL */
278 { 0x46, 0x00}, /* VIBRA_SET */
279 { 0x47, 0x00}, /* VIBRA_PWM_SET */
280 { 0x48, 0x00}, /* ANAMIC_GAIN */
281 { 0x49, 0x00}, /* MISC_SET_2 */
282 /* End of Audio Registers */
283};
284
285static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg)
286{
287 switch (reg) {
288 case 0x00:
289 case 0x03:
290 case 0x40:
291 case 0x41:
292 case 0x42:
293 return false;
294 default:
295 return true;
296 }
297}
298
299static const struct regmap_range twl4030_49_volatile_ranges[] = {
300 regmap_reg_range(TWL4030_BASEADD_TEST, 0xff),
301};
302
303static const struct regmap_access_table twl4030_49_volatile_table = {
304 .yes_ranges = twl4030_49_volatile_ranges,
305 .n_yes_ranges = ARRAY_SIZE(twl4030_49_volatile_ranges),
306};
307
308static const struct regmap_config twl4030_regmap_config[4] = {
309 {
310 /* Address 0x48 */
311 .reg_bits = 8,
312 .val_bits = 8,
313 .max_register = 0xff,
314 },
315 {
316 /* Address 0x49 */
317 .reg_bits = 8,
318 .val_bits = 8,
319 .max_register = 0xff,
320
321 .readable_reg = twl4030_49_nop_reg,
322 .writeable_reg = twl4030_49_nop_reg,
323
324 .volatile_table = &twl4030_49_volatile_table,
325
326 .reg_defaults = twl4030_49_defaults,
327 .num_reg_defaults = ARRAY_SIZE(twl4030_49_defaults),
328 .cache_type = REGCACHE_RBTREE,
329 },
330 {
331 /* Address 0x4a */
332 .reg_bits = 8,
333 .val_bits = 8,
334 .max_register = 0xff,
335 },
336 {
337 /* Address 0x4b */
338 .reg_bits = 8,
339 .val_bits = 8,
340 .max_register = 0xff,
341 },
342};
343
344static struct twl_mapping twl6030_map[] = {
345 /*
346 * NOTE: don't change this table without updating the
347 * <linux/mfd/twl.h> defines for TWL4030_MODULE_*
348 * so they continue to match the order in this table.
349 */
350
351 /* Common IPs */
352 { 1, TWL6030_BASEADD_USB },
353 { 1, TWL6030_BASEADD_PIH },
354 { 1, TWL6030_BASEADD_CHARGER },
355 { 0, TWL6030_BASEADD_PM_MASTER },
356 { 0, TWL6030_BASEADD_PM_SLAVE_MISC },
357
358 { 0, TWL6030_BASEADD_RTC },
359 { 1, TWL6030_BASEADD_PWM },
360 { 1, TWL6030_BASEADD_LED },
361 { 0, TWL6030_BASEADD_SECURED_REG },
362
363 /* TWL6030 specific IPs */
364 { 0, TWL6030_BASEADD_ZERO },
365 { 1, TWL6030_BASEADD_ZERO },
366 { 2, TWL6030_BASEADD_ZERO },
367 { 1, TWL6030_BASEADD_GPADC_CTRL },
368 { 1, TWL6030_BASEADD_GASGAUGE },
369};
370
371static const struct regmap_config twl6030_regmap_config[3] = {
372 {
373 /* Address 0x48 */
374 .reg_bits = 8,
375 .val_bits = 8,
376 .max_register = 0xff,
377 },
378 {
379 /* Address 0x49 */
380 .reg_bits = 8,
381 .val_bits = 8,
382 .max_register = 0xff,
383 },
384 {
385 /* Address 0x4a */
386 .reg_bits = 8,
387 .val_bits = 8,
388 .max_register = 0xff,
389 },
390};
391
392/*----------------------------------------------------------------------*/
393
394static inline int twl_get_num_slaves(void)
395{
396 if (twl_class_is_4030())
397 return 4; /* TWL4030 class have four slave address */
398 else
399 return 3; /* TWL6030 class have three slave address */
400}
401
402static inline int twl_get_last_module(void)
403{
404 if (twl_class_is_4030())
405 return TWL4030_MODULE_LAST;
406 else
407 return TWL6030_MODULE_LAST;
408}
409
410/* Exported Functions */
411
412unsigned int twl_rev(void)
413{
414 return twl_priv ? twl_priv->twl_id : 0;
415}
416EXPORT_SYMBOL(twl_rev);
417
418/**
419 * twl_get_regmap - Get the regmap associated with the given module
420 * @mod_no: module number
421 *
422 * Returns the regmap pointer or NULL in case of failure.
423 */
424static struct regmap *twl_get_regmap(u8 mod_no)
425{
426 int sid;
427 struct twl_client *twl;
428
429 if (unlikely(!twl_priv || !twl_priv->ready)) {
430 pr_err("%s: not initialized\n", DRIVER_NAME);
431 return NULL;
432 }
433 if (unlikely(mod_no >= twl_get_last_module())) {
434 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
435 return NULL;
436 }
437
438 sid = twl_priv->twl_map[mod_no].sid;
439 twl = &twl_priv->twl_modules[sid];
440
441 return twl->regmap;
442}
443
444/**
445 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
446 * @mod_no: module number
447 * @value: an array of num_bytes+1 containing data to write
448 * @reg: register address (just offset will do)
449 * @num_bytes: number of bytes to transfer
450 *
451 * Returns 0 on success or else a negative error code.
452 */
453int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
454{
455 struct regmap *regmap = twl_get_regmap(mod_no);
456 int ret;
457
458 if (!regmap)
459 return -EPERM;
460
461 ret = regmap_bulk_write(regmap, twl_priv->twl_map[mod_no].base + reg,
462 value, num_bytes);
463
464 if (ret)
465 pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n",
466 DRIVER_NAME, mod_no, reg, num_bytes);
467
468 return ret;
469}
470EXPORT_SYMBOL(twl_i2c_write);
471
472/**
473 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
474 * @mod_no: module number
475 * @value: an array of num_bytes containing data to be read
476 * @reg: register address (just offset will do)
477 * @num_bytes: number of bytes to transfer
478 *
479 * Returns 0 on success or else a negative error code.
480 */
481int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
482{
483 struct regmap *regmap = twl_get_regmap(mod_no);
484 int ret;
485
486 if (!regmap)
487 return -EPERM;
488
489 ret = regmap_bulk_read(regmap, twl_priv->twl_map[mod_no].base + reg,
490 value, num_bytes);
491
492 if (ret)
493 pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n",
494 DRIVER_NAME, mod_no, reg, num_bytes);
495
496 return ret;
497}
498EXPORT_SYMBOL(twl_i2c_read);
499
500/**
501 * twl_regcache_bypass - Configure the regcache bypass for the regmap associated
502 * with the module
503 * @mod_no: module number
504 * @enable: Regcache bypass state
505 *
506 * Returns 0 else failure.
507 */
508int twl_set_regcache_bypass(u8 mod_no, bool enable)
509{
510 struct regmap *regmap = twl_get_regmap(mod_no);
511
512 if (!regmap)
513 return -EPERM;
514
515 regcache_cache_bypass(regmap, enable);
516
517 return 0;
518}
519EXPORT_SYMBOL(twl_set_regcache_bypass);
520
521/*----------------------------------------------------------------------*/
522
523/**
524 * twl_read_idcode_register - API to read the IDCODE register.
525 *
526 * Unlocks the IDCODE register and read the 32 bit value.
527 */
528static int twl_read_idcode_register(void)
529{
530 int err;
531
532 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
533 REG_UNLOCK_TEST_REG);
534 if (err) {
535 pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
536 goto fail;
537 }
538
539 err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_priv->twl_idcode),
540 REG_IDCODE_7_0, 4);
541 if (err) {
542 pr_err("TWL4030: unable to read IDCODE -%d\n", err);
543 goto fail;
544 }
545
546 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
547 if (err)
548 pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
549fail:
550 return err;
551}
552
553/**
554 * twl_get_type - API to get TWL Si type.
555 *
556 * Api to get the TWL Si type from IDCODE value.
557 */
558int twl_get_type(void)
559{
560 return TWL_SIL_TYPE(twl_priv->twl_idcode);
561}
562EXPORT_SYMBOL_GPL(twl_get_type);
563
564/**
565 * twl_get_version - API to get TWL Si version.
566 *
567 * Api to get the TWL Si version from IDCODE value.
568 */
569int twl_get_version(void)
570{
571 return TWL_SIL_REV(twl_priv->twl_idcode);
572}
573EXPORT_SYMBOL_GPL(twl_get_version);
574
575/**
576 * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate.
577 *
578 * Api to get the TWL HFCLK rate based on BOOT_CFG register.
579 */
580int twl_get_hfclk_rate(void)
581{
582 u8 ctrl;
583 int rate;
584
585 twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT);
586
587 switch (ctrl & 0x3) {
588 case HFCLK_FREQ_19p2_MHZ:
589 rate = 19200000;
590 break;
591 case HFCLK_FREQ_26_MHZ:
592 rate = 26000000;
593 break;
594 case HFCLK_FREQ_38p4_MHZ:
595 rate = 38400000;
596 break;
597 default:
598 pr_err("TWL4030: HFCLK is not configured\n");
599 rate = -EINVAL;
600 break;
601 }
602
603 return rate;
604}
605EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
606
607static struct device *
608add_numbered_child(unsigned mod_no, const char *name, int num,
609 void *pdata, unsigned pdata_len,
610 bool can_wakeup, int irq0, int irq1)
611{
612 struct platform_device *pdev;
613 struct twl_client *twl;
614 int status, sid;
615
616 if (unlikely(mod_no >= twl_get_last_module())) {
617 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
618 return ERR_PTR(-EPERM);
619 }
620 sid = twl_priv->twl_map[mod_no].sid;
621 twl = &twl_priv->twl_modules[sid];
622
623 pdev = platform_device_alloc(name, num);
624 if (!pdev)
625 return ERR_PTR(-ENOMEM);
626
627 pdev->dev.parent = &twl->client->dev;
628
629 if (pdata) {
630 status = platform_device_add_data(pdev, pdata, pdata_len);
631 if (status < 0) {
632 dev_dbg(&pdev->dev, "can't add platform_data\n");
633 goto put_device;
634 }
635 }
636
637 if (irq0) {
638 struct resource r[2] = {
639 { .start = irq0, .flags = IORESOURCE_IRQ, },
640 { .start = irq1, .flags = IORESOURCE_IRQ, },
641 };
642
643 status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
644 if (status < 0) {
645 dev_dbg(&pdev->dev, "can't add irqs\n");
646 goto put_device;
647 }
648 }
649
650 status = platform_device_add(pdev);
651 if (status)
652 goto put_device;
653
654 device_init_wakeup(&pdev->dev, can_wakeup);
655
656 return &pdev->dev;
657
658put_device:
659 platform_device_put(pdev);
660 dev_err(&twl->client->dev, "failed to add device %s\n", name);
661 return ERR_PTR(status);
662}
663
664static inline struct device *add_child(unsigned mod_no, const char *name,
665 void *pdata, unsigned pdata_len,
666 bool can_wakeup, int irq0, int irq1)
667{
668 return add_numbered_child(mod_no, name, -1, pdata, pdata_len,
669 can_wakeup, irq0, irq1);
670}
671
672static struct device *
673add_regulator_linked(int num, struct regulator_init_data *pdata,
674 struct regulator_consumer_supply *consumers,
675 unsigned num_consumers, unsigned long features)
676{
677 struct twl_regulator_driver_data drv_data;
678
679 /* regulator framework demands init_data ... */
680 if (!pdata)
681 return NULL;
682
683 if (consumers) {
684 pdata->consumer_supplies = consumers;
685 pdata->num_consumer_supplies = num_consumers;
686 }
687
688 if (pdata->driver_data) {
689 /* If we have existing drv_data, just add the flags */
690 struct twl_regulator_driver_data *tmp;
691 tmp = pdata->driver_data;
692 tmp->features |= features;
693 } else {
694 /* add new driver data struct, used only during init */
695 drv_data.features = features;
696 drv_data.set_voltage = NULL;
697 drv_data.get_voltage = NULL;
698 drv_data.data = NULL;
699 pdata->driver_data = &drv_data;
700 }
701
702 /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */
703 return add_numbered_child(TWL_MODULE_PM_MASTER, "twl_reg", num,
704 pdata, sizeof(*pdata), false, 0, 0);
705}
706
707static struct device *
708add_regulator(int num, struct regulator_init_data *pdata,
709 unsigned long features)
710{
711 return add_regulator_linked(num, pdata, NULL, 0, features);
712}
713
714/*
715 * NOTE: We know the first 8 IRQs after pdata->base_irq are
716 * for the PIH, and the next are for the PWR_INT SIH, since
717 * that's how twl_init_irq() sets things up.
718 */
719
720static int
721add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
722 unsigned long features)
723{
724 struct device *child;
725
726 if (IS_ENABLED(CONFIG_GPIO_TWL4030) && pdata->gpio) {
727 child = add_child(TWL4030_MODULE_GPIO, "twl4030_gpio",
728 pdata->gpio, sizeof(*pdata->gpio),
729 false, irq_base + GPIO_INTR_OFFSET, 0);
730 if (IS_ERR(child))
731 return PTR_ERR(child);
732 }
733
734 if (IS_ENABLED(CONFIG_KEYBOARD_TWL4030) && pdata->keypad) {
735 child = add_child(TWL4030_MODULE_KEYPAD, "twl4030_keypad",
736 pdata->keypad, sizeof(*pdata->keypad),
737 true, irq_base + KEYPAD_INTR_OFFSET, 0);
738 if (IS_ERR(child))
739 return PTR_ERR(child);
740 }
741
742 if (IS_ENABLED(CONFIG_TWL4030_MADC) && pdata->madc &&
743 twl_class_is_4030()) {
744 child = add_child(TWL4030_MODULE_MADC, "twl4030_madc",
745 pdata->madc, sizeof(*pdata->madc),
746 true, irq_base + MADC_INTR_OFFSET, 0);
747 if (IS_ERR(child))
748 return PTR_ERR(child);
749 }
750
751 if (IS_ENABLED(CONFIG_RTC_DRV_TWL4030)) {
752 /*
753 * REVISIT platform_data here currently might expose the
754 * "msecure" line ... but for now we just expect board
755 * setup to tell the chip "it's always ok to SET_TIME".
756 * Eventually, Linux might become more aware of such
757 * HW security concerns, and "least privilege".
758 */
759 child = add_child(TWL_MODULE_RTC, "twl_rtc", NULL, 0,
760 true, irq_base + RTC_INTR_OFFSET, 0);
761 if (IS_ERR(child))
762 return PTR_ERR(child);
763 }
764
765 if (IS_ENABLED(CONFIG_PWM_TWL)) {
766 child = add_child(TWL_MODULE_PWM, "twl-pwm", NULL, 0,
767 false, 0, 0);
768 if (IS_ERR(child))
769 return PTR_ERR(child);
770 }
771
772 if (IS_ENABLED(CONFIG_PWM_TWL_LED)) {
773 child = add_child(TWL_MODULE_LED, "twl-pwmled", NULL, 0,
774 false, 0, 0);
775 if (IS_ERR(child))
776 return PTR_ERR(child);
777 }
778
779 if (IS_ENABLED(CONFIG_TWL4030_USB) && pdata->usb &&
780 twl_class_is_4030()) {
781
782 static struct regulator_consumer_supply usb1v5 = {
783 .supply = "usb1v5",
784 };
785 static struct regulator_consumer_supply usb1v8 = {
786 .supply = "usb1v8",
787 };
788 static struct regulator_consumer_supply usb3v1 = {
789 .supply = "usb3v1",
790 };
791
792 /* First add the regulators so that they can be used by transceiver */
793 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) {
794 /* this is a template that gets copied */
795 struct regulator_init_data usb_fixed = {
796 .constraints.valid_modes_mask =
797 REGULATOR_MODE_NORMAL
798 | REGULATOR_MODE_STANDBY,
799 .constraints.valid_ops_mask =
800 REGULATOR_CHANGE_MODE
801 | REGULATOR_CHANGE_STATUS,
802 };
803
804 child = add_regulator_linked(TWL4030_REG_VUSB1V5,
805 &usb_fixed, &usb1v5, 1,
806 features);
807 if (IS_ERR(child))
808 return PTR_ERR(child);
809
810 child = add_regulator_linked(TWL4030_REG_VUSB1V8,
811 &usb_fixed, &usb1v8, 1,
812 features);
813 if (IS_ERR(child))
814 return PTR_ERR(child);
815
816 child = add_regulator_linked(TWL4030_REG_VUSB3V1,
817 &usb_fixed, &usb3v1, 1,
818 features);
819 if (IS_ERR(child))
820 return PTR_ERR(child);
821
822 }
823
824 child = add_child(TWL_MODULE_USB, "twl4030_usb",
825 pdata->usb, sizeof(*pdata->usb), true,
826 /* irq0 = USB_PRES, irq1 = USB */
827 irq_base + USB_PRES_INTR_OFFSET,
828 irq_base + USB_INTR_OFFSET);
829
830 if (IS_ERR(child))
831 return PTR_ERR(child);
832
833 /* we need to connect regulators to this transceiver */
834 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child) {
835 usb1v5.dev_name = dev_name(child);
836 usb1v8.dev_name = dev_name(child);
837 usb3v1.dev_name = dev_name(child);
838 }
839 }
840
841 if (IS_ENABLED(CONFIG_TWL4030_WATCHDOG) && twl_class_is_4030()) {
842 child = add_child(TWL_MODULE_PM_RECEIVER, "twl4030_wdt", NULL,
843 0, false, 0, 0);
844 if (IS_ERR(child))
845 return PTR_ERR(child);
846 }
847
848 if (IS_ENABLED(CONFIG_INPUT_TWL4030_PWRBUTTON) && twl_class_is_4030()) {
849 child = add_child(TWL_MODULE_PM_MASTER, "twl4030_pwrbutton",
850 NULL, 0, true, irq_base + 8 + 0, 0);
851 if (IS_ERR(child))
852 return PTR_ERR(child);
853 }
854
855 if (IS_ENABLED(CONFIG_MFD_TWL4030_AUDIO) && pdata->audio &&
856 twl_class_is_4030()) {
857 child = add_child(TWL4030_MODULE_AUDIO_VOICE, "twl4030-audio",
858 pdata->audio, sizeof(*pdata->audio),
859 false, 0, 0);
860 if (IS_ERR(child))
861 return PTR_ERR(child);
862 }
863
864 /* twl4030 regulators */
865 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_4030()) {
866 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1,
867 features);
868 if (IS_ERR(child))
869 return PTR_ERR(child);
870
871 child = add_regulator(TWL4030_REG_VIO, pdata->vio,
872 features);
873 if (IS_ERR(child))
874 return PTR_ERR(child);
875
876 child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1,
877 features);
878 if (IS_ERR(child))
879 return PTR_ERR(child);
880
881 child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2,
882 features);
883 if (IS_ERR(child))
884 return PTR_ERR(child);
885
886 child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1,
887 features);
888 if (IS_ERR(child))
889 return PTR_ERR(child);
890
891 child = add_regulator(TWL4030_REG_VDAC, pdata->vdac,
892 features);
893 if (IS_ERR(child))
894 return PTR_ERR(child);
895
896 child = add_regulator((features & TWL4030_VAUX2)
897 ? TWL4030_REG_VAUX2_4030
898 : TWL4030_REG_VAUX2,
899 pdata->vaux2, features);
900 if (IS_ERR(child))
901 return PTR_ERR(child);
902
903 child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1,
904 features);
905 if (IS_ERR(child))
906 return PTR_ERR(child);
907
908 child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2,
909 features);
910 if (IS_ERR(child))
911 return PTR_ERR(child);
912
913 child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig,
914 features);
915 if (IS_ERR(child))
916 return PTR_ERR(child);
917 }
918
919 /* maybe add LDOs that are omitted on cost-reduced parts */
920 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && !(features & TPS_SUBSET)
921 && twl_class_is_4030()) {
922 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2,
923 features);
924 if (IS_ERR(child))
925 return PTR_ERR(child);
926
927 child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2,
928 features);
929 if (IS_ERR(child))
930 return PTR_ERR(child);
931
932 child = add_regulator(TWL4030_REG_VSIM, pdata->vsim,
933 features);
934 if (IS_ERR(child))
935 return PTR_ERR(child);
936
937 child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1,
938 features);
939 if (IS_ERR(child))
940 return PTR_ERR(child);
941
942 child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3,
943 features);
944 if (IS_ERR(child))
945 return PTR_ERR(child);
946
947 child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4,
948 features);
949 if (IS_ERR(child))
950 return PTR_ERR(child);
951 }
952
953 if (IS_ENABLED(CONFIG_CHARGER_TWL4030) && pdata->bci &&
954 !(features & (TPS_SUBSET | TWL5031))) {
955 child = add_child(TWL_MODULE_MAIN_CHARGE, "twl4030_bci",
956 pdata->bci, sizeof(*pdata->bci), false,
957 /* irq0 = CHG_PRES, irq1 = BCI */
958 irq_base + BCI_PRES_INTR_OFFSET,
959 irq_base + BCI_INTR_OFFSET);
960 if (IS_ERR(child))
961 return PTR_ERR(child);
962 }
963
964 if (IS_ENABLED(CONFIG_TWL4030_POWER) && pdata->power) {
965 child = add_child(TWL_MODULE_PM_MASTER, "twl4030_power",
966 pdata->power, sizeof(*pdata->power), false,
967 0, 0);
968 if (IS_ERR(child))
969 return PTR_ERR(child);
970 }
971
972 return 0;
973}
974
975/*----------------------------------------------------------------------*/
976
977/*
978 * These three functions initialize the on-chip clock framework,
979 * letting it generate the right frequencies for USB, MADC, and
980 * other purposes.
981 */
982static inline int protect_pm_master(void)
983{
984 int e = 0;
985
986 e = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
987 TWL4030_PM_MASTER_PROTECT_KEY);
988 return e;
989}
990
991static inline int unprotect_pm_master(void)
992{
993 int e = 0;
994
995 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
996 TWL4030_PM_MASTER_PROTECT_KEY);
997 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
998 TWL4030_PM_MASTER_PROTECT_KEY);
999
1000 return e;
1001}
1002
1003static void clocks_init(struct device *dev,
1004 struct twl4030_clock_init_data *clock)
1005{
1006 int e = 0;
1007 struct clk *osc;
1008 u32 rate;
1009 u8 ctrl = HFCLK_FREQ_26_MHZ;
1010
1011 osc = clk_get(dev, "fck");
1012 if (IS_ERR(osc)) {
1013 printk(KERN_WARNING "Skipping twl internal clock init and "
1014 "using bootloader value (unknown osc rate)\n");
1015 return;
1016 }
1017
1018 rate = clk_get_rate(osc);
1019 clk_put(osc);
1020
1021 switch (rate) {
1022 case 19200000:
1023 ctrl = HFCLK_FREQ_19p2_MHZ;
1024 break;
1025 case 26000000:
1026 ctrl = HFCLK_FREQ_26_MHZ;
1027 break;
1028 case 38400000:
1029 ctrl = HFCLK_FREQ_38p4_MHZ;
1030 break;
1031 }
1032
1033 ctrl |= HIGH_PERF_SQ;
1034 if (clock && clock->ck32k_lowpwr_enable)
1035 ctrl |= CK32K_LOWPWR_EN;
1036
1037 e |= unprotect_pm_master();
1038 /* effect->MADC+USB ck en */
1039 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
1040 e |= protect_pm_master();
1041
1042 if (e < 0)
1043 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
1044}
1045
1046/*----------------------------------------------------------------------*/
1047
1048
1049static int twl_remove(struct i2c_client *client)
1050{
1051 unsigned i, num_slaves;
1052 int status;
1053
1054 if (twl_class_is_4030())
1055 status = twl4030_exit_irq();
1056 else
1057 status = twl6030_exit_irq();
1058
1059 if (status < 0)
1060 return status;
1061
1062 num_slaves = twl_get_num_slaves();
1063 for (i = 0; i < num_slaves; i++) {
1064 struct twl_client *twl = &twl_priv->twl_modules[i];
1065
1066 if (twl->client && twl->client != client)
1067 i2c_unregister_device(twl->client);
1068 twl->client = NULL;
1069 }
1070 twl_priv->ready = false;
1071 return 0;
1072}
1073
1074static struct of_dev_auxdata twl_auxdata_lookup[] = {
1075 OF_DEV_AUXDATA("ti,twl4030-gpio", 0, "twl4030-gpio", NULL),
1076 { /* sentinel */ },
1077};
1078
1079/* NOTE: This driver only handles a single twl4030/tps659x0 chip */
1080static int
1081twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
1082{
1083 struct twl4030_platform_data *pdata = dev_get_platdata(&client->dev);
1084 struct device_node *node = client->dev.of_node;
1085 struct platform_device *pdev;
1086 const struct regmap_config *twl_regmap_config;
1087 int irq_base = 0;
1088 int status;
1089 unsigned i, num_slaves;
1090
1091 if (!node && !pdata) {
1092 dev_err(&client->dev, "no platform data\n");
1093 return -EINVAL;
1094 }
1095
1096 if (twl_priv) {
1097 dev_dbg(&client->dev, "only one instance of %s allowed\n",
1098 DRIVER_NAME);
1099 return -EBUSY;
1100 }
1101
1102 pdev = platform_device_alloc(DRIVER_NAME, -1);
1103 if (!pdev) {
1104 dev_err(&client->dev, "can't alloc pdev\n");
1105 return -ENOMEM;
1106 }
1107
1108 status = platform_device_add(pdev);
1109 if (status) {
1110 platform_device_put(pdev);
1111 return status;
1112 }
1113
1114 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
1115 dev_dbg(&client->dev, "can't talk I2C?\n");
1116 status = -EIO;
1117 goto free;
1118 }
1119
1120 twl_priv = devm_kzalloc(&client->dev, sizeof(struct twl_private),
1121 GFP_KERNEL);
1122 if (!twl_priv) {
1123 status = -ENOMEM;
1124 goto free;
1125 }
1126
1127 if ((id->driver_data) & TWL6030_CLASS) {
1128 twl_priv->twl_id = TWL6030_CLASS_ID;
1129 twl_priv->twl_map = &twl6030_map[0];
1130 /* The charger base address is different in twl6032 */
1131 if ((id->driver_data) & TWL6032_SUBCLASS)
1132 twl_priv->twl_map[TWL_MODULE_MAIN_CHARGE].base =
1133 TWL6032_BASEADD_CHARGER;
1134 twl_regmap_config = twl6030_regmap_config;
1135 } else {
1136 twl_priv->twl_id = TWL4030_CLASS_ID;
1137 twl_priv->twl_map = &twl4030_map[0];
1138 twl_regmap_config = twl4030_regmap_config;
1139 }
1140
1141 num_slaves = twl_get_num_slaves();
1142 twl_priv->twl_modules = devm_kcalloc(&client->dev,
1143 num_slaves,
1144 sizeof(struct twl_client),
1145 GFP_KERNEL);
1146 if (!twl_priv->twl_modules) {
1147 status = -ENOMEM;
1148 goto free;
1149 }
1150
1151 for (i = 0; i < num_slaves; i++) {
1152 struct twl_client *twl = &twl_priv->twl_modules[i];
1153
1154 if (i == 0) {
1155 twl->client = client;
1156 } else {
1157 twl->client = i2c_new_dummy(client->adapter,
1158 client->addr + i);
1159 if (!twl->client) {
1160 dev_err(&client->dev,
1161 "can't attach client %d\n", i);
1162 status = -ENOMEM;
1163 goto fail;
1164 }
1165 }
1166
1167 twl->regmap = devm_regmap_init_i2c(twl->client,
1168 &twl_regmap_config[i]);
1169 if (IS_ERR(twl->regmap)) {
1170 status = PTR_ERR(twl->regmap);
1171 dev_err(&client->dev,
1172 "Failed to allocate regmap %d, err: %d\n", i,
1173 status);
1174 goto fail;
1175 }
1176 }
1177
1178 twl_priv->ready = true;
1179
1180 /* setup clock framework */
1181 clocks_init(&client->dev, pdata ? pdata->clock : NULL);
1182
1183 /* read TWL IDCODE Register */
1184 if (twl_class_is_4030()) {
1185 status = twl_read_idcode_register();
1186 WARN(status < 0, "Error: reading twl_idcode register value\n");
1187 }
1188
1189 /* Maybe init the T2 Interrupt subsystem */
1190 if (client->irq) {
1191 if (twl_class_is_4030()) {
1192 twl4030_init_chip_irq(id->name);
1193 irq_base = twl4030_init_irq(&client->dev, client->irq);
1194 } else {
1195 irq_base = twl6030_init_irq(&client->dev, client->irq);
1196 }
1197
1198 if (irq_base < 0) {
1199 status = irq_base;
1200 goto fail;
1201 }
1202 }
1203
1204 /*
1205 * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
1206 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
1207 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
1208 *
1209 * Also, always enable SmartReflex bit as that's needed for omaps to
1210 * to do anything over I2C4 for voltage scaling even if SmartReflex
1211 * is disabled. Without the SmartReflex bit omap sys_clkreq idle
1212 * signal will never trigger for retention idle.
1213 */
1214 if (twl_class_is_4030()) {
1215 u8 temp;
1216
1217 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
1218 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
1219 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
1220 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
1221
1222 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
1223 TWL4030_DCDC_GLOBAL_CFG);
1224 temp |= SMARTREFLEX_ENABLE;
1225 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
1226 TWL4030_DCDC_GLOBAL_CFG);
1227 }
1228
1229 if (node) {
1230 if (pdata)
1231 twl_auxdata_lookup[0].platform_data = pdata->gpio;
1232 status = of_platform_populate(node, NULL, twl_auxdata_lookup,
1233 &client->dev);
1234 } else {
1235 status = add_children(pdata, irq_base, id->driver_data);
1236 }
1237
1238fail:
1239 if (status < 0)
1240 twl_remove(client);
1241free:
1242 if (status < 0)
1243 platform_device_unregister(pdev);
1244
1245 return status;
1246}
1247
1248static const struct i2c_device_id twl_ids[] = {
1249 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
1250 { "twl5030", 0 }, /* T2 updated */
1251 { "twl5031", TWL5031 }, /* TWL5030 updated */
1252 { "tps65950", 0 }, /* catalog version of twl5030 */
1253 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
1254 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
1255 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
1256 and vibrator. Charger in USB module*/
1257 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
1258 { "twl6032", TWL6030_CLASS | TWL6032_SUBCLASS }, /* "Phoenix lite" */
1259 { /* end of list */ },
1260};
1261
1262/* One Client Driver , 4 Clients */
1263static struct i2c_driver twl_driver = {
1264 .driver.name = DRIVER_NAME,
1265 .id_table = twl_ids,
1266 .probe = twl_probe,
1267 .remove = twl_remove,
1268};
1269builtin_i2c_driver(twl_driver);
1270