| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /******************************************************************************* |
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| 3 | * |
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| 4 | * CTU CAN FD IP Core |
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| 5 | * |
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| 6 | * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU |
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| 7 | * Copyright (C) 2018-2021 Ondrej Ille <ondrej.ille@gmail.com> self-funded |
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| 8 | * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU |
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| 9 | * Copyright (C) 2018-2021 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded |
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| 10 | * |
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| 11 | * Project advisors: |
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| 12 | * Jiri Novak <jnovak@fel.cvut.cz> |
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| 13 | * Pavel Pisa <pisa@cmp.felk.cvut.cz> |
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| 14 | * |
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| 15 | * Department of Measurement (http://meas.fel.cvut.cz/) |
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| 16 | * Faculty of Electrical Engineering (http://www.fel.cvut.cz) |
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| 17 | * Czech Technical University (http://www.cvut.cz/) |
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| 18 | ******************************************************************************/ |
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| 19 | |
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| 20 | /* This file is autogenerated, DO NOT EDIT! */ |
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| 21 | |
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| 22 | #ifndef __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__ |
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| 23 | #define __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__ |
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| 24 | |
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| 25 | #include <linux/bits.h> |
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| 26 | |
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| 27 | /* CAN_Frame_format memory map */ |
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| 28 | enum ctu_can_fd_can_frame_format { |
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| 29 | CTUCANFD_FRAME_FORMAT_W = 0x0, |
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| 30 | CTUCANFD_IDENTIFIER_W = 0x4, |
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| 31 | CTUCANFD_TIMESTAMP_L_W = 0x8, |
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| 32 | CTUCANFD_TIMESTAMP_U_W = 0xc, |
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| 33 | CTUCANFD_DATA_1_4_W = 0x10, |
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| 34 | CTUCANFD_DATA_5_8_W = 0x14, |
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| 35 | CTUCANFD_DATA_61_64_W = 0x4c, |
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| 36 | }; |
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| 37 | |
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| 38 | /* CAN_FD_Frame_format memory region */ |
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| 39 | |
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| 40 | /* FRAME_FORMAT_W registers */ |
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| 41 | #define REG_FRAME_FORMAT_W_DLC GENMASK(3, 0) |
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| 42 | #define REG_FRAME_FORMAT_W_RTR BIT(5) |
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| 43 | #define REG_FRAME_FORMAT_W_IDE BIT(6) |
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| 44 | #define REG_FRAME_FORMAT_W_FDF BIT(7) |
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| 45 | #define REG_FRAME_FORMAT_W_BRS BIT(9) |
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| 46 | #define REG_FRAME_FORMAT_W_ESI_RSV BIT(10) |
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| 47 | #define REG_FRAME_FORMAT_W_RWCNT GENMASK(15, 11) |
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| 48 | |
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| 49 | /* IDENTIFIER_W registers */ |
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| 50 | #define REG_IDENTIFIER_W_IDENTIFIER_EXT GENMASK(17, 0) |
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| 51 | #define REG_IDENTIFIER_W_IDENTIFIER_BASE GENMASK(28, 18) |
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| 52 | |
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| 53 | /* TIMESTAMP_L_W registers */ |
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| 54 | #define REG_TIMESTAMP_L_W_TIME_STAMP_L_W GENMASK(31, 0) |
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| 55 | |
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| 56 | /* TIMESTAMP_U_W registers */ |
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| 57 | #define REG_TIMESTAMP_U_W_TIMESTAMP_U_W GENMASK(31, 0) |
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| 58 | |
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| 59 | /* DATA_1_4_W registers */ |
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| 60 | #define REG_DATA_1_4_W_DATA_1 GENMASK(7, 0) |
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| 61 | #define REG_DATA_1_4_W_DATA_2 GENMASK(15, 8) |
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| 62 | #define REG_DATA_1_4_W_DATA_3 GENMASK(23, 16) |
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| 63 | #define REG_DATA_1_4_W_DATA_4 GENMASK(31, 24) |
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| 64 | |
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| 65 | /* DATA_5_8_W registers */ |
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| 66 | #define REG_DATA_5_8_W_DATA_5 GENMASK(7, 0) |
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| 67 | #define REG_DATA_5_8_W_DATA_6 GENMASK(15, 8) |
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| 68 | #define REG_DATA_5_8_W_DATA_7 GENMASK(23, 16) |
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| 69 | #define REG_DATA_5_8_W_DATA_8 GENMASK(31, 24) |
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| 70 | |
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| 71 | /* DATA_61_64_W registers */ |
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| 72 | #define REG_DATA_61_64_W_DATA_61 GENMASK(7, 0) |
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| 73 | #define REG_DATA_61_64_W_DATA_62 GENMASK(15, 8) |
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| 74 | #define REG_DATA_61_64_W_DATA_63 GENMASK(23, 16) |
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| 75 | #define REG_DATA_61_64_W_DATA_64 GENMASK(31, 24) |
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| 76 | |
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| 77 | #endif |
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| 78 | |
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