| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * Applied Micro X-Gene SoC Ethernet v2 Driver |
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| 4 | * |
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| 5 | * Copyright (c) 2017, Applied Micro Circuits Corporation |
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| 6 | * Author(s): Iyappan Subramanian <isubramanian@apm.com> |
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| 7 | * Keyur Chudgar <kchudgar@apm.com> |
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| 8 | */ |
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| 9 | |
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| 10 | #ifndef __XGENE_ENET_V2_ENET_H__ |
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| 11 | #define __XGENE_ENET_V2_ENET_H__ |
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| 12 | |
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| 13 | #define ENET_CLKEN 0xc008 |
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| 14 | #define ENET_SRST 0xc000 |
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| 15 | #define ENET_SHIM 0xc010 |
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| 16 | #define CFG_MEM_RAM_SHUTDOWN 0xd070 |
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| 17 | #define BLOCK_MEM_RDY 0xd074 |
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| 18 | |
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| 19 | #define MEM_RDY 0xffffffff |
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| 20 | #define DEVM_ARAUX_COH BIT(19) |
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| 21 | #define DEVM_AWAUX_COH BIT(3) |
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| 22 | |
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| 23 | #define CFG_FORCE_LINK_STATUS_EN 0x229c |
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| 24 | #define FORCE_LINK_STATUS 0x22a0 |
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| 25 | #define CFG_LINK_AGGR_RESUME 0x27c8 |
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| 26 | #define RX_DV_GATE_REG 0x2dfc |
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| 27 | |
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| 28 | void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val); |
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| 29 | u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset); |
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| 30 | int xge_port_reset(struct net_device *ndev); |
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| 31 | void xge_port_init(struct net_device *ndev); |
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| 32 | |
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| 33 | #endif /* __XGENE_ENET_V2_ENET__H__ */ |
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| 34 | |
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