| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * Applied Micro X-Gene SoC Ethernet v2 Driver |
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| 4 | * |
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| 5 | * Copyright (c) 2017, Applied Micro Circuits Corporation |
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| 6 | * Author(s): Iyappan Subramanian <isubramanian@apm.com> |
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| 7 | */ |
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| 8 | |
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| 9 | #ifndef __XGENE_ENET_V2_ETHTOOL_H__ |
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| 10 | #define __XGENE_ENET_V2_ETHTOOL_H__ |
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| 11 | |
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| 12 | struct xge_gstrings_stats { |
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| 13 | char name[ETH_GSTRING_LEN]; |
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| 14 | int offset; |
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| 15 | }; |
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| 16 | |
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| 17 | struct xge_gstrings_extd_stats { |
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| 18 | char name[ETH_GSTRING_LEN]; |
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| 19 | u32 addr; |
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| 20 | u32 value; |
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| 21 | }; |
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| 22 | |
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| 23 | #define TR64 0xa080 |
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| 24 | #define TR127 0xa084 |
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| 25 | #define TR255 0xa088 |
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| 26 | #define TR511 0xa08c |
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| 27 | #define TR1K 0xa090 |
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| 28 | #define TRMAX 0xa094 |
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| 29 | #define TRMGV 0xa098 |
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| 30 | #define RFCS 0xa0a4 |
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| 31 | #define RMCA 0xa0a8 |
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| 32 | #define RBCA 0xa0ac |
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| 33 | #define RXCF 0xa0b0 |
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| 34 | #define RXPF 0xa0b4 |
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| 35 | #define RXUO 0xa0b8 |
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| 36 | #define RALN 0xa0bc |
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| 37 | #define RFLR 0xa0c0 |
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| 38 | #define RCDE 0xa0c4 |
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| 39 | #define RCSE 0xa0c8 |
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| 40 | #define RUND 0xa0cc |
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| 41 | #define ROVR 0xa0d0 |
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| 42 | #define RFRG 0xa0d4 |
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| 43 | #define RJBR 0xa0d8 |
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| 44 | #define RDRP 0xa0dc |
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| 45 | #define TMCA 0xa0e8 |
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| 46 | #define TBCA 0xa0ec |
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| 47 | #define TXPF 0xa0f0 |
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| 48 | #define TDFR 0xa0f4 |
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| 49 | #define TEDF 0xa0f8 |
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| 50 | #define TSCL 0xa0fc |
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| 51 | #define TMCL 0xa100 |
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| 52 | #define TLCL 0xa104 |
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| 53 | #define TXCL 0xa108 |
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| 54 | #define TNCL 0xa10c |
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| 55 | #define TPFH 0xa110 |
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| 56 | #define TDRP 0xa114 |
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| 57 | #define TJBR 0xa118 |
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| 58 | #define TFCS 0xa11c |
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| 59 | #define TXCF 0xa120 |
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| 60 | #define TOVR 0xa124 |
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| 61 | #define TUND 0xa128 |
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| 62 | #define TFRG 0xa12c |
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| 63 | |
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| 64 | void xge_set_ethtool_ops(struct net_device *ndev); |
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| 65 | |
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| 66 | #endif /* __XGENE_ENET_V2_ETHTOOL_H__ */ |
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| 67 | |
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