1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * aQuantia Corporation Network Driver |
4 | * Copyright (C) 2014-2019 aQuantia Corporation. All rights reserved |
5 | */ |
6 | |
7 | /* File aq_cfg.h: Definition of configuration parameters and constants. */ |
8 | |
9 | #ifndef AQ_CFG_H |
10 | #define AQ_CFG_H |
11 | |
12 | #define AQ_CFG_VECS_DEF 8U |
13 | #define AQ_CFG_TCS_DEF 1U |
14 | |
15 | #define AQ_CFG_TXDS_DEF 4096U |
16 | #define AQ_CFG_RXDS_DEF 2048U |
17 | |
18 | #define AQ_CFG_IS_POLLING_DEF 0U |
19 | |
20 | #define AQ_CFG_FORCE_LEGACY_INT 0U |
21 | |
22 | #define AQ_CFG_INTERRUPT_MODERATION_OFF 0 |
23 | #define AQ_CFG_INTERRUPT_MODERATION_ON 1 |
24 | #define AQ_CFG_INTERRUPT_MODERATION_AUTO 0xFFFFU |
25 | |
26 | #define AQ_CFG_INTERRUPT_MODERATION_USEC_MAX (0x1FF * 2) |
27 | |
28 | #define AQ_CFG_IRQ_MASK 0x3FFU |
29 | |
30 | #define AQ_CFG_VECS_MAX 8U |
31 | #define AQ_CFG_TCS_MAX 8U |
32 | |
33 | #define AQ_CFG_TX_FRAME_MAX (16U * 1024U) |
34 | #define AQ_CFG_RX_FRAME_MAX (2U * 1024U) |
35 | |
36 | #define AQ_CFG_TX_CLEAN_BUDGET 256U |
37 | |
38 | #define AQ_CFG_RX_REFILL_THRES 32U |
39 | |
40 | #define AQ_CFG_RX_HDR_SIZE 256U |
41 | |
42 | #define AQ_CFG_RX_PAGEORDER 0U |
43 | #define AQ_CFG_XDP_PAGEORDER 2U |
44 | |
45 | /* LRO */ |
46 | #define AQ_CFG_IS_LRO_DEF 1U |
47 | |
48 | /* RSS */ |
49 | #define 64U |
50 | #define 40U |
51 | |
52 | #define 1U |
53 | #define AQ_CFG_VECS_DEF |
54 | #define 0U |
55 | |
56 | #define AQ_CFG_PCI_FUNC_MSIX_IRQS 9U |
57 | #define AQ_CFG_PCI_FUNC_PORTS 2U |
58 | |
59 | #define AQ_CFG_SERVICE_TIMER_INTERVAL (1 * HZ) |
60 | #define AQ_CFG_POLLING_TIMER_INTERVAL ((unsigned int)(2 * HZ)) |
61 | |
62 | #define AQ_CFG_SKB_FRAGS_MAX 32U |
63 | |
64 | /* Number of descriptors available in one ring to resume this ring queue |
65 | */ |
66 | #define AQ_CFG_RESTART_DESC_THRES (AQ_CFG_SKB_FRAGS_MAX * 2) |
67 | |
68 | /*#define AQ_CFG_MAC_ADDR_PERMANENT {0x30, 0x0E, 0xE3, 0x12, 0x34, 0x56}*/ |
69 | |
70 | #define AQ_CFG_FC_MODE AQ_NIC_FC_FULL |
71 | |
72 | /* Default WOL modes used on initialization */ |
73 | #define AQ_CFG_WOL_MODES WAKE_MAGIC |
74 | |
75 | #define AQ_CFG_SPEED_MSK 0xFFFFU /* 0xFFFFU==auto_neg */ |
76 | |
77 | #define AQ_CFG_IS_AUTONEG_DEF 1U |
78 | #define AQ_CFG_MTU_DEF 1514U |
79 | |
80 | #define AQ_CFG_LOCK_TRYS 100U |
81 | |
82 | #define AQ_CFG_DRV_AUTHOR "Marvell" |
83 | #define AQ_CFG_DRV_DESC "Marvell (Aquantia) Corporation(R) Network Driver" |
84 | #define AQ_CFG_DRV_NAME "atlantic" |
85 | |
86 | #endif /* AQ_CFG_H */ |
87 | |