1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Linux network driver for QLogic BR-series Converged Network Adapter. |
4 | */ |
5 | /* |
6 | * Copyright (c) 2005-2014 Brocade Communications Systems, Inc. |
7 | * Copyright (c) 2014-2015 QLogic Corporation |
8 | * All rights reserved |
9 | * www.qlogic.com |
10 | */ |
11 | |
12 | #ifndef __BFA_DEFS_H__ |
13 | #define __BFA_DEFS_H__ |
14 | |
15 | #include "cna.h" |
16 | #include "bfa_defs_status.h" |
17 | #include "bfa_defs_mfg_comm.h" |
18 | |
19 | #define BFA_VERSION_LEN 64 |
20 | |
21 | /* ---------------------- adapter definitions ------------ */ |
22 | |
23 | /* BFA adapter level attributes. */ |
24 | enum { |
25 | BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE), |
26 | /* |
27 | *!< adapter serial num length |
28 | */ |
29 | BFA_ADAPTER_MODEL_NAME_LEN = 16, /*!< model name length */ |
30 | BFA_ADAPTER_MODEL_DESCR_LEN = 128, /*!< model description length */ |
31 | BFA_ADAPTER_MFG_NAME_LEN = 8, /*!< manufacturer name length */ |
32 | BFA_ADAPTER_SYM_NAME_LEN = 64, /*!< adapter symbolic name length */ |
33 | BFA_ADAPTER_OS_TYPE_LEN = 64, /*!< adapter os type length */ |
34 | }; |
35 | |
36 | struct bfa_adapter_attr { |
37 | char manufacturer[BFA_ADAPTER_MFG_NAME_LEN]; |
38 | char serial_num[BFA_ADAPTER_SERIAL_NUM_LEN]; |
39 | u32 card_type; |
40 | char model[BFA_ADAPTER_MODEL_NAME_LEN]; |
41 | char model_descr[BFA_ADAPTER_MODEL_DESCR_LEN]; |
42 | u64 pwwn; |
43 | char node_symname[FC_SYMNAME_MAX]; |
44 | char hw_ver[BFA_VERSION_LEN]; |
45 | char fw_ver[BFA_VERSION_LEN]; |
46 | char optrom_ver[BFA_VERSION_LEN]; |
47 | char os_type[BFA_ADAPTER_OS_TYPE_LEN]; |
48 | struct bfa_mfg_vpd vpd; |
49 | u8 mac[ETH_ALEN]; |
50 | |
51 | u8 nports; |
52 | u8 max_speed; |
53 | u8 prototype; |
54 | char asic_rev; |
55 | |
56 | u8 pcie_gen; |
57 | u8 pcie_lanes_orig; |
58 | u8 pcie_lanes; |
59 | u8 cna_capable; |
60 | |
61 | u8 is_mezz; |
62 | u8 trunk_capable; |
63 | }; |
64 | |
65 | /* ---------------------- IOC definitions ------------ */ |
66 | |
67 | enum { |
68 | BFA_IOC_DRIVER_LEN = 16, |
69 | BFA_IOC_CHIP_REV_LEN = 8, |
70 | }; |
71 | |
72 | /* Driver and firmware versions. */ |
73 | struct bfa_ioc_driver_attr { |
74 | char driver[BFA_IOC_DRIVER_LEN]; /*!< driver name */ |
75 | char driver_ver[BFA_VERSION_LEN]; /*!< driver version */ |
76 | char fw_ver[BFA_VERSION_LEN]; /*!< firmware version */ |
77 | char bios_ver[BFA_VERSION_LEN]; /*!< bios version */ |
78 | char efi_ver[BFA_VERSION_LEN]; /*!< EFI version */ |
79 | char ob_ver[BFA_VERSION_LEN]; /*!< openboot version */ |
80 | }; |
81 | |
82 | /* IOC PCI device attributes */ |
83 | struct bfa_ioc_pci_attr { |
84 | u16 vendor_id; /*!< PCI vendor ID */ |
85 | u16 device_id; /*!< PCI device ID */ |
86 | u16 ssid; /*!< subsystem ID */ |
87 | u16 ssvid; /*!< subsystem vendor ID */ |
88 | u32 pcifn; /*!< PCI device function */ |
89 | u32 rsvd; /* padding */ |
90 | char chip_rev[BFA_IOC_CHIP_REV_LEN]; /*!< chip revision */ |
91 | }; |
92 | |
93 | /* IOC states */ |
94 | enum bfa_ioc_state { |
95 | BFA_IOC_UNINIT = 1, /*!< IOC is in uninit state */ |
96 | BFA_IOC_RESET = 2, /*!< IOC is in reset state */ |
97 | BFA_IOC_SEMWAIT = 3, /*!< Waiting for IOC h/w semaphore */ |
98 | BFA_IOC_HWINIT = 4, /*!< IOC h/w is being initialized */ |
99 | BFA_IOC_GETATTR = 5, /*!< IOC is being configured */ |
100 | BFA_IOC_OPERATIONAL = 6, /*!< IOC is operational */ |
101 | BFA_IOC_INITFAIL = 7, /*!< IOC hardware failure */ |
102 | BFA_IOC_FAIL = 8, /*!< IOC heart-beat failure */ |
103 | BFA_IOC_DISABLING = 9, /*!< IOC is being disabled */ |
104 | BFA_IOC_DISABLED = 10, /*!< IOC is disabled */ |
105 | BFA_IOC_FWMISMATCH = 11, /*!< IOC f/w different from drivers */ |
106 | BFA_IOC_ENABLING = 12, /*!< IOC is being enabled */ |
107 | BFA_IOC_HWFAIL = 13, /*!< PCI mapping doesn't exist */ |
108 | }; |
109 | |
110 | /* IOC firmware stats */ |
111 | struct bfa_fw_ioc_stats { |
112 | u32 enable_reqs; |
113 | u32 disable_reqs; |
114 | u32 get_attr_reqs; |
115 | u32 dbg_sync; |
116 | u32 dbg_dump; |
117 | u32 unknown_reqs; |
118 | }; |
119 | |
120 | /* IOC driver stats */ |
121 | struct bfa_ioc_drv_stats { |
122 | u32 ioc_isrs; |
123 | u32 ioc_enables; |
124 | u32 ioc_disables; |
125 | u32 ioc_hbfails; |
126 | u32 ioc_boots; |
127 | u32 stats_tmos; |
128 | u32 hb_count; |
129 | u32 disable_reqs; |
130 | u32 enable_reqs; |
131 | u32 disable_replies; |
132 | u32 enable_replies; |
133 | u32 rsvd; |
134 | }; |
135 | |
136 | /* IOC statistics */ |
137 | struct bfa_ioc_stats { |
138 | struct bfa_ioc_drv_stats drv_stats; /*!< driver IOC stats */ |
139 | struct bfa_fw_ioc_stats fw_stats; /*!< firmware IOC stats */ |
140 | }; |
141 | |
142 | enum bfa_ioc_type { |
143 | BFA_IOC_TYPE_FC = 1, |
144 | BFA_IOC_TYPE_FCoE = 2, |
145 | BFA_IOC_TYPE_LL = 3, |
146 | }; |
147 | |
148 | /* IOC attributes returned in queries */ |
149 | struct bfa_ioc_attr { |
150 | enum bfa_ioc_type ioc_type; |
151 | enum bfa_ioc_state state; /*!< IOC state */ |
152 | struct bfa_adapter_attr adapter_attr; /*!< HBA attributes */ |
153 | struct bfa_ioc_driver_attr driver_attr; /*!< driver attr */ |
154 | struct bfa_ioc_pci_attr pci_attr; |
155 | u8 port_id; /*!< port number */ |
156 | u8 port_mode; /*!< enum bfa_mode */ |
157 | u8 cap_bm; /*!< capability */ |
158 | u8 port_mode_cfg; /*!< enum bfa_mode */ |
159 | u8 def_fn; /*!< 1 if default fn */ |
160 | u8 rsvd[3]; /*!< 64bit align */ |
161 | }; |
162 | |
163 | /* Adapter capability mask definition */ |
164 | enum { |
165 | BFA_CM_HBA = 0x01, |
166 | BFA_CM_CNA = 0x02, |
167 | BFA_CM_NIC = 0x04, |
168 | }; |
169 | |
170 | /* ---------------------- mfg definitions ------------ */ |
171 | |
172 | /* Checksum size */ |
173 | #define BFA_MFG_CHKSUM_SIZE 16 |
174 | |
175 | #define BFA_MFG_PARTNUM_SIZE 14 |
176 | #define BFA_MFG_SUPPLIER_ID_SIZE 10 |
177 | #define BFA_MFG_SUPPLIER_PARTNUM_SIZE 20 |
178 | #define BFA_MFG_SUPPLIER_SERIALNUM_SIZE 20 |
179 | #define BFA_MFG_SUPPLIER_REVISION_SIZE 4 |
180 | |
181 | /* BFA adapter manufacturing block definition. |
182 | * |
183 | * All numerical fields are in big-endian format. |
184 | */ |
185 | struct bfa_mfg_block { |
186 | u8 version; /* manufacturing block version */ |
187 | u8 mfg_sig[3]; /* characters 'M', 'F', 'G' */ |
188 | u16 mfgsize; /* mfg block size */ |
189 | u16 u16_chksum; /* old u16 checksum */ |
190 | char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)]; |
191 | char brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)]; |
192 | u8 mfg_day; /* manufacturing day */ |
193 | u8 mfg_month; /* manufacturing month */ |
194 | u16 mfg_year; /* manufacturing year */ |
195 | u64 mfg_wwn; /* wwn base for this adapter */ |
196 | u8 num_wwn; /* number of wwns assigned */ |
197 | u8 mfg_speeds; /* speeds allowed for this adapter */ |
198 | u8 rsv[2]; |
199 | char supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)]; |
200 | char supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)]; |
201 | char supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)]; |
202 | char supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)]; |
203 | u8 mfg_mac[ETH_ALEN]; /* base mac address */ |
204 | u8 num_mac; /* number of mac addresses */ |
205 | u8 rsv2; |
206 | u32 card_type; /* card type */ |
207 | char cap_nic; /* capability nic */ |
208 | char cap_cna; /* capability cna */ |
209 | char cap_hba; /* capability hba */ |
210 | char cap_fc16g; /* capability fc 16g */ |
211 | char cap_sriov; /* capability sriov */ |
212 | char cap_mezz; /* capability mezz */ |
213 | u8 rsv3; |
214 | u8 mfg_nports; /* number of ports */ |
215 | char media[8]; /* xfi/xaui */ |
216 | char initial_mode[8]; /* initial mode: hba/cna/nic */ |
217 | u8 rsv4[84]; |
218 | u8 md5_chksum[BFA_MFG_CHKSUM_SIZE]; /* md5 checksum */ |
219 | } __packed; |
220 | |
221 | /* ---------------------- pci definitions ------------ */ |
222 | |
223 | /* |
224 | * PCI device ID information |
225 | */ |
226 | enum { |
227 | BFA_PCI_DEVICE_ID_CT2 = 0x22, |
228 | }; |
229 | |
230 | #define bfa_asic_id_ct(device) \ |
231 | ((device) == PCI_DEVICE_ID_BROCADE_CT || \ |
232 | (device) == PCI_DEVICE_ID_BROCADE_CT_FC) |
233 | #define bfa_asic_id_ct2(device) \ |
234 | ((device) == BFA_PCI_DEVICE_ID_CT2) |
235 | #define bfa_asic_id_ctc(device) \ |
236 | (bfa_asic_id_ct(device) || bfa_asic_id_ct2(device)) |
237 | |
238 | /* PCI sub-system device and vendor ID information */ |
239 | enum { |
240 | BFA_PCI_FCOE_SSDEVICE_ID = 0x14, |
241 | BFA_PCI_CT2_SSID_FCoE = 0x22, |
242 | BFA_PCI_CT2_SSID_ETH = 0x23, |
243 | BFA_PCI_CT2_SSID_FC = 0x24, |
244 | }; |
245 | |
246 | enum bfa_mode { |
247 | BFA_MODE_HBA = 1, |
248 | BFA_MODE_CNA = 2, |
249 | BFA_MODE_NIC = 3 |
250 | }; |
251 | |
252 | /* |
253 | * Flash module specific |
254 | */ |
255 | #define BFA_FLASH_PART_ENTRY_SIZE 32 /* partition entry size */ |
256 | #define BFA_FLASH_PART_MAX 32 /* maximal # of partitions */ |
257 | #define BFA_TOTAL_FLASH_SIZE 0x400000 |
258 | #define BFA_FLASH_PART_FWIMG 2 |
259 | #define BFA_FLASH_PART_MFG 7 |
260 | |
261 | /* |
262 | * flash partition attributes |
263 | */ |
264 | struct bfa_flash_part_attr { |
265 | u32 part_type; /* partition type */ |
266 | u32 part_instance; /* partition instance */ |
267 | u32 part_off; /* partition offset */ |
268 | u32 part_size; /* partition size */ |
269 | u32 part_len; /* partition content length */ |
270 | u32 part_status; /* partition status */ |
271 | char rsv[BFA_FLASH_PART_ENTRY_SIZE - 24]; |
272 | }; |
273 | |
274 | /* |
275 | * flash attributes |
276 | */ |
277 | struct bfa_flash_attr { |
278 | u32 status; /* flash overall status */ |
279 | u32 npart; /* num of partitions */ |
280 | struct bfa_flash_part_attr part[BFA_FLASH_PART_MAX]; |
281 | }; |
282 | |
283 | #endif /* __BFA_DEFS_H__ */ |
284 | |