| 1 | /********************************************************************** |
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| 2 | * Author: Cavium, Inc. |
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| 3 | * |
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| 4 | * Contact: support@cavium.com |
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| 5 | * Please include "LiquidIO" in the subject. |
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| 6 | * |
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| 7 | * Copyright (c) 2003-2016 Cavium, Inc. |
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| 8 | * |
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| 9 | * This file is free software; you can redistribute it and/or modify |
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| 10 | * it under the terms of the GNU General Public License, Version 2, as |
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| 11 | * published by the Free Software Foundation. |
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| 12 | * |
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| 13 | * This file is distributed in the hope that it will be useful, but |
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| 14 | * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty |
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| 15 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or |
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| 16 | * NONINFRINGEMENT. See the GNU General Public License for more details. |
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| 17 | ***********************************************************************/ |
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| 18 | /*! \file cn68xx_regs.h |
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| 19 | * \brief Host Driver: Register Address and Register Mask values for |
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| 20 | * Octeon CN68XX devices. The register map for CN66XX is the same |
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| 21 | * for most registers. This file has the other registers that are |
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| 22 | * 68XX-specific. |
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| 23 | */ |
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| 24 | |
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| 25 | #ifndef __CN68XX_REGS_H__ |
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| 26 | #define __CN68XX_REGS_H__ |
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| 27 | |
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| 28 | /*###################### REQUEST QUEUE #########################*/ |
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| 29 | |
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| 30 | #define CN68XX_SLI_IQ_PORT0_PKIND 0x0800 |
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| 31 | |
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| 32 | #define CN68XX_SLI_IQ_PORT_PKIND(iq) \ |
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| 33 | (CN68XX_SLI_IQ_PORT0_PKIND + ((iq) * CN6XXX_IQ_OFFSET)) |
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| 34 | |
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| 35 | /*############################ OUTPUT QUEUE #########################*/ |
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| 36 | |
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| 37 | /* Starting pipe number and number of pipes used by the SLI packet output. */ |
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| 38 | #define CN68XX_SLI_TX_PIPE 0x1230 |
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| 39 | |
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| 40 | /*######################## INTERRUPTS #########################*/ |
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| 41 | |
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| 42 | /*------------------ Interrupt Masks ----------------*/ |
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| 43 | #define CN68XX_INTR_PIPE_ERR BIT_ULL(61) |
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| 44 | |
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| 45 | #endif |
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| 46 | |
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